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Thu, 10 Jul 2025 22:39:03 +0000 (GMT) Received: from us-aus-excas-p1.ni.corp.natinst.com (130.164.68.17) by us-aus-excas-p2.ni.corp.natinst.com (130.164.68.18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Thu, 10 Jul 2025 17:39:02 -0500 Received: from cvadrevu-p620.ni.corp.natinst.com (172.18.68.32) by us-aus-excas-p1.ni.corp.natinst.com (130.164.68.17) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Thu, 10 Jul 2025 17:39:02 -0500 From: Chaitanya Vadrevu To: , CC: , , "Chaitanya Vadrevu" , kernel test robot , Jason Smith , Gratian Crisan Subject: [PATCH] serial: 8250_ni: Fix build warning Date: Thu, 10 Jul 2025 17:38:37 -0500 Message-ID: <20250710223838.2657261-1-chaitanya.vadrevu@emerson.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=TrvmhCXh c=1 sm=1 tr=0 ts=68704107 cx=c_pps a=VUOoxcgKHUMpfFMIT0tLvw==:117 a=VUOoxcgKHUMpfFMIT0tLvw==:17 a=Wb1JkmetP80A:10 a=VwQbUJbxAAAA:8 a=QyXUC8HyAAAA:8 a=geDs06hvAAAA:8 a=eTsoE9kVQGiD-jAPuUoA:9 a=7yvi0DHx91fDKfvzWsLo:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzEwMDE5MCBTYWx0ZWRfX07SJvoixVHqg fNSiPq3CJr0G3Ke6cnAdn6K+w+GBbsaou7M1fGXlYjCxRP6Z268Wt53lHppG3Cu1inQdHfGmvnZ +adaWcWgFMA519JTAWbH3BwkLA5cRYDfn6x+p+Ct8GiSiIYidjJRmDPOKpKp92KQOLFrx1+mHvZ dYqMrFP8B8M6wtGEo2uMRitaHjS3raFIdwL8arc39WpkLxv5TWYyLsaDNwOAWZ7oJQ42nxWR8oZ yOD2qSFETqnXUrBxgT0//C0ml/TY3l89OW8yFO2dwAVNGeKEACgMks3sX/1ZboSlIjeG7EflYP0 GXwwLJ0XlBovQV3ZXmVw291iukw+tN1u1o0S7ACe6qnpt/BYrpmL9xCMT5PRRTurRQrYPpokRiJ 4P0Vk+85R9TqFTiLWqJzCk9EvhifJvSn4eLMeNdZWAF1mKGwmfXyhnPLV4cQRRlpWwQvV5A0 X-Proofpoint-ORIG-GUID: ROE9RDew2f4Edt4xn8gnpSXlZqzHBP-K X-Proofpoint-GUID: ROE9RDew2f4Edt4xn8gnpSXlZqzHBP-K X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.7,FMLib:17.12.80.40 definitions=2025-07-10_05,2025-07-09_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1011 mlxlogscore=999 phishscore=0 bulkscore=0 priorityscore=1501 suspectscore=0 mlxscore=0 adultscore=0 impostorscore=0 malwarescore=0 spamscore=0 lowpriorityscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507100190 Content-Type: text/plain; charset="utf-8" Allocate memory on heap instead of stack to fix following warning that clang version 20.1.2 produces on W=3D1 build. drivers/tty/serial/8250/8250_ni.c:277:12: warning: stack frame size (1072) = exceeds limit (1024) in 'ni16550_probe' [-Wframe-larger-than] 277 | static int ni16550_probe(struct platform_device *pdev) | ^ 1 warning generated. Also, reorder variable declarations to follow reverse Christmas tree style. Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202507030557.vIewJJQO-lkp@int= el.com/ Cc: Jason Smith Cc: Gratian Crisan Signed-off-by: Chaitanya Vadrevu Reviewed-by: Jiri Slaby --- drivers/tty/serial/8250/8250_ni.c | 56 +++++++++++++++++-------------- 1 file changed, 30 insertions(+), 26 deletions(-) diff --git a/drivers/tty/serial/8250/8250_ni.c b/drivers/tty/serial/8250/82= 50_ni.c index b0e44fb00b3a4..cb5b42b3609c9 100644 --- a/drivers/tty/serial/8250/8250_ni.c +++ b/drivers/tty/serial/8250/8250_ni.c @@ -275,76 +275,80 @@ static void ni16550_set_mctrl(struct uart_port *port,= unsigned int mctrl) =20 static int ni16550_probe(struct platform_device *pdev) { + struct uart_8250_port *uart __free(kfree) =3D NULL; const struct ni16550_device_info *info; struct device *dev =3D &pdev->dev; - struct uart_8250_port uart =3D {}; unsigned int txfifosz, rxfifosz; - unsigned int prescaler; struct ni16550_data *data; + unsigned int prescaler; const char *portmode; bool rs232_property; int ret; =20 + uart =3D kzalloc(sizeof(*uart), GFP_KERNEL); + if (!uart) + return -ENOMEM; + data =3D devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); if (!data) return -ENOMEM; =20 - spin_lock_init(&uart.port.lock); + spin_lock_init(&uart->port.lock); =20 - ret =3D ni16550_get_regs(pdev, &uart.port); + ret =3D ni16550_get_regs(pdev, &uart->port); if (ret < 0) return ret; =20 /* early setup so that serial_in()/serial_out() work */ - serial8250_set_defaults(&uart); + serial8250_set_defaults(uart); =20 info =3D device_get_match_data(dev); =20 - uart.port.dev =3D dev; - uart.port.flags =3D UPF_BOOT_AUTOCONF | UPF_FIXED_PORT | UPF_FIXED_TYPE; - uart.port.startup =3D ni16550_port_startup; - uart.port.shutdown =3D ni16550_port_shutdown; + uart->port.dev =3D dev; + uart->port.flags =3D UPF_BOOT_AUTOCONF | UPF_FIXED_PORT | UPF_FIXED_TYPE; + uart->port.startup =3D ni16550_port_startup; + uart->port.shutdown =3D ni16550_port_shutdown; =20 /* * Hardware instantiation of FIFO sizes are held in registers. */ - txfifosz =3D ni16550_read_fifo_size(&uart, NI16550_TFS_OFFSET); - rxfifosz =3D ni16550_read_fifo_size(&uart, NI16550_RFS_OFFSET); + txfifosz =3D ni16550_read_fifo_size(uart, NI16550_TFS_OFFSET); + rxfifosz =3D ni16550_read_fifo_size(uart, NI16550_RFS_OFFSET); =20 dev_dbg(dev, "NI 16550 has TX FIFO size %u, RX FIFO size %u\n", txfifosz, rxfifosz); =20 - uart.port.type =3D PORT_16550A; - uart.port.fifosize =3D txfifosz; - uart.tx_loadsz =3D txfifosz; - uart.fcr =3D UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10; - uart.capabilities =3D UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR; + uart->port.type =3D PORT_16550A; + uart->port.fifosize =3D txfifosz; + uart->tx_loadsz =3D txfifosz; + uart->fcr =3D UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10; + uart->capabilities =3D UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR; =20 /* * Declaration of the base clock frequency can come from one of: * - static declaration in this driver (for older ACPI IDs) * - a "clock-frequency" ACPI */ - uart.port.uartclk =3D info->uartclk; + uart->port.uartclk =3D info->uartclk; =20 - ret =3D uart_read_port_properties(&uart.port); + ret =3D uart_read_port_properties(&uart->port); if (ret) return ret; =20 - if (!uart.port.uartclk) { + if (!uart->port.uartclk) { data->clk =3D devm_clk_get_enabled(dev, NULL); if (!IS_ERR(data->clk)) - uart.port.uartclk =3D clk_get_rate(data->clk); + uart->port.uartclk =3D clk_get_rate(data->clk); } =20 - if (!uart.port.uartclk) + if (!uart->port.uartclk) return dev_err_probe(dev, -ENODEV, "unable to determine clock frequency!= \n"); =20 prescaler =3D info->prescaler; device_property_read_u32(dev, "clock-prescaler", &prescaler); if (prescaler) { - uart.port.set_mctrl =3D ni16550_set_mctrl; - ni16550_config_prescaler(&uart, (u8)prescaler); + uart->port.set_mctrl =3D ni16550_set_mctrl; + ni16550_config_prescaler(uart, (u8)prescaler); } =20 /* @@ -362,7 +366,7 @@ static int ni16550_probe(struct platform_device *pdev) dev_dbg(dev, "port is in %s mode (via device property)\n", rs232_property ? "RS-232" : "RS-485"); } else if (info->flags & NI_HAS_PMR) { - rs232_property =3D is_pmr_rs232_mode(&uart); + rs232_property =3D is_pmr_rs232_mode(uart); =20 dev_dbg(dev, "port is in %s mode (via PMR)\n", rs232_property ? "RS-232" : "RS-485"); @@ -377,10 +381,10 @@ static int ni16550_probe(struct platform_device *pdev) * Neither the 'transceiver' property nor the PMR indicate * that this is an RS-232 port, so it must be an RS-485 one. */ - ni16550_rs485_setup(&uart.port); + ni16550_rs485_setup(&uart->port); } =20 - ret =3D serial8250_register_8250_port(&uart); + ret =3D serial8250_register_8250_port(uart); if (ret < 0) return ret; data->line =3D ret; --=20 2.43.0