From nobody Tue Oct 7 11:55:13 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AC31826A1B0 for ; Thu, 10 Jul 2025 13:42:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752154958; cv=none; b=rjFWajtumG06IX6p53aTrBq+sK7/wvR0daNueJwA439oAxaqIQmzkmGogxS02IOKbg0m8Xy499w/D4on36hl1D70mpfPKvhpWlpp7tehDzBLEIbMj4ZWqtGAFYadeNMPpq0s28BNhcz73aSqB0JHIXHSSQt5FtrWjjUPXmeFZCE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752154958; c=relaxed/simple; bh=VQ8Am7+heAcHjPU5GdN2mMOsTJHb5LEzXq0oE4vZtJw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=BG34e2wWNJtGceEpt5BX7i+XlrLolSPus/EGmgQ8Nx2RXWG0gHzIYhQfdMyW+QWIIa9qzsxvRsxFS23PunlEn8H4XhdndHuhjthq4loukjsiQQZ0oiR9Bm0d5JilvKXoUe8NK/EiUC1Di8UmiqfJj8RY0Dia/aDpA+gvRQws/n4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=W9L7fsBW; arc=none smtp.client-ip=192.198.163.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="W9L7fsBW" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1752154957; x=1783690957; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=VQ8Am7+heAcHjPU5GdN2mMOsTJHb5LEzXq0oE4vZtJw=; b=W9L7fsBWjpT7Jq4A+GvdK4cVnHEPNo8b4oXpH/hSRVrfXZ3S1cJNEIlx DM1JEojgCX3buJyZxUZlnaah37bobdjY4nf8qpZNXrqBUPxL+FWCatjNM ZFEHhQzoUWnymjp5VQlJdsRaOHFUXcpQ6+Dn7ZTYZCvEDZJqNq55QS9Yn HBPRZD6/sHDNEv47ppqePGgfrXZuJmzNvRG3NP33o8rZLMh9g8wWO6Rct Rw1GwfpVAtUm+Yy77ST7Kif+A5vzszcritQDn8rxA4rNcmy2YAhhCBzyb NuOYtFG9u3W6YGq5ARxYIaU/yIKokqrvBPKrEtT5MhvzR3hKNku9UoPJb w==; X-CSE-ConnectionGUID: w22JQKrWTeOrca/2QmG11A== X-CSE-MsgGUID: mx5kk6r8QgycOKL0UFqd9Q== X-IronPort-AV: E=McAfee;i="6800,10657,11490"; a="65787673" X-IronPort-AV: E=Sophos;i="6.16,300,1744095600"; d="scan'208";a="65787673" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jul 2025 06:42:36 -0700 X-CSE-ConnectionGUID: KfYVX4zpR7iGNkvrlQS/xw== X-CSE-MsgGUID: 3SQMCOxoSXuNnWiqWGqflA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.16,300,1744095600"; d="scan'208";a="156809432" Received: from gnrd8.igk.intel.com ([10.123.232.137]) by fmviesa010.fm.intel.com with ESMTP; 10 Jul 2025 06:42:34 -0700 From: Sergey Temerkhanov To: iommu@lists.linux.dev, linux-kernel@vger.kernel.org Cc: David Woodhouse , Lu Baolu , Joerg Roedel , Will Deacon , Robin Murphy , Sergey Temerkhanov , Andy Shevchenko Subject: [PATCH v1 1/4] iommu: Pass the Requester ID in the fault parameter structure Date: Thu, 10 Jul 2025 13:42:12 +0000 Message-ID: <20250710134215.97840-2-sergey.temerkhanov@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250710134215.97840-1-sergey.temerkhanov@intel.com> References: <20250710134215.97840-1-sergey.temerkhanov@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Pass the Requester ID in the fault parameter structure to facilitate requester notifications on IOMMU faults. Signed-off-by: Sergey Temerkhanov Reviewed-by: Andy Shevchenko --- drivers/iommu/intel/prq.c | 1 + include/linux/iommu.h | 2 ++ 2 files changed, 3 insertions(+) diff --git a/drivers/iommu/intel/prq.c b/drivers/iommu/intel/prq.c index 52570e42a14c..d88385adc3cb 100644 --- a/drivers/iommu/intel/prq.c +++ b/drivers/iommu/intel/prq.c @@ -181,6 +181,7 @@ static void intel_prq_report(struct intel_iommu *iommu,= struct device *dev, /* Fill in event data for device specific processing */ event.fault.type =3D IOMMU_FAULT_PAGE_REQ; event.fault.prm.addr =3D (u64)desc->addr << VTD_PAGE_SHIFT; + event.fault.prm.rid =3D desc->rid; event.fault.prm.pasid =3D desc->pasid; event.fault.prm.grpid =3D desc->prg_index; event.fault.prm.perm =3D prq_to_iommu_prot(desc); diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 156732807994..4ddb63a3f2cf 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -65,6 +65,7 @@ enum iommu_fault_type { * When IOMMU_FAULT_PAGE_RESPONSE_NEEDS_PASID is set, the page res= ponse * must have the same PASID value as the page request. When it is = clear, * the page response should not have a PASID. + * @rid: Requester ID * @pasid: Process Address Space ID * @grpid: Page Request Group Index * @perm: requested page permissions (IOMMU_FAULT_PERM_* values) @@ -76,6 +77,7 @@ struct iommu_fault_page_request { #define IOMMU_FAULT_PAGE_REQUEST_LAST_PAGE (1 << 1) #define IOMMU_FAULT_PAGE_RESPONSE_NEEDS_PASID (1 << 2) u32 flags; + u32 rid; u32 pasid; u32 grpid; u32 perm; --=20 2.43.0 From nobody Tue Oct 7 11:55:13 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D6F7626D4CF for ; Thu, 10 Jul 2025 13:42:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752154961; cv=none; b=U8c/fCFWKOKk628gclHHLcly+hH6d82Bfxs18vRoXU35tWCiFjvtKIN/oYte21nkSOFohcba08KongbGtJtMa1PYpeUxcwzxc392nW6rRaAXr5k+gOtRV+86pQclnx0sqPtkgKFT0fqfjCaoCC0HOiQE1eRARPDPRxx2wAJ08gs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752154961; c=relaxed/simple; bh=++9QqGL5xGzI1k7HkFDsKPdBKvQU6+NJOIQG63S2Sqo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=j9Z4uP//V61RHiE/CClG4JSvZYlEznK88l9GPh9UIZEymeeeooRw8k831icZ7rbC3NhC7Dv3hR4KoD4xIjp5aTUgS9HjrRcYnM7P0PtPaE+MAfTSrB14cT1ap3OwELDdw75tMsA7EnmdhN3Xd2UiA1ArxihUMzVgvq6r6M0hUgo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Qwe+8sMP; arc=none smtp.client-ip=192.198.163.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Qwe+8sMP" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1752154960; x=1783690960; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=++9QqGL5xGzI1k7HkFDsKPdBKvQU6+NJOIQG63S2Sqo=; b=Qwe+8sMP3CWCdwCY4WynXIPXLxRUqoPy38GRDdLWYow1wX7jf2vxn/py 1cFAIzWJIkmnO34jsKUl5O35pLy6GZQook6WL6Y1JLCvjiVP0kiguUEJh ahSUOmNvbM1BeAXdCmrrWnQywjHaRj+rkugYTXDp7jZnJbPGo3jXwKASX XQM+W679ZSH6nizLXF658MYg4qcUYl48LYhbmzCdD/2IKLvFP0JFRbiSf FIs24/Snvi2zN+n/bCnGxYiNsymFiPF2dbA+ZnHCWfqsoEm/p+MNgNNnC D0gHXNb3ml7eQnEo3/cw6cksPLHLy7eHbuiuAe4phcaJDy+9xAPQetZmV Q==; X-CSE-ConnectionGUID: SVJqdOjqQD+wAH5+Tu+y0g== X-CSE-MsgGUID: gnA4CczgTEG/oXHaJQ6LIg== X-IronPort-AV: E=McAfee;i="6800,10657,11490"; a="65787682" X-IronPort-AV: E=Sophos;i="6.16,300,1744095600"; d="scan'208";a="65787682" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jul 2025 06:42:40 -0700 X-CSE-ConnectionGUID: oIbFHR2uQPymFCkL1rI3GA== X-CSE-MsgGUID: Gw5oI0mHS3yueTKJYuuNCQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.16,300,1744095600"; d="scan'208";a="156809436" Received: from gnrd8.igk.intel.com ([10.123.232.137]) by fmviesa010.fm.intel.com with ESMTP; 10 Jul 2025 06:42:37 -0700 From: Sergey Temerkhanov To: iommu@lists.linux.dev, linux-kernel@vger.kernel.org Cc: David Woodhouse , Lu Baolu , Joerg Roedel , Will Deacon , Robin Murphy , Sergey Temerkhanov , Andy Shevchenko Subject: [PATCH v1 2/4] iommu: Add rid_notifier array to the dev_iommu structure Date: Thu, 10 Jul 2025 13:42:13 +0000 Message-ID: <20250710134215.97840-3-sergey.temerkhanov@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250710134215.97840-1-sergey.temerkhanov@intel.com> References: <20250710134215.97840-1-sergey.temerkhanov@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add rid_notifier array to struct dev_iommu to facilitate requester notification of IOMMU faults. Signed-off-by: Sergey Temerkhanov Reviewed-by: Andy Shevchenko --- drivers/iommu/iommu.c | 9 +++++++++ include/linux/iommu.h | 4 ++++ 2 files changed, 13 insertions(+) diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index a4b606c591da..3789c16806a1 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -354,6 +354,7 @@ static struct dev_iommu *dev_iommu_get(struct device *d= ev) return NULL; =20 mutex_init(¶m->lock); + xa_init(¶m->rid_notifiers); dev->iommu =3D param; return param; } @@ -361,8 +362,16 @@ static struct dev_iommu *dev_iommu_get(struct device *= dev) void dev_iommu_free(struct device *dev) { struct dev_iommu *param =3D dev->iommu; + struct rid_notifier *notifier; + unsigned long rid; =20 dev->iommu =3D NULL; + + xa_for_each(¶m->rid_notifiers, rid, notifier) + kfree(notifier); + + xa_destroy(¶m->rid_notifiers); + if (param->fwspec) { fwnode_handle_put(param->fwspec->iommu_fwnode); kfree(param->fwspec); diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 4ddb63a3f2cf..2062623fdf32 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -795,6 +795,8 @@ struct iommu_fault_param { * @pci_32bit_workaround: Limit DMA allocations to 32-bit IOVAs * @require_direct: device requires IOMMU_RESV_DIRECT regions * @shadow_on_flush: IOTLB flushes are used to sync shadow tables + * @rid_notifiers: holds pointers and data to the notifier functions for + * specific RIDs * * TODO: migrate other per device data pointers under iommu_dev_data, e.g. * struct iommu_group *iommu_group; @@ -810,6 +812,8 @@ struct dev_iommu { u32 pci_32bit_workaround:1; u32 require_direct:1; u32 shadow_on_flush:1; + + struct xarray rid_notifiers; }; =20 int iommu_device_register(struct iommu_device *iommu, --=20 2.43.0 From nobody Tue Oct 7 11:55:13 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 075D926E16C for ; Thu, 10 Jul 2025 13:42:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752154964; cv=none; b=GwVstakLoE4izIso4xLyFPCBkp8V+nwlAS4uv+uBDQ5JWu5GBYNFfSflPxbOpQZcTTrkUoCWVVAKBF3oGX4D4CNaOUANTadAxTX0TPrH4N0kQbJl3xlyCDwP/iu9bZiMJHkJcFnMopq7JbX/NQmjFP/yp8qrRCDjNN6R3UjIoY0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752154964; c=relaxed/simple; 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d="scan'208";a="156809441" Received: from gnrd8.igk.intel.com ([10.123.232.137]) by fmviesa010.fm.intel.com with ESMTP; 10 Jul 2025 06:42:40 -0700 From: Sergey Temerkhanov To: iommu@lists.linux.dev, linux-kernel@vger.kernel.org Cc: David Woodhouse , Lu Baolu , Joerg Roedel , Will Deacon , Robin Murphy , Sergey Temerkhanov , Andy Shevchenko Subject: [PATCH v1 3/4] iommu: Implement iommu_set_rid_fault_notifier() Date: Thu, 10 Jul 2025 13:42:14 +0000 Message-ID: <20250710134215.97840-4-sergey.temerkhanov@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250710134215.97840-1-sergey.temerkhanov@intel.com> References: <20250710134215.97840-1-sergey.temerkhanov@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Introduce the iommu_set_rid_fault_notifier() function which sets an IOMMU fault notification callback for a specified endpoint device. PCI endpoint device support is implemented in this patch, with possibility of extension. This change will provide endpoint device drivers with means of retrieving details of IOMMU page faults occurring during operation and taking device-specific actions. Sample code using this facility: static int sample_iommu_fault_notify(struct device *dev, struct iommu_fault *fault, enum iommu_page_response_code, void *data) { printk("Fault data: rid: %#x, pasid: %u, ... addr: %#llx\n", fault->prm.rid, fault->prm.pasid, ... fault->prm.addr); } ... ret =3D iommu_set_rid_fault_notifier(&pdev->dev, sample_iommu_fault_notify, data); if (ret) ... Signed-off-by: Sergey Temerkhanov Reviewed-by: Andy Shevchenko --- drivers/iommu/io-pgfault.c | 53 ++++++++++++++++++++++++++++++++++++++ drivers/iommu/iommu-priv.h | 11 ++++++++ drivers/iommu/iommu.c | 12 +++++++++ include/linux/iommu.h | 17 ++++++++++-- 4 files changed, 91 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/io-pgfault.c b/drivers/iommu/io-pgfault.c index 8b5926c1452e..8e50c5f03da2 100644 --- a/drivers/iommu/io-pgfault.c +++ b/drivers/iommu/io-pgfault.c @@ -5,6 +5,7 @@ * Copyright (C) 2020 ARM Ltd. */ =20 +#include #include #include #include @@ -547,3 +548,55 @@ void iopf_queue_free(struct iopf_queue *queue) kfree(queue); } EXPORT_SYMBOL_GPL(iopf_queue_free); + +/** + * iommu_set_rid_fault_notifier() - Set a Requester ID fault notifier + * @dev: the requester device + * @notifier: notifier function pointer (NULL unsets the notifier) + * @data: data to pass to the notifier function as a parameter + * + * Set or remove a device Requester ID based IOMMU fault failure + * notifier function. + * + * Return: 0 on success, or an error code. + */ +int iommu_set_rid_fault_notifier(struct device *dev, + iommu_fault_rid_notifier_t notifier, + void *data) +{ + struct iommu_rid_notifier *entry, *old; + struct dev_iommu *param =3D dev->iommu; + u32 rid; + int ret; + + if (!param || !param->fault_param) + return -EINVAL; + + rid =3D iommu_get_dev_rid(dev); + + if (rid =3D=3D IOMMU_INVALID_RID) + return -EINVAL; + + guard(mutex)(¶m->lock); + + entry =3D kmalloc(sizeof(struct iommu_rid_notifier), GFP_KERNEL); + if (!entry) + return -ENOMEM; + + entry->notifier =3D notifier; + entry->data =3D data; + entry->dev =3D dev; + + old =3D xa_store(¶m->rid_notifiers, rid, entry, GFP_KERNEL); + + ret =3D xa_err(old); + if (ret) { + kfree(entry); + return ret; + } + + kfree(old); + + return ret; +} +EXPORT_SYMBOL_GPL(iommu_set_rid_fault_notifier); diff --git a/drivers/iommu/iommu-priv.h b/drivers/iommu/iommu-priv.h index e236b932e766..71e187bc024b 100644 --- a/drivers/iommu/iommu-priv.h +++ b/drivers/iommu/iommu-priv.h @@ -63,4 +63,15 @@ static inline int iommufd_sw_msi(struct iommu_domain *do= main, int iommu_replace_device_pasid(struct iommu_domain *domain, struct device *dev, ioasid_t pasid, struct iommu_attach_handle *handle); + +struct iommu_rid_notifier { + iommu_fault_rid_notifier_t notifier; + struct device *dev; + void *data; +}; + +#define IOMMU_INVALID_RID U32_MAX + +u32 iommu_get_dev_rid(struct device *dev); + #endif /* __LINUX_IOMMU_PRIV_H */ diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 3789c16806a1..c34c602dfb8a 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -3845,3 +3845,15 @@ int iommu_dma_prepare_msi(struct msi_desc *desc, phy= s_addr_t msi_addr) return ret; } #endif /* CONFIG_IRQ_MSI_IOMMU */ + +u32 iommu_get_dev_rid(struct device *dev) +{ + struct pci_dev *pdev; + + if (!dev_is_pci(dev)) + return IOMMU_INVALID_RID; + + pdev =3D to_pci_dev(dev); + + return PCI_DEVID(pdev->bus->number, pdev->devfn); +} diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 2062623fdf32..3a3f92222e27 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -161,6 +161,8 @@ struct iopf_queue { =20 typedef int (*iommu_fault_handler_t)(struct iommu_domain *, struct device *, unsigned long, int, void *); +typedef void (*iommu_fault_rid_notifier_t)(struct device *, struct iommu_f= ault *, + enum iommu_page_response_code, void *); =20 struct iommu_domain_geometry { dma_addr_t aperture_start; /* First address that can be mapped */ @@ -803,6 +805,7 @@ struct iommu_fault_param { */ struct dev_iommu { struct mutex lock; + struct xarray rid_notifiers; struct iommu_fault_param __rcu *fault_param; struct iommu_fwspec *fwspec; struct iommu_device *iommu_dev; @@ -812,8 +815,6 @@ struct dev_iommu { u32 pci_32bit_workaround:1; u32 require_direct:1; u32 shadow_on_flush:1; - - struct xarray rid_notifiers; }; =20 int iommu_device_register(struct iommu_device *iommu, @@ -931,6 +932,10 @@ void iommu_set_dma_strict(void); extern int report_iommu_fault(struct iommu_domain *domain, struct device *= dev, unsigned long iova, int flags); =20 +extern int iommu_set_rid_fault_notifier(struct device *dev, + iommu_fault_rid_notifier_t notifier, + void *data); + static inline void iommu_flush_iotlb_all(struct iommu_domain *domain) { if (domain->ops->flush_iotlb_all) @@ -1480,6 +1485,14 @@ static inline int iommu_dma_prepare_msi(struct msi_d= esc *desc, { return 0; } + +static inline int iommu_set_rid_fault_notifier(struct device *dev, + iommu_fault_rid_notifier_t notifier, + void *data) +{ + return 0; +} + #endif /* CONFIG_IOMMU_API */ #endif /* CONFIG_IRQ_MSI_IOMMU */ =20 --=20 2.43.0 From nobody Tue Oct 7 11:55:13 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C8A2726FA4B for ; Thu, 10 Jul 2025 13:42:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752154967; cv=none; b=NBWQ9MUGWzpYu7WaZ8UhZpBhE4DLtfSt/P9FU38zKLOVU3l4EKhQS6M8eYabt8Ud2Gvy6IoCwSpaFio25lHEridGzAl25CJxCaVaCG15ISLitluu0Bcd9hrSJNY0TAfZCItTeMtP3JVJ4JLseaVa7f/KmuqJoEwv3p2EaXYj6Vk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752154967; c=relaxed/simple; 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d="scan'208";a="156809445" Received: from gnrd8.igk.intel.com ([10.123.232.137]) by fmviesa010.fm.intel.com with ESMTP; 10 Jul 2025 06:42:44 -0700 From: Sergey Temerkhanov To: iommu@lists.linux.dev, linux-kernel@vger.kernel.org Cc: David Woodhouse , Lu Baolu , Joerg Roedel , Will Deacon , Robin Murphy , Sergey Temerkhanov , Andy Shevchenko Subject: [PATCH v1 4/4] iommu: Notify requesters of IOMMU fault failures Date: Thu, 10 Jul 2025 13:42:15 +0000 Message-ID: <20250710134215.97840-5-sergey.temerkhanov@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250710134215.97840-1-sergey.temerkhanov@intel.com> References: <20250710134215.97840-1-sergey.temerkhanov@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Call the notifier callbacks installed by the device drivers when failing IOMMU page faults occur during the SVA mode operation. Signed-off-by: Sergey Temerkhanov Reviewed-by: Andy Shevchenko --- drivers/iommu/iommu-sva.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/iommu-sva.c b/drivers/iommu/iommu-sva.c index 1a51cfd82808..18b6d9b02899 100644 --- a/drivers/iommu/iommu-sva.c +++ b/drivers/iommu/iommu-sva.c @@ -256,11 +256,19 @@ iommu_sva_handle_mm(struct iommu_fault *fault, struct= mm_struct *mm) return status; } =20 +static struct iommu_rid_notifier *iommu_get_rid_notifier(struct device *de= v, u32 rid) +{ + struct dev_iommu *param =3D dev->iommu; + + return xa_load(¶m->rid_notifiers, rid); +} + static void iommu_sva_handle_iopf(struct work_struct *work) { struct iopf_fault *iopf; struct iopf_group *group; enum iommu_page_response_code status =3D IOMMU_PAGE_RESP_SUCCESS; + struct iommu_rid_notifier *rid_notifier; =20 group =3D container_of(work, struct iopf_group, work); list_for_each_entry(iopf, &group->faults, list) { @@ -268,8 +276,17 @@ static void iommu_sva_handle_iopf(struct work_struct *= work) * For the moment, errors are sticky: don't handle subsequent * faults in the group if there is an error. */ - if (status !=3D IOMMU_PAGE_RESP_SUCCESS) + if (status !=3D IOMMU_PAGE_RESP_SUCCESS) { + /* Notify the requester of a failure. */ + rid_notifier =3D iommu_get_rid_notifier(group->fault_param->dev, + iopf->fault.prm.rid); + + if (rid_notifier && rid_notifier->notifier) + rid_notifier->notifier(rid_notifier->dev, &iopf->fault, + status, rid_notifier->data); + break; + } =20 status =3D iommu_sva_handle_mm(&iopf->fault, group->attach_handle->domain->mm); --=20 2.43.0