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(ksk4725@coasia.com@115.23.218.194) by 192.168.10.159 with ESMTP; 10 Jul 2025 09:21:08 +0900 X-Original-SENDERIP: 115.23.218.194 X-Original-SENDERCOUNTRY: KR, South Korea X-Original-MAILFROM: ksk4725@coasia.com X-Original-RCPTTO: jesper.nilsson@axis.com, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, krzk@kernel.org, s.nawrocki@samsung.com, cw00.choi@samsung.com, alim.akhtar@samsung.com, linus.walleij@linaro.org, tomasz.figa@gmail.com, catalin.marinas@arm.com, will@kernel.org, arnd@arndb.de, ravi.patel@samsung.com, ksk4725@coasia.com, smn1196@coasia.com, kenkim@coasia.com, pjsin865@coasia.com, gwk1013@coasia.com, hgkim05@coasia.com, mingyoungbo@coasia.com, pankaj.dubey@samsung.com, shradha.t@samsung.com, inbaraj.e@samsung.com, swathi.ks@samsung.com, hrishikesh.d@samsung.com, dj76.yang@samsung.com, hypmean.kim@samsung.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@axis.com, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, soc@lists.linux.dev From: ksk4725@coasia.com To: Jesper Nilsson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Krzysztof Kozlowski , Sylwester Nawrocki , Chanwoo Choi , Alim Akhtar , Linus Walleij , Tomasz Figa , Catalin Marinas , Will Deacon , Arnd Bergmann , Ravi Patel , SeonGu Kang , SungMin Park Cc: kenkim , Jongshin Park , GunWoo Kim , HaGyeong Kim , GyoungBo Min , Pankaj Dubey , Shradha Todi , Inbaraj E , Swathi K S , Hrishikesh , Dongjin Yang , Sang Min Kim , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@axis.com, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, soc@lists.linux.dev Subject: [PATCH 15/16] arm64: dts: axis: Add initial pinctrl support Date: Thu, 10 Jul 2025 09:20:45 +0900 Message-Id: <20250710002047.1573841-16-ksk4725@coasia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250710002047.1573841-1-ksk4725@coasia.com> References: <20250710002047.1573841-1-ksk4725@coasia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: SeonGu Kang Add initial pin configuration nodes for the Axis ARTPEC-8 SoC. Signed-off-by: Ravi Patel Signed-off-by: SeonGu Kang --- arch/arm64/boot/dts/axis/artpec-pinctrl.h | 36 ++ arch/arm64/boot/dts/axis/artpec8-grizzly.dts | 1 + arch/arm64/boot/dts/axis/artpec8-pinctrl.dtsi | 373 ++++++++++++++++++ arch/arm64/boot/dts/axis/artpec8.dtsi | 17 + 4 files changed, 427 insertions(+) create mode 100644 arch/arm64/boot/dts/axis/artpec-pinctrl.h create mode 100644 arch/arm64/boot/dts/axis/artpec8-pinctrl.dtsi diff --git a/arch/arm64/boot/dts/axis/artpec-pinctrl.h b/arch/arm64/boot/dt= s/axis/artpec-pinctrl.h new file mode 100644 index 000000000000..c2c1e25b7f6a --- /dev/null +++ b/arch/arm64/boot/dts/axis/artpec-pinctrl.h @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Axis ARTPEC-8 SoC device tree pinctrl constants + * + * Copyright (c) 2022-2025 Samsung Electronics Co., Ltd. + * https://www.samsung.com + * Copyright (c) 2022-2025 Axis Communications AB. + * https://www.axis.com + */ + +#ifndef __DTS_ARM64_AXIS_ARTPEC_PINCTRL_H__ +#define __DTS_ARM64_AXIS_ARTPEC_PINCTRL_H__ + +#define ARTPEC_PIN_PULL_NONE 0 +#define ARTPEC_PIN_PULL_DOWN 1 +#define ARTPEC_PIN_PULL_UP 3 + +#define ARTPEC_PIN_FUNC_INPUT 0 +#define ARTPEC_PIN_FUNC_OUTPUT 1 +#define ARTPEC_PIN_FUNC_2 2 +#define ARTPEC_PIN_FUNC_3 3 +#define ARTPEC_PIN_FUNC_4 4 +#define ARTPEC_PIN_FUNC_5 5 +#define ARTPEC_PIN_FUNC_6 6 +#define ARTPEC_PIN_FUNC_EINT 0xf +#define ARTPEC_PIN_FUNC_F ARTPEC_PIN_FUNC_EINT + +/* Drive strength for ARTPEC */ +#define ARTPEC_PIN_DRV_SR1 0x8 +#define ARTPEC_PIN_DRV_SR2 0x9 +#define ARTPEC_PIN_DRV_SR3 0xa +#define ARTPEC_PIN_DRV_SR4 0xb +#define ARTPEC_PIN_DRV_SR5 0xc +#define ARTPEC_PIN_DRV_SR6 0xd + +#endif /* __DTS_ARM64_AXIS_ARTPEC_PINCTRL_H__ */ diff --git a/arch/arm64/boot/dts/axis/artpec8-grizzly.dts b/arch/arm64/boot= /dts/axis/artpec8-grizzly.dts index 7671130a0333..f14420e76188 100644 --- a/arch/arm64/boot/dts/axis/artpec8-grizzly.dts +++ b/arch/arm64/boot/dts/axis/artpec8-grizzly.dts @@ -10,6 +10,7 @@ =20 /dts-v1/; #include "artpec8.dtsi" +#include "artpec8-pinctrl.dtsi" #include / { model =3D "ARTPEC-8 grizzly board"; diff --git a/arch/arm64/boot/dts/axis/artpec8-pinctrl.dtsi b/arch/arm64/boo= t/dts/axis/artpec8-pinctrl.dtsi new file mode 100644 index 000000000000..2d22a8be9d61 --- /dev/null +++ b/arch/arm64/boot/dts/axis/artpec8-pinctrl.dtsi @@ -0,0 +1,373 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Axis ARTPEC-8 SoC pin-mux and pin-config device tree source + * + * Copyright (c) 2022-2025 Samsung Electronics Co., Ltd. + * https://www.samsung.com + * Copyright (c) 2022-2025 Axis Communications AB. + * https://www.axis.com + */ + +#include "artpec-pinctrl.h" + +&pinctrl_fsys { + serial0_bus: serial0-bus-pins { + samsung,pins =3D "gpf4-4", "gpf4-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + qspi_clk: qspi-clk-pins { + samsung,pins =3D "gpf0-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + qspi_data: qspi-data-pins { + samsung,pins =3D "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + gpf0: gpf0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpf1: gpf1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpf2: gpf2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpf3: gpf3-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpf4: gpf4-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpe0: gpe0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpe1: gpe1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpe2: gpe2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gps0: gps0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gps1: gps1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + hsi2c0_bus: hsi2c0-bus-pins { + samsung,pins =3D "gpf4-0", "gpf4-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c1_bus: hsi2c1-bus-pins { + samsung,pins =3D "gpf4-2", "gpf4-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + pwm0_out: pwm0-out-pins { + samsung,pins =3D "gpf3-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + pwm1_out: pwm1-out-pins { + samsung,pins =3D "gpf3-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + pwm2_out: pwm2-out-pins { + samsung,pins =3D "gpf3-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + pwm3_out: pwm3-out-pins { + samsung,pins =3D "gpf3-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + mmc0_clk: mmc0-clk-pins { + samsung,pins =3D "gps0-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + mmc0_bus: mmc0-bus-pins { + samsung,pins =3D "gps0-1", "gps0-2", "gps0-3", "gps0-4", "gps0-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + mmc0_cd: mmc0-cd-pins { + samsung,pins =3D "gps0-6"; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + mmc0_wp: mmc0-wp-pins { + samsung,pins =3D "gps0-7"; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + mmc0_rst: mmc0-rst-pins { + samsung,pins =3D "gps0-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + mmc1_clk: mmc1-clk-pins { + samsung,pins =3D "gps1-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + mmc1_bus: mmc1-bus-pins { + samsung,pins =3D "gps1-1", "gps1-2", "gps1-3", "gps1-4", "gps1-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + mmc1_cd: mmc1-cd-pins { + samsung,pins =3D "gps1-6"; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + mmc1_wp: mmc1-wp-pins { + samsung,pins =3D "gps1-7"; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + mmc1_rst: mmc1-rst-pins { + samsung,pins =3D "gps1-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + eth_gpio: eth-gpio-pins { + samsung,pins =3D "gpe1-0", "gpe1-1", "gpe1-2", "gpe1-3", "gpe1-4", + "gpe1-5", "gpe1-6", "gpe1-7", "gpe0-0", "gpe0-1", + "gpe0-2", "gpe0-3", "gpe0-4", "gpe0-5", "gpe0-6", + "gpe0-7", "gpe2-1"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + eth_mdio: eth-mdio-pins { + samsung,pins =3D "gpe2-0"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + eth_ref_clk: eth-ref-clk-pins { + samsung,pins =3D "gpe2-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + eth_gtx_clk: eth-gtx-clk-pins { + samsung,pins =3D "gpe2-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + eth_phy_intr: eth-phy-intr-pins { + samsung,pins =3D "gpe2-4"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + eth_pps: eth-pps-pins { + samsung,pins =3D "gpf4-6"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sfmc_ctrl: sfmc-ctrl-pins { + samsung,pins =3D "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3", + "gpf0-4", "gpf1-0", "gpf1-1", "gpf1-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + sfmc_io: sfmc-io-pins { + samsung,pins =3D "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3", "gpf2-4", + "gpf2-5", "gpf2-6", "gpf2-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; +}; + +&pinctrl_peric { + serial1_bus: serial1-bus-pins { + samsung,pins =3D "gpa2-0", "gpa2-1", "gpa2-2", "gpa2-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + serial2_bus: serial2-bus-pins { + samsung,pins =3D "gpa2-4", "gpa2-5", "gpa2-6", "gpa2-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi0_bus: spi0-bus-pins { + samsung,pins =3D "gpa0-0", "gpa0-1", "gpa0-2", "gpa0-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + spi0_bus_nocs: spi0-bus-nocs-pins { + samsung,pins =3D "gpa0-0", "gpa0-1", "gpa0-2"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + gpa0: gpa0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpa1: gpa1-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpa2: gpa2-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + gpk0: gpk0-gpio-bank { + gpio-controller; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + i2s0_bus: i2s0-bus-pins { + samsung,pins =3D "gpa1-4", "gpa1-5", "gpa1-6", "gpa1-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + i2s0_idle: i2s0-idle-pins { + samsung,pins =3D "gpa1-4", "gpa1-5", "gpa1-6", "gpa1-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + i2s1_bus: i2s1-bus-pins { + samsung,pins =3D "gpa1-0", "gpa1-1", "gpa1-2", "gpa1-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + i2s1_idle: i2s1-idle-pins { + samsung,pins =3D "gpa1-0", "gpa1-1", "gpa1-2", "gpa1-3"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c2_bus: hsi2c2-bus-pins { + samsung,pins =3D "gpa0-6", "gpa0-7"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; + + hsi2c3_bus: hsi2c3-bus-pins { + samsung,pins =3D "gpa0-4", "gpa0-5"; + samsung,pin-function =3D ; + samsung,pin-pud =3D ; + samsung,pin-drv =3D ; + }; +}; diff --git a/arch/arm64/boot/dts/axis/artpec8.dtsi b/arch/arm64/boot/dts/ax= is/artpec8.dtsi index 296192560adf..9c2afbac75b9 100644 --- a/arch/arm64/boot/dts/axis/artpec8.dtsi +++ b/arch/arm64/boot/dts/axis/artpec8.dtsi @@ -17,6 +17,11 @@ / { #address-cells =3D <2>; #size-cells =3D <2>; =20 + aliases { + pinctrl0 =3D &pinctrl_fsys; + pinctrl1 =3D &pinctrl_peric; + }; + cpus { #address-cells =3D <1>; #size-cells =3D <0>; @@ -237,6 +242,18 @@ cmu_peri: clock-controller@16410000 { status =3D "disabled"; }; =20 + pinctrl_fsys: pinctrl@16c30000 { + compatible =3D "axis,artpec8-pinctrl"; + reg =3D <0x16c30000 0x1000>; + interrupts =3D ; + }; + + pinctrl_peric: pinctrl@165f0000 { + compatible =3D "axis,artpec8-pinctrl"; + reg =3D <0x165f0000 0x1000>; + interrupts =3D ; + }; + serial_0: serial@16cc0000 { compatible =3D "axis,artpec8-uart"; reg =3D <0x16cc0000 0x100>; --=20 2.34.1