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This enhancement allows for more flexible and efficient management of resources. The PF takes on a supervisory role and will have bootup information such as SAHARA, DIAG, and NDB (for file system sync data, etc.). VFs can handle resources associated with the main data movement of the Function are available to the SI (system image) as per PCIe SRIOV spec (rev 0.9 1.Architectural overview) Signed-off-by: Vivek Pernamitta Reviewed-by: Krishna Chaitanya Chundru --- drivers/bus/mhi/host/pci_generic.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_= generic.c index 5c01c23d0bcfedd23f975e99845d5fa88940ccde..7d0ac1c34ddf95ace2a85e5f088= 84f51604d9b0f 100644 --- a/drivers/bus/mhi/host/pci_generic.c +++ b/drivers/bus/mhi/host/pci_generic.c @@ -34,6 +34,7 @@ /** * struct mhi_pci_dev_info - MHI PCI device specific information * @config: MHI controller configuration + * @vf_config: MHI controller configuration for Virtual function (optional) * @name: name of the PCI module * @fw: firmware path (if any) * @edl: emergency download mode firmware path (if any) @@ -47,6 +48,7 @@ */ struct mhi_pci_dev_info { const struct mhi_controller_config *config; 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Therefore, read the PCIe SUBSYSTEM_VENDOR_ID to check if the device is active. Signed-off-by: Vivek Pernamitta Reviewed-by: Krishna Chaitanya Chundru --- drivers/bus/mhi/host/pci_generic.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_= generic.c index 7d0ac1c34ddf95ace2a85e5f08884f51604d9b0f..4bafe93b56c54e2b091786e7fcd= 68a36c8247b8e 100644 --- a/drivers/bus/mhi/host/pci_generic.c +++ b/drivers/bus/mhi/host/pci_generic.c @@ -1025,8 +1025,10 @@ static bool mhi_pci_is_alive(struct mhi_controller *= mhi_cntrl) struct pci_dev *pdev =3D to_pci_dev(mhi_cntrl->cntrl_dev); u16 vendor =3D 0; =20 - if (pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor)) - return false; + if (pdev->is_virtfn) + pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &vendor); + else + pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor); =20 if (vendor =3D=3D (u16) ~0 || vendor =3D=3D 0) return false; --=20 2.34.1 From nobody Tue Oct 7 11:57:24 2025 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C7B7E2D12E7; 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To achieve this, the host driver will perform the following steps: 1. Disable SRIOV for any SRIOV-enabled devices on the Physical Function. 2. Perform a SOC_RESET on Physical Function (PF). Disabling SRIOV ensures that all virtual functions are properly shut down, preventing any potential issues during the reset process. Performing SOC_RESET on each physical function guarantees that the device is fully reset and ready for subsequent operations. Signed-off-by: Vivek Pernamitta --- drivers/bus/mhi/host/pci_generic.c | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_= generic.c index 4bafe93b56c54e2b091786e7fcd68a36c8247b8e..2d1381006293412fbc593316e5c= 7f0f59ac74da8 100644 --- a/drivers/bus/mhi/host/pci_generic.c +++ b/drivers/bus/mhi/host/pci_generic.c @@ -45,6 +45,8 @@ * @sideband_wake: Devices using dedicated sideband GPIO for wakeup instead * of inband wake support (such as sdx24) * @no_m3: M3 not supported + * @reset_on_driver_unbind: Set true for devices support SOC reset and + * perform it when unbinding driver */ struct mhi_pci_dev_info { const struct mhi_controller_config *config; @@ -58,6 +60,7 @@ struct mhi_pci_dev_info { unsigned int mru_default; bool sideband_wake; bool no_m3; + bool reset_on_driver_unbind; }; =20 #define MHI_CHANNEL_CONFIG_UL(ch_num, ch_name, el_count, ev_ring) \ @@ -300,6 +303,7 @@ static const struct mhi_pci_dev_info mhi_qcom_qdu100_in= fo =3D { .dma_data_width =3D 32, .sideband_wake =3D false, .no_m3 =3D true, + .reset_on_driver_unbind =3D true, }; =20 static const struct mhi_channel_config mhi_qcom_sa8775p_channels[] =3D { @@ -970,6 +974,7 @@ struct mhi_pci_device { struct work_struct recovery_work; struct timer_list health_check_timer; unsigned long status; + bool reset_on_driver_unbind; }; =20 static int mhi_pci_read_reg(struct mhi_controller *mhi_cntrl, @@ -1270,6 +1275,11 @@ static int mhi_pci_probe(struct pci_dev *pdev, const= struct pci_device_id *id) mhi_cntrl->mru =3D info->mru_default; mhi_cntrl->name =3D info->name; =20 + /* Assign reset functionalities only for PF */ + if (pdev->is_physfn) + mhi_pdev->reset_on_driver_unbind =3D info->reset_on_driver_unbind; + + if (info->edl_trigger) mhi_cntrl->edl_trigger =3D mhi_pci_generic_edl_trigger; =20 @@ -1336,7 +1346,7 @@ static int mhi_pci_probe(struct pci_dev *pdev, const = struct pci_device_id *id) return err; } =20 -static void mhi_pci_remove(struct pci_dev *pdev) +static void mhi_pci_resource_deinit(struct pci_dev *pdev) { struct mhi_pci_device *mhi_pdev =3D pci_get_drvdata(pdev); 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Thu, 10 Jul 2025 08:59:08 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 56A8x8ps009866 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 10 Jul 2025 08:59:08 GMT Received: from hu-vpernami-hyd.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Thu, 10 Jul 2025 01:59:06 -0700 From: Vivek.Pernamitta@quicinc.com Date: Thu, 10 Jul 2025 14:28:35 +0530 Subject: [PATCH v2 4/5] bus: mhi: host: pci_generic: Add SRIOV support for PCIe device Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20250710-sriov_vdev_next-20250630-v2-4-4bd862b822e8@quicinc.com> References: <20250710-sriov_vdev_next-20250630-v2-0-4bd862b822e8@quicinc.com> In-Reply-To: <20250710-sriov_vdev_next-20250630-v2-0-4bd862b822e8@quicinc.com> To: Manivannan Sadhasivam CC: , , , Vivek Pernamitta , Krishna Chaitanya Chundru X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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Signed-off-by: Vivek Pernamitta Reviewed-by: Krishna Chaitanya Chundru --- drivers/bus/mhi/host/pci_generic.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_= generic.c index 2d1381006293412fbc593316e5c7f0f59ac74da8..a64b5c365c920ef2edfebc994e8= 2d6385ad7ddbd 100644 --- a/drivers/bus/mhi/host/pci_generic.c +++ b/drivers/bus/mhi/host/pci_generic.c @@ -1640,7 +1640,8 @@ static struct pci_driver mhi_pci_driver =3D { .remove =3D mhi_pci_remove, .shutdown =3D mhi_pci_shutdown, .err_handler =3D &mhi_pci_err_handler, - .driver.pm =3D &mhi_pci_pm_ops + .driver.pm =3D &mhi_pci_pm_ops, + .sriov_configure =3D pci_sriov_configure_simple }; module_pci_driver(mhi_pci_driver); =20 --=20 2.34.1 From nobody Tue Oct 7 11:57:24 2025 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E74BD2D3A66; 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If there is any SYS_ERR, sys_err handler needs to process SYS_ERR state and queues the next state transition for device to bring in to Mission mode, so mhi_sync_power_up() needs to wait for device to enter in to mission mode. Signed-off-by: Vivek Pernamitta --- drivers/bus/mhi/host/internal.h | 2 ++ drivers/bus/mhi/host/pm.c | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/bus/mhi/host/internal.h b/drivers/bus/mhi/host/interna= l.h index 1054e67bb450d2634771d092ed42bbdd63380472..1aec3bb68f9712f5476b0fc3efd= 8b2efc4d745dc 100644 --- a/drivers/bus/mhi/host/internal.h +++ b/drivers/bus/mhi/host/internal.h @@ -170,6 +170,8 @@ enum mhi_pm_state { MHI_PM_IN_ERROR_STATE(pm_state)) #define MHI_PM_IN_SUSPEND_STATE(pm_state) (pm_state & \ (MHI_PM_M3_ENTER | MHI_PM_M3)) +#define MHI_PM_IN_UNRECOVERABLE_ERROR(pm_state) ((pm_state =3D=3D MHI_PM_= FW_DL_ERR) || \ + (pm_state >=3D MHI_PM_SYS_ERR_FAIL)) =20 #define NR_OF_CMD_RINGS 1 #define CMD_EL_PER_RING 128 diff --git a/drivers/bus/mhi/host/pm.c b/drivers/bus/mhi/host/pm.c index 2af34980e14250cada75c981b690bc9581715212..fc9713d4021571aebd995a4524e= afbcf0128fbd1 100644 --- a/drivers/bus/mhi/host/pm.c +++ b/drivers/bus/mhi/host/pm.c @@ -1280,7 +1280,7 @@ int mhi_sync_power_up(struct mhi_controller *mhi_cntr= l) mhi_cntrl->ready_timeout_ms : mhi_cntrl->timeout_ms; wait_event_timeout(mhi_cntrl->state_event, MHI_IN_MISSION_MODE(mhi_cntrl->ee) || - MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state), + MHI_PM_IN_UNRECOVERABLE_ERROR(mhi_cntrl->pm_state), msecs_to_jiffies(timeout_ms)); =20 ret =3D (MHI_IN_MISSION_MODE(mhi_cntrl->ee)) ? 0 : -ETIMEDOUT; --=20 2.34.1