From nobody Tue Oct 7 09:59:55 2025 Received: from sendmail.purelymail.com (sendmail.purelymail.com [34.202.193.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2AAF12AE6D for ; Thu, 10 Jul 2025 16:50:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=34.202.193.197 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752166257; cv=none; b=Iiw9DWzMYdAGR1Zun7blqG1NSmZ1+BflJoORlFj/MaeeL9eroVz/wrWzJPErD3plziwMNFyWr4AlH64U6CCybC8B4EejRABWrMcguIOlfTrntwt6ysasqhKbpusmZ9IeQZXn4lQsIwfUI9g6Ephaw0cGlhgAOM1EnVmFkaZcA0s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752166257; c=relaxed/simple; bh=qgDOk7ldMzPb3j2kj6nz6o9DIKmpFktmmEBU5U0AflM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=khGy9J2JSRlhdQMbPGZb5GXFSIlemuz4Itld/lRoqEinTiDlMQofiWHucpzb4OJV2OUGfuS9dSFJw1L61kfqebx4E4zDtg9zbdZB8hOul6QyArm7Y8PosGCJCdglGuDzn4MBW7yxBLH2rciJ4jR7xrcXyr7iEFFBIht0S7VTnp0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=mentallysanemainliners.org; spf=pass smtp.mailfrom=mentallysanemainliners.org; dkim=pass (2048-bit key) header.d=purelymail.com header.i=@purelymail.com header.b=yr1VZsHW; arc=none smtp.client-ip=34.202.193.197 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=mentallysanemainliners.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mentallysanemainliners.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=purelymail.com header.i=@purelymail.com header.b="yr1VZsHW" Authentication-Results: purelymail.com; auth=pass DKIM-Signature: a=rsa-sha256; b=yr1VZsHW5SQCQIIlRD1O/QABdYfwUduqWaeNDoXHCtUPn3jNua3EZ2A1G0q+q7T2xGV7sIqZ8Vyr3WacaJb2ypMEyb3TvmP+LQdlYMzpMieWizKCVtABMsGrS7nj4oqagzkhg/TeduHxiXV5wUpz9wwg5F+5cOZqviL0CvGLLX/qgAPYe9vYj2ljpe/CybKEZk1vYzhMRYlzQLCOi/4NdrCPOifnHv9BSEcXSnMQwKhZrbPMw3740/dyscbzQjxR1xgs8E6730UJSxfZ834nSpJgld1HI4j+EaAbOumz+pVwvqQfJd3ATlviYuTaM0vLi9akwFW0/aIJ9/y1sR/CCw==; s=purelymail3; d=purelymail.com; v=1; bh=qgDOk7ldMzPb3j2kj6nz6o9DIKmpFktmmEBU5U0AflM=; h=Feedback-ID:Received:From:Date:Subject:To; Feedback-ID: 68247:10037:null:purelymail X-Pm-Original-To: linux-kernel@vger.kernel.org Received: by smtp.purelymail.com (Purelymail SMTP) with ESMTPSA id -1992400030; (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384); Thu, 10 Jul 2025 16:50:38 +0000 (UTC) From: Igor Belwon Date: Thu, 10 Jul 2025 18:50:05 +0200 Subject: [PATCH v2 1/5] arm64: dts: exynos990: Enable watchdog timer Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250710-resends-july-exynos990-dt-v2-1-55033f73d1b0@mentallysanemainliners.org> References: <20250710-resends-july-exynos990-dt-v2-0-55033f73d1b0@mentallysanemainliners.org> In-Reply-To: <20250710-resends-july-exynos990-dt-v2-0-55033f73d1b0@mentallysanemainliners.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Igor Belwon X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1752166235; l=1586; i=igor.belwon@mentallysanemainliners.org; s=20241206; h=from:subject:message-id; bh=qgDOk7ldMzPb3j2kj6nz6o9DIKmpFktmmEBU5U0AflM=; b=9qFXpEjI+WZVRilJjhfPmfCZjpMfpoLtD75VFJKNM0oiOQEvFSCenhkoQQn8JIJ64HAbswOBF m6SH9JcQNL+AhCaILDvgxnI86mOLokQ6Dbl6s2QlcYjWehE/3l69qGL X-Developer-Key: i=igor.belwon@mentallysanemainliners.org; a=ed25519; pk=qKAuSTWKTaGQM0vwBxV0p6hPKMN4vh0CwZ+bozrG5lY= Enable the two watchdog timer clusters (cl0, cl2) present on the Exynos990 SoC. Signed-off-by: Igor Belwon --- arch/arm64/boot/dts/exynos/exynos990.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynos990.dtsi b/arch/arm64/boot/dt= s/exynos/exynos990.dtsi index dd7f99f51a75412f5c3b91c3425a63652546fa5e..4446a1a54ba2de56879353c9c4a= 898b1d697fc13 100644 --- a/arch/arm64/boot/dts/exynos/exynos990.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos990.dtsi @@ -211,6 +211,30 @@ timer@10040000 { ; }; =20 + watchdog_cl0: watchdog@10050000 { + compatible =3D "samsung,exynos990-wdt"; + reg =3D <0x10050000 0x100>; + interrupts =3D ; + clocks =3D <&cmu_peris CLK_GOUT_PERIS_WDT_CLUSTER0_PCLK>, + <&oscclk>; + clock-names =3D "watchdog", + "watchdog_src"; + samsung,syscon-phandle =3D <&pmu_system_controller>; + samsung,cluster-index =3D <0>; + }; + + watchdog_cl2: watchdog@10060000 { + compatible =3D "samsung,exynos990-wdt"; + reg =3D <0x10060000 0x100>; + interrupts =3D ; + clocks =3D <&cmu_peris CLK_GOUT_PERIS_WDT_CLUSTER2_PCLK>, + <&oscclk>; + clock-names =3D "watchdog", + "watchdog_src"; + samsung,syscon-phandle =3D <&pmu_system_controller>; + samsung,cluster-index =3D <2>; + }; + gic: interrupt-controller@10101000 { compatible =3D "arm,gic-400"; reg =3D <0x10101000 0x1000>, --=20 2.47.2 From nobody Tue Oct 7 09:59:55 2025 Received: from sendmail.purelymail.com (sendmail.purelymail.com [34.202.193.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B15ED2F0038 for ; Thu, 10 Jul 2025 16:50:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=34.202.193.197 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752166260; cv=none; b=NrfixQ/Gu5vQYBl7+X8dATOoNGpMqFcIgHQZLSNDeDHyZQYz+z3XWb160+Utw6LsvrAIXhe22bnki5gwHGNXFLvhy3xNihZvbHzKHZEl/jM6TPuHDlT+6W4Omf3U654WCsjCzlKyUzlmtWDnhcX7mgWG+pd6SWjjyot3tTJawFw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; 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auth=pass DKIM-Signature: a=rsa-sha256; b=hA57riP9ilplNUC9lxhigzrnbuJoTuzqGA+Pf1dsLsG4sJFE6rPayh1SBGcND7paED7Zu6l/P/7/F4nXflqnFxBKA5bflQYCio8GaejZOvqaPU0sNnZ+ccgOtww5U3544sUn5aQTMmYyqvZaXMQzBAv4PdvuZg7v8Y+QUIirNYn7xbjQmjsdyMxB99QWBysmhg30BcIjWqX51DByNgLZ0M90VO1FsvOaXhXj0Y7Ze/xhcyHNa5rAP6gCQUiR5azKMCj19weRzYckd0qQkf6NCVhyzV5N/aNjHzyAYz1SePN2SyGDldYw91hbH8K5wvrLvFJQ2EV+XGU0DTrnPswo+Q==; s=purelymail3; d=purelymail.com; v=1; bh=1/lgcU6J91Nah6llXW2IKKlaxLEotdEdEftqQWx/RQk=; h=Feedback-ID:Received:From:Date:Subject:To; Feedback-ID: 68247:10037:null:purelymail X-Pm-Original-To: linux-kernel@vger.kernel.org Received: by smtp.purelymail.com (Purelymail SMTP) with ESMTPSA id -1992400030; (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384); Thu, 10 Jul 2025 16:50:39 +0000 (UTC) From: Igor Belwon Date: Thu, 10 Jul 2025 18:50:06 +0200 Subject: [PATCH v2 2/5] arm64: dts: exynos990: Add USB nodes Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250710-resends-july-exynos990-dt-v2-2-55033f73d1b0@mentallysanemainliners.org> References: <20250710-resends-july-exynos990-dt-v2-0-55033f73d1b0@mentallysanemainliners.org> In-Reply-To: <20250710-resends-july-exynos990-dt-v2-0-55033f73d1b0@mentallysanemainliners.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Igor Belwon X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1752166235; l=1950; i=igor.belwon@mentallysanemainliners.org; s=20241206; h=from:subject:message-id; bh=1/lgcU6J91Nah6llXW2IKKlaxLEotdEdEftqQWx/RQk=; b=gNdTB+SazTGvUEOySHF1DzzjAQr3SsdgnqbRRzof8PUYQnaio5ON375X3MrWNhmc7Zsj4eNwa VGjsC/VeyutDl3Ja5I/egjjgQ6wh4tSkmW0HGlxxTXTycIsGd42jq36 X-Developer-Key: i=igor.belwon@mentallysanemainliners.org; a=ed25519; pk=qKAuSTWKTaGQM0vwBxV0p6hPKMN4vh0CwZ+bozrG5lY= Add USB controller and USB PHY controller nodes for use in the Exynos990 SoC. This SoC supports USB full-speed, high-speed and super-speed modes. Due to the inability to test PIPE3, USB super-speed is not enabled, and the USB PHY is only configured for UTMI+ operation for now. Signed-off-by: Igor Belwon --- arch/arm64/boot/dts/exynos/exynos990.dtsi | 31 +++++++++++++++++++++++++++= ++++ 1 file changed, 31 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynos990.dtsi b/arch/arm64/boot/dt= s/exynos/exynos990.dtsi index 4446a1a54ba2de56879353c9c4a898b1d697fc13..bd5e086ac46d3010ace413e2eeb= 2cd30d7f7672c 100644 --- a/arch/arm64/boot/dts/exynos/exynos990.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos990.dtsi @@ -278,6 +278,37 @@ cmu_hsi0: clock-controller@10a00000 { "dpgtc"; }; =20 + usbdrd_phy: phy@10c00000 { + compatible =3D "samsung,exynos990-usbdrd-phy"; + reg =3D <0x10c00000 0x100>; + clocks =3D <&cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_ACLK_PHYCTRL>, + <&oscclk>; + clock-names =3D "phy", "ref"; + samsung,pmu-syscon =3D <&pmu_system_controller>; + #phy-cells =3D <1>; + status =3D "disabled"; + }; + + usbdrd: usb@10e00000 { + compatible =3D "samsung,exynos990-dwusb3", + "samsung,exynos850-dwusb3"; + ranges =3D <0x0 0x10e00000 0x10000>; + clocks =3D <&cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_BUS_CLK_EARLY>, + <&cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_USB31DRD_REF_CLK_40>; + clock-names =3D "bus_early", "ref"; + #address-cells =3D <1>; + #size-cells =3D <1>; + status =3D "disabled"; + + usbdrd_dwc3: usb@0 { + compatible =3D "snps,dwc3"; + reg =3D <0x0 0x10000>; + interrupts =3D ; + phys =3D <&usbdrd_phy 0>; + phy-names =3D "usb2-phy"; + }; + }; + pinctrl_hsi1: pinctrl@13040000 { compatible =3D "samsung,exynos990-pinctrl"; reg =3D <0x13040000 0x1000>; --=20 2.47.2 From nobody Tue Oct 7 09:59:55 2025 Received: from sendmail.purelymail.com (sendmail.purelymail.com [34.202.193.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D46D8285062 for ; Thu, 10 Jul 2025 16:50:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=34.202.193.197 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752166259; cv=none; b=DM7mYfd0hducyn76aUXeJWStY6fCRpgcAGPgr75T4V2PQOa6OpVYSzo5pnTzvcvTpeFmk/Z31jT+QbZgwtGWcaWovXMTKVdEVSls9XPwgUFaCOoponnqCSwOfNbwH1Gl2lkXBhpwk4fgceeabyg6mLl8QlVq/1brCnKM1XBVgfw= ARC-Message-Signature: i=1; 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auth=pass DKIM-Signature: a=rsa-sha256; b=L76XS+hKOD8ApKRkKj8a913AobIqyRrLPXK1bGS+OfVWOFrcoIZgE69W7luqJZu5heDPAnc01EOKmhaMlZ/BNO/LAX4qJx7ooFdaFKrGuQ1RMhtVZGxaEnIjAgkTWgZx0s0vgKBKDDlS6CdCo6emKCm30bsmFyc6kqomBIWaRTCx58OKPVtsLrH1Dr6iQV1WTz64crkcL04nK5EGA4eMxA5aSra/asG8juTGrrlrKBummXm4YVFxmIujkaL32CvXgh4F5HC+zxvPUwFSw3KAGO+zUmPBySDKUmLKVYMhy73bU6E22HZaso0u217jROgSTWT1ow/djKTxqg+C7P+/Vg==; s=purelymail3; d=purelymail.com; v=1; bh=d90e+aG/dLPhZ45Wax0yq+hKJxVgTdMsCYq09/QZQ0s=; h=Feedback-ID:Received:From:Date:Subject:To; Feedback-ID: 68247:10037:null:purelymail X-Pm-Original-To: linux-kernel@vger.kernel.org Received: by smtp.purelymail.com (Purelymail SMTP) with ESMTPSA id -1992400030; (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384); Thu, 10 Jul 2025 16:50:41 +0000 (UTC) From: Igor Belwon Date: Thu, 10 Jul 2025 18:50:07 +0200 Subject: [PATCH v2 3/5] arm64: dts: exynos990-x1s-common: Enable USB Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250710-resends-july-exynos990-dt-v2-3-55033f73d1b0@mentallysanemainliners.org> References: <20250710-resends-july-exynos990-dt-v2-0-55033f73d1b0@mentallysanemainliners.org> In-Reply-To: <20250710-resends-july-exynos990-dt-v2-0-55033f73d1b0@mentallysanemainliners.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Igor Belwon X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1752166235; l=1301; i=igor.belwon@mentallysanemainliners.org; s=20241206; h=from:subject:message-id; bh=d90e+aG/dLPhZ45Wax0yq+hKJxVgTdMsCYq09/QZQ0s=; b=DJQ55NTYx9pLwW/yp6Ykfs9HFU1x2wgbHI33WReelNFvAhuJcejHgP/Lxg4gUwKeQKZrFCNmO iK+FJOhdMw4CgCCEj3C/yGuZFPZOknIFosUVBCF3Hkp1j7soO0Zlcv8 X-Developer-Key: i=igor.belwon@mentallysanemainliners.org; a=ed25519; pk=qKAuSTWKTaGQM0vwBxV0p6hPKMN4vh0CwZ+bozrG5lY= The x1s family uses a shared USB configuration. Enable both the USB PHY as well as the DWC3 controller. Since we do not have any PMIC for USB implemented yet, use dummy regulators until we do. Signed-off-by: Igor Belwon --- arch/arm64/boot/dts/exynos/exynos990-x1s-common.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynos990-x1s-common.dtsi b/arch/ar= m64/boot/dts/exynos/exynos990-x1s-common.dtsi index 55fa8e9e05db8af51109d20d74cbd7b9a2af38df..7b97220cccb7442dbc5a9f31ae9= b9124bee85c62 100644 --- a/arch/arm64/boot/dts/exynos/exynos990-x1s-common.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos990-x1s-common.dtsi @@ -27,6 +27,12 @@ framebuffer0: framebuffer@f1000000 { }; }; =20 + /* TODO: Remove this once PMIC is implemented */ + reg_dummy: regulator-0 { + compatible =3D "regulator-fixed"; + regulator-name =3D "dummy_reg"; + }; + reserved-memory { #address-cells =3D <2>; #size-cells =3D <2>; @@ -96,3 +102,13 @@ key_volup: key-volup-pins { samsung,pin-drv =3D ; }; }; + +&usbdrd { + status =3D "okay"; + vdd10-supply =3D <®_dummy>; + vdd33-supply =3D <®_dummy>; +}; + +&usbdrd_phy { + status =3D "okay"; +}; --=20 2.47.2 From nobody Tue Oct 7 09:59:55 2025 Received: from sendmail.purelymail.com (sendmail.purelymail.com [34.202.193.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BAC01279DB6 for ; Thu, 10 Jul 2025 16:50:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=34.202.193.197 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752166258; cv=none; b=XnagDHzhDmtNidLaD9rlY0IFLCiJxuSncZAPXEx0hShezoTui277Rlz9NTKBy6T/6CPLfBrYTgrccZd0iQtqfW3f2NzypdqeOeSN1mPZPTlfzCLgWJdRXUDm35W93kxdLiAjxcB5QsKpoRq58Whii6kIVoa1bpmLHsqErbhSYNE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752166258; c=relaxed/simple; bh=clxVsQKkrnR9wv8DKul25lTsvvLat2HJc7+oSMFkZlk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=gW5uXe0zwSaqyFhDAtJyco1KPx5VgzfGdSHxPwU6u5ub6reY0NdC6H9EZrwVOxw0WdGmEDmPLK3OsStftfqqpYrxSshXL3jU8Nj44GsMUh39n569VO9Pplqf/IRROzp9pR1KVI74IuPfqaFWsmVcjY4z9RN22fdH5M6FpPruUNg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=mentallysanemainliners.org; spf=pass smtp.mailfrom=mentallysanemainliners.org; dkim=pass (2048-bit key) header.d=purelymail.com header.i=@purelymail.com header.b=FGAvR0Vn; arc=none smtp.client-ip=34.202.193.197 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=mentallysanemainliners.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mentallysanemainliners.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=purelymail.com header.i=@purelymail.com header.b="FGAvR0Vn" Authentication-Results: purelymail.com; auth=pass DKIM-Signature: a=rsa-sha256; b=FGAvR0Vnmqx0SatLPRyP1DkZi8vetTQl0iHi7cvaP3dqxKoqaODOxKGZ3TXJCr0FqFQ3kSLJEE1ZR+4qTdzKyBPyBfx7FdnuBYrnmFH44iKaziy1Z/Ln9FYXP+nDEBIwwVhjEwS7PsZldvZu+ftDtvBG8MIJKB9fjwISGf54jrKbwCi9DwK5bspL9MhNdalGIz1y6XbBiOSnYNUcLGsajaXHl/65Ntwqs1YO9ZRr/OVzaMDSQgMu1wU06l9c2RLj9htcstW5XLLodMVc8rxVBqrUEM8/z91eHeh6DByTndbJsVYRJBbla7PYpM7Zq1ECUBbE0xvTUdVraLEc04PoOg==; s=purelymail3; d=purelymail.com; v=1; bh=clxVsQKkrnR9wv8DKul25lTsvvLat2HJc7+oSMFkZlk=; h=Feedback-ID:Received:From:Date:Subject:To; Feedback-ID: 68247:10037:null:purelymail X-Pm-Original-To: linux-kernel@vger.kernel.org Received: by smtp.purelymail.com (Purelymail SMTP) with ESMTPSA id -1992400030; (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384); Thu, 10 Jul 2025 16:50:42 +0000 (UTC) From: Igor Belwon Date: Thu, 10 Jul 2025 18:50:08 +0200 Subject: [PATCH v2 4/5] arm64: dts: exynos990-c1s: Enable USB Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250710-resends-july-exynos990-dt-v2-4-55033f73d1b0@mentallysanemainliners.org> References: <20250710-resends-july-exynos990-dt-v2-0-55033f73d1b0@mentallysanemainliners.org> In-Reply-To: <20250710-resends-july-exynos990-dt-v2-0-55033f73d1b0@mentallysanemainliners.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Igor Belwon X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1752166235; l=1236; i=igor.belwon@mentallysanemainliners.org; s=20241206; h=from:subject:message-id; bh=clxVsQKkrnR9wv8DKul25lTsvvLat2HJc7+oSMFkZlk=; b=1wJaa5+YsmwD3pHwjOLrqecSCac9cHVyVOiwr8MaubnbBiW/Q1ZK5LLvwSNZH2LMpiXp6HKnV XI2nZIreuHoABl5Fdy5UWiQW76M5E7tpBax81YEn+Wd8kT+KCD6jG3Q X-Developer-Key: i=igor.belwon@mentallysanemainliners.org; a=ed25519; pk=qKAuSTWKTaGQM0vwBxV0p6hPKMN4vh0CwZ+bozrG5lY= Enable both the USB PHY as well as the DWC3 controller nodes. Since we do not have any PMIC for USB implemented yet, use dummy regulators until we do. Signed-off-by: Igor Belwon --- arch/arm64/boot/dts/exynos/exynos990-c1s.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynos990-c1s.dts b/arch/arm64/boot= /dts/exynos/exynos990-c1s.dts index 36a6f1377e92b40716c606cceb752f642ae603e3..9f0ad4f9673a87b4d75f3c7d208= c8c37bb51fe2d 100644 --- a/arch/arm64/boot/dts/exynos/exynos990-c1s.dts +++ b/arch/arm64/boot/dts/exynos/exynos990-c1s.dts @@ -44,6 +44,12 @@ memory@80000000 { <0x8 0x80000000 0x1 0x7ec00000>; }; =20 + /* TODO: Remove this once PMIC is implemented */ + reg_dummy: regulator-0 { + compatible =3D "regulator-fixed"; + regulator-name =3D "dummy_reg"; + }; + reserved-memory { #address-cells =3D <2>; #size-cells =3D <2>; @@ -113,3 +119,13 @@ key_volup: key-volup-pins { samsung,pin-drv =3D ; }; }; + +&usbdrd { + status =3D "okay"; + vdd10-supply =3D <®_dummy>; + vdd33-supply =3D <®_dummy>; +}; + +&usbdrd_phy { + status =3D "okay"; +}; --=20 2.47.2 From nobody Tue Oct 7 09:59:55 2025 Received: from sendmail.purelymail.com (sendmail.purelymail.com [34.202.193.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 881282F0C76 for ; Thu, 10 Jul 2025 16:50:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=34.202.193.197 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752166265; cv=none; b=So2/poRcyGDPVot34loafKFaotBcvJPQuIaQ+FAG8TPdT8V1IvsLWEPT3ey99mzFhw8QjjYc6YIBEldJ5gdHXZgIVam09sXRP3HqvBFIUhI/c6CfwttDLKCffSR1X64qi4EugTJEpzGsZFtdbvinNVFSzazfRSLw+BwZr7vFRIg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752166265; c=relaxed/simple; bh=hknFIwkcGKVEGhAUgTXGLYiwzwz0RfRZ2lihmtn+v/I=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=SP7hG7MCB/nbIqpn75jZ+6godAtqF1b4y/H5O+JDvfWPiITmxhho7Alg0lMW6WaERlyYHoVttLCRNvsuVxQJijhoPtOJSskpMrUZ3wKqKjGx2YZxLT7aArh0tWkBaAgB+h6BfMI9REo5nDbh1MyEnRFQFTPd/r7yuUdPJDZ95Ig= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=mentallysanemainliners.org; spf=pass smtp.mailfrom=mentallysanemainliners.org; dkim=pass (2048-bit key) header.d=purelymail.com header.i=@purelymail.com header.b=h35GuMk5; arc=none smtp.client-ip=34.202.193.197 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=mentallysanemainliners.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mentallysanemainliners.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=purelymail.com header.i=@purelymail.com header.b="h35GuMk5" Authentication-Results: purelymail.com; auth=pass DKIM-Signature: a=rsa-sha256; b=h35GuMk5eju5NI5/LGJ7liDrab2T0HxDd6ftADlmxrt8ur1zxREEhR5xgaYzC8OFf0h1/SyErlgMTRwLLbx6TsGU1815dCZXYkDwau2jJAw8OEhk6oSKpOZHtyiyYuPh0VvLMot6Qh3t9FeGm03gkmlSz6HLzPCn6AJOY5/L+E2yvsAJ+kloB6yK5XexlPor7CyN7LWT2lZ1wOxZr30i0YiklDNgcTkdL8Wd56I/ognUVgZ/ATPDlz7CBW9j2aTQKcUtN0sjOgnq74vmBZa9gxNsim30x0keXp3UHa1JDtsy4Q/QUWYRKZm7Z92qXVpVYePYBbf60I74/mK7he2kBg==; s=purelymail3; d=purelymail.com; v=1; bh=hknFIwkcGKVEGhAUgTXGLYiwzwz0RfRZ2lihmtn+v/I=; h=Feedback-ID:Received:From:Date:Subject:To; Feedback-ID: 68247:10037:null:purelymail X-Pm-Original-To: linux-kernel@vger.kernel.org Received: by smtp.purelymail.com (Purelymail SMTP) with ESMTPSA id -1992400030; (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384); Thu, 10 Jul 2025 16:50:44 +0000 (UTC) From: Igor Belwon Date: Thu, 10 Jul 2025 18:50:09 +0200 Subject: [PATCH v2 5/5] arm64: dts: exynos990-r8s: Enable USB Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250710-resends-july-exynos990-dt-v2-5-55033f73d1b0@mentallysanemainliners.org> References: <20250710-resends-july-exynos990-dt-v2-0-55033f73d1b0@mentallysanemainliners.org> In-Reply-To: <20250710-resends-july-exynos990-dt-v2-0-55033f73d1b0@mentallysanemainliners.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Igor Belwon X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1752166235; l=1236; i=igor.belwon@mentallysanemainliners.org; s=20241206; h=from:subject:message-id; bh=hknFIwkcGKVEGhAUgTXGLYiwzwz0RfRZ2lihmtn+v/I=; b=ynBO6kmtohpJo3p5lxLXPL57n/QpF8Lx2UHxcFcKg0YmDmr3vudy6s1QYzYLQalQbz3gK2k2N IG9BHBog/VaAplFRDtiKJ3xdAC+skHG0iNoJuyjYufbdAbUzTiRAAIC X-Developer-Key: i=igor.belwon@mentallysanemainliners.org; a=ed25519; pk=qKAuSTWKTaGQM0vwBxV0p6hPKMN4vh0CwZ+bozrG5lY= Enable both the USB PHY as well as the DWC3 controller nodes. Since we do not have any PMIC for USB implemented yet, use dummy regulators until we do. Signed-off-by: Igor Belwon --- arch/arm64/boot/dts/exynos/exynos990-r8s.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynos990-r8s.dts b/arch/arm64/boot= /dts/exynos/exynos990-r8s.dts index 6bae3c0ecc1caae31d2c6b6e81bbd76a4ccd6f5f..55342db61979bc28e65f68c9ba7= d6b452dbf6c07 100644 --- a/arch/arm64/boot/dts/exynos/exynos990-r8s.dts +++ b/arch/arm64/boot/dts/exynos/exynos990-r8s.dts @@ -44,6 +44,12 @@ memory@80000000 { <0x8 0x80000000 0x0 0xc0000000>; }; =20 + /* TODO: Remove this once PMIC is implemented */ + reg_dummy: regulator-0 { + compatible =3D "regulator-fixed"; + regulator-name =3D "dummy_reg"; + }; + reserved-memory { #address-cells =3D <2>; #size-cells =3D <2>; @@ -113,3 +119,13 @@ key_volup: key-volup-pins { samsung,pin-drv =3D ; }; }; + +&usbdrd { + status =3D "okay"; + vdd10-supply =3D <®_dummy>; + vdd33-supply =3D <®_dummy>; +}; + +&usbdrd_phy { + status =3D "okay"; +}; --=20 2.47.2