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[73.183.52.120]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-70497d39749sm9670216d6.58.2025.07.10.09.08.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Jul 2025 09:08:29 -0700 (PDT) From: Brian Masney Date: Thu, 10 Jul 2025 12:07:19 -0400 Subject: [PATCH 9/9] phy: ti: phy-j721e-wiz: convert from round_rate() to determine_rate() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250710-phy-clk-round-rate-v1-9-0ff274055e42@redhat.com> References: <20250710-phy-clk-round-rate-v1-0-0ff274055e42@redhat.com> In-Reply-To: <20250710-phy-clk-round-rate-v1-0-0ff274055e42@redhat.com> To: Vinod Koul , Kishon Vijay Abraham I , Chun-Kuang Hu , Philipp Zabel , Chunfeng Yun , Matthias Brugger , AngeloGioacchino Del Regno , Heiko Stuebner , Maxime Ripard , Stephen Boyd Cc: linux-clk@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, Brian Masney X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1752163685; l=1629; i=bmasney@redhat.com; s=20250528; h=from:subject:message-id; bh=pMJI6s5tTYu1BzJU7vvw5Y0iwaNTd3NH6yMHjsN8/cM=; b=0nPrE2c6cl5ohekNJUp1MPpsItdutqAcWnGrmBosgKM0YvNyBYPz4zo1bZfpAq6S3ivaSbkgi TWd7oICIP84Cvj784x11Hev/+JYsi8/Mx0kVOHPtXnwdacpkl9MVEHt X-Developer-Key: i=bmasney@redhat.com; a=ed25519; pk=x20f2BQYftANnik+wvlm4HqLqAlNs/npfVcbhHPOK2U= The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney --- drivers/phy/ti/phy-j721e-wiz.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c index ab2a4f2c0a5bf3aa4b77045f4da8b0ddcc079f7a..12dafb2bd49bc33c13dd49246bc= 26df082e3dd40 100644 --- a/drivers/phy/ti/phy-j721e-wiz.c +++ b/drivers/phy/ti/phy-j721e-wiz.c @@ -934,12 +934,15 @@ static unsigned long wiz_clk_div_recalc_rate(struct c= lk_hw *hw, return divider_recalc_rate(hw, parent_rate, val, div->table, 0x0, 2); } =20 -static long wiz_clk_div_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int wiz_clk_div_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct wiz_clk_divider *div =3D to_wiz_clk_div(hw); =20 - return divider_round_rate(hw, rate, prate, div->table, 2, 0x0); + req->rate =3D divider_round_rate(hw, req->rate, &req->best_parent_rate, + div->table, 2, 0x0); + + return 0; } =20 static int wiz_clk_div_set_rate(struct clk_hw *hw, unsigned long rate, @@ -958,7 +961,7 @@ static int wiz_clk_div_set_rate(struct clk_hw *hw, unsi= gned long rate, =20 static const struct clk_ops wiz_clk_div_ops =3D { .recalc_rate =3D wiz_clk_div_recalc_rate, - .round_rate =3D wiz_clk_div_round_rate, + .determine_rate =3D wiz_clk_div_determine_rate, .set_rate =3D wiz_clk_div_set_rate, }; =20 --=20 2.50.0