From nobody Tue Dec 16 12:19:57 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6125F27F759; Thu, 10 Jul 2025 03:36:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752118572; cv=none; b=J2R28xAZF+NRcVDKManOUX9m3FQPgBWu1hOkR59eF0CL5RN3JX22PlQQLv3sGpdSGl1nDZ7luClK/vJSRzNJthg8m9sZ5XJcwWZrXmF8oUz4X+vXEYrZxinMXmH9C+DDWgIzYVni7FSytvFWQ0t8ayChe9mQkgy1QsMzxPbPI98= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752118572; c=relaxed/simple; bh=8w2K7QZ6AF4MXhKAWZ0WsVMksPAeq09KxjKPNZT4T98=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=JjJQqr/HO9AsETetURE7ZggjTnp9PgA831fkJKskPOMWF5+i91NAfHFp92sy+Dtx1YWmn1u96NjD7PyaeMMsd79tKq+IABXaaJgsSewpJ9775KHZ4Qp/a4rlwTJxF42be/m4GfFp38teZ9lnNK99++Tqdbv49xbkjI00B0A6X9Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=TgG742dO; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="TgG742dO" Received: by smtp.kernel.org (Postfix) with ESMTPS id 108AAC4CEFD; Thu, 10 Jul 2025 03:36:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1752118572; bh=8w2K7QZ6AF4MXhKAWZ0WsVMksPAeq09KxjKPNZT4T98=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=TgG742dOsrxHtdgzj+eCd1PkLdIiMQIU1uZfFNXx3IdH3fRqUhqlUj1QDXBJBbTUo rDxAghZLlQ5xIH99QORiSp58A6XjXzFegxbYVknEs+sdzqaNJ34Kii3FJFouQQZszH rech3Yg9w95VGhs0SJu7my1twhE6Bwy/Fy8kA57pjhOSSNqsvn9XwKidorEKDQskpV IXPcKRSAsgvgi8dG4AGYMZJTkHKaHiYPgllP/d7g5qxLSLkJFmJrAYYQ5I40XOHaC7 yaXQMqq+nfTT2UtLZb9HU+ZDoXb/Y90waH1PL4/2EmzJt7NQXOOSGnnxYRa1crU7CN md7HDbD7+9/xg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 01561C83F1B; Thu, 10 Jul 2025 03:36:12 +0000 (UTC) From: jiebing chen via B4 Relay Date: Thu, 10 Jul 2025 11:35:40 +0800 Subject: [PATCH v5 4/6] ASoC: meson: g12a-toacodec: Add s4 tocodec driver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250710-audio_drvier-v5-4-d4155f1e7464@amlogic.com> References: <20250710-audio_drvier-v5-0-d4155f1e7464@amlogic.com> In-Reply-To: <20250710-audio_drvier-v5-0-d4155f1e7464@amlogic.com> To: Jerome Brunet , Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jaroslav Kysela , Takashi Iwai , Neil Armstrong , Kevin Hilman , Martin Blumenstingl , Michael Turquette , Stephen Boyd Cc: linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, jian.xu@amlogic.com, shuai.li@amlogic.com, zhe.wang@amlogic.com, jiebing chen X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1752118569; l=3554; i=jiebing.chen@amlogic.com; s=20250110; h=from:subject:message-id; bh=MLfvyxlbPsF5sk8NMUX7mF1hDMY2Iagf6LVWAbphU3w=; b=Rj3QS2sdPqUT+gPd/INbgcmQ3ZEZc5rhwuKhkgewA2BrN0DIsg/d7ZZONHJx9jHk+w2Lyo0ql baA0fExXo8QBTht5jGhDtGndlBQh31gZ7/2wADrwLL6RlLHpRuUsQf7 X-Developer-Key: i=jiebing.chen@amlogic.com; a=ed25519; pk=6rFvvF45A84pLNRy03hfUHeROxHCnZ+1KAGw/DoqKic= X-Endpoint-Received: by B4 Relay for jiebing.chen@amlogic.com/20250110 with auth_id=316 X-Original-From: jiebing chen Reply-To: jiebing.chen@amlogic.com From: jiebing chen The S4 tocodec supports 8-lane input configuration, requiring BCLK and MCLK control bits to be enabled during operation. Signed-off-by: jiebing chen --- sound/soc/meson/g12a-toacodec.c | 42 +++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 42 insertions(+) diff --git a/sound/soc/meson/g12a-toacodec.c b/sound/soc/meson/g12a-toacode= c.c index 531bb8707a3ec4c47814d6a0676d5c62c705da75..cb2169293f0e800bd9c0893087f= fc4813f3360e2 100644 --- a/sound/soc/meson/g12a-toacodec.c +++ b/sound/soc/meson/g12a-toacodec.c @@ -41,6 +41,9 @@ #define CTRL0_BCLK_SEL_LSB 4 #define CTRL0_MCLK_SEL GENMASK(2, 0) =20 +#define CTRL0_BCLK_ENABLE_SHIFT 30 +#define CTRL0_MCLK_ENABLE_SHIFT 29 + #define TOACODEC_OUT_CHMAX 2 =20 struct g12a_toacodec { @@ -143,6 +146,19 @@ static const struct snd_soc_dapm_widget sm1_toacodec_w= idgets[] =3D { &g12a_toacodec_out_enable), }; =20 +/* + * FIXME: + * On this soc, tocodec need enable mclk and bclk control + * just enable it when dapm power widget power on. + */ + +static const struct snd_soc_dapm_widget s4_toacodec_widgets[] =3D { + SND_SOC_DAPM_MUX("SRC", TOACODEC_CTRL0, CTRL0_BCLK_ENABLE_SHIFT, 0, + &sm1_toacodec_mux), + SND_SOC_DAPM_SWITCH("OUT EN", TOACODEC_CTRL0, CTRL0_MCLK_ENABLE_SHIFT, 0, + &g12a_toacodec_out_enable), +}; + static int g12a_toacodec_input_hw_params(struct snd_pcm_substream *substre= am, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) @@ -236,6 +252,10 @@ static const struct snd_kcontrol_new sm1_toacodec_cont= rols[] =3D { SOC_SINGLE("Lane Select", TOACODEC_CTRL0, CTRL0_LANE_SEL_SM1, 3, 0), }; =20 +static const struct snd_kcontrol_new s4_toacodec_controls[] =3D { + SOC_SINGLE("Lane Select", TOACODEC_CTRL0, CTRL0_LANE_SEL_SM1, 7, 0), +}; + static const struct snd_soc_component_driver g12a_toacodec_component_drv = =3D { .probe =3D g12a_toacodec_component_probe, .controls =3D g12a_toacodec_controls, @@ -258,6 +278,17 @@ static const struct snd_soc_component_driver sm1_toaco= dec_component_drv =3D { .endianness =3D 1, }; =20 +static const struct snd_soc_component_driver s4_toacodec_component_drv =3D= { + .probe =3D sm1_toacodec_component_probe, + .controls =3D s4_toacodec_controls, + .num_controls =3D ARRAY_SIZE(s4_toacodec_controls), + .dapm_widgets =3D s4_toacodec_widgets, + .num_dapm_widgets =3D ARRAY_SIZE(s4_toacodec_widgets), + .dapm_routes =3D g12a_toacodec_routes, + .num_dapm_routes =3D ARRAY_SIZE(g12a_toacodec_routes), + .endianness =3D 1, +}; + static const struct regmap_config g12a_toacodec_regmap_cfg =3D { .reg_bits =3D 32, .val_bits =3D 32, @@ -278,6 +309,13 @@ static const struct g12a_toacodec_match_data sm1_toaco= dec_match_data =3D { .field_bclk_sel =3D REG_FIELD(TOACODEC_CTRL0, 4, 6), }; =20 +static const struct g12a_toacodec_match_data s4_toacodec_match_data =3D { + .component_drv =3D &s4_toacodec_component_drv, + .field_dat_sel =3D REG_FIELD(TOACODEC_CTRL0, 19, 20), + .field_lrclk_sel =3D REG_FIELD(TOACODEC_CTRL0, 12, 14), + .field_bclk_sel =3D REG_FIELD(TOACODEC_CTRL0, 4, 6), +}; + static const struct of_device_id g12a_toacodec_of_match[] =3D { { .compatible =3D "amlogic,g12a-toacodec", @@ -287,6 +325,10 @@ static const struct of_device_id g12a_toacodec_of_matc= h[] =3D { .compatible =3D "amlogic,sm1-toacodec", .data =3D &sm1_toacodec_match_data, }, + { + .compatible =3D "amlogic,s4-toacodec", + .data =3D &s4_toacodec_match_data, + }, {} }; MODULE_DEVICE_TABLE(of, g12a_toacodec_of_match); --=20 2.43.0