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a=ed25519-sha256; t=1752138982; l=4973; i=shivendra.pratap@oss.qualcomm.com; s=20250710; h=from:subject:message-id; bh=uCGaHKxMyCT6Fr1GicW0dawysRNXieqTwFGMzz+YiHM=; b=L6QqHX1809AdVxBa+yUIqV+KzAjQCF49Na14f6bM9oifTFAaCspHqvngk9jAg+lDYE0q+ZxwI FcFtJ72BHDNAXJDB5RiTwPW/EJPMBTS9YMfKspKEOgWPjTlQJLQUjhd X-Developer-Key: i=shivendra.pratap@oss.qualcomm.com; a=ed25519; pk=CpsuL7yZ8NReDPhGgq6Xn/SRoa59mAvzWOW0QZoo4gw= X-Authority-Analysis: v=2.4 cv=P7o6hjAu c=1 sm=1 tr=0 ts=686f8526 cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=Wb1JkmetP80A:10 a=EUspDBNiAAAA:8 a=eXBxmsxbH67dAx2arOIA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=uG9DUKGECoFWVXl0Dc02:22 X-Proofpoint-ORIG-GUID: DT8LBJvY6QCToxq3Idy77Q1iy0Klmvaq X-Proofpoint-GUID: DT8LBJvY6QCToxq3Idy77Q1iy0Klmvaq X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzEwMDA3OSBTYWx0ZWRfX7ohkdOWfIeFD KrhA7XRQPzdmcNNApAmJ/7MUulvx1xAcilIzrpjkroKmBSXlQTB3w5AV3RPXJnwkv+dmHHAQhJ9 BMwSGjddS+ekXicrxKc5fNcro/nTurm3+3uATP1Mp63q7g4Gdg5Bsa3h8Jal+aNPDmIGLHYj82u r84v0wI2lE0hcyU7xw8dOqnEWDH9LvinE50db6ZNsgl+KAvgeDqln1RqU4ldqvHZU9pxzT8Tzl+ MEHYqY2VXHohg1ZBxXaUxZB1t3D47pQTHxJZLLM9GTEWxbS63xi6ZrWwjFj8zPyvg/idKUBqdvM h3e+uW92Oun5l181csvWvb8WOey3xrxT7tm13ja4ZohGo18/1tM5SxOkVQJXYlGOpYrMUOh8wn0 xQ1Zaa+WWd05GKqZxcd6JwKnIvPTwnck6CVYzaJTGPe0j6dgTZuyswXZXmL7ZI3NgkKrR4cM X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.7,FMLib:17.12.80.40 definitions=2025-07-10_01,2025-07-09_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 priorityscore=1501 phishscore=0 bulkscore=0 mlxscore=0 malwarescore=0 spamscore=0 lowpriorityscore=0 suspectscore=0 clxscore=1015 adultscore=0 mlxlogscore=999 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507100079 SoC vendors have different types of resets which are controlled through various hardware registers. For instance, Qualcomm SoC may have a requirement that reboot with =E2=80=9Cbootloader=E2=80=9D command should reboot the device to bootloader flashing mode and reboot with =E2=80=9Cedl=E2=80=9D should reboot the device into Emergency flashing= mode. Setting up such reboots on Qualcomm devices can be inconsistent across SoC platforms and may require setting different HW registers, where some of these registers may not be accessible to HLOS. These knobs evolve over product generations and require more drivers. PSCI spec defines, SYSTEM_RESET2, vendor-specific reset which can help align this requirement. Add support for PSCI SYSTEM_RESET2, vendor-specific resets and align the implementation to allow user-space initiated reboots to trigger these resets. Introduce a late_initcall to register PSCI vendor-specific resets as reboot-mode arguments like reset_type and cookie. For a SoC where, PSCI vendor-specific system_reset2 is supported, the appropriate value gets filled to reset_type and cookie during this reboot-mode hook registration. If the secure firmware supports PSCI system_reset2, restart notifier will make secure call to trigger appropriate requested reset type. By using the above implementation, usespace will be able to issue such resets using the reboot() system call with the "*arg" parameter as a string based command. The commands can be defined in PSCI device tree node as =E2=80=9Creset-types=E2=80=9D and are based on = the reboot-mode based commands. Signed-off-by: Shivendra Pratap --- drivers/firmware/psci/Kconfig | 1 + drivers/firmware/psci/psci.c | 53 +++++++++++++++++++++++++++++++++++++++= +++- 2 files changed, 53 insertions(+), 1 deletion(-) diff --git a/drivers/firmware/psci/Kconfig b/drivers/firmware/psci/Kconfig index 97944168b5e66aea1e38a7eb2d4ced8348fce64b..9d65fe7b06a6429de8a26d06f93= 84e5c93f36e5f 100644 --- a/drivers/firmware/psci/Kconfig +++ b/drivers/firmware/psci/Kconfig @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only config ARM_PSCI_FW bool + select REBOOT_MODE =20 config ARM_PSCI_CHECKER bool "ARM PSCI checker" diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c index 38ca190d4a22d6e7e0f06420e8478a2b0ec2fe6f..87293f78ed83eb33ba67ded7372= 8729811693ea3 100644 --- a/drivers/firmware/psci/psci.c +++ b/drivers/firmware/psci/psci.c @@ -13,10 +13,13 @@ #include #include #include +#include +#include #include #include #include #include +#include #include #include =20 @@ -51,6 +54,14 @@ static int resident_cpu =3D -1; struct psci_operations psci_ops; static enum arm_smccc_conduit psci_conduit =3D SMCCC_CONDUIT_NONE; =20 +struct psci_vendor_sysreset2 { + u32 reset_type; + u32 cookie; + bool valid; +}; + +static struct psci_vendor_sysreset2 vendor_reset; + bool psci_tos_resident_on(int cpu) { return cpu =3D=3D resident_cpu; @@ -309,7 +320,14 @@ static int get_set_conduit_method(const struct device_= node *np) static int psci_sys_reset(struct notifier_block *nb, unsigned long action, void *data) { - if ((reboot_mode =3D=3D REBOOT_WARM || reboot_mode =3D=3D REBOOT_SOFT) && + if (vendor_reset.valid && psci_system_reset2_supported) { + /* + * if vendor_reset.valid is true call sys reset2 with + * the vendor_reset(reset_type and cookie). + */ + invoke_psci_fn(PSCI_FN_NATIVE(1_1, SYSTEM_RESET2), vendor_reset.reset_ty= pe, + vendor_reset.cookie, 0); + } else if ((reboot_mode =3D=3D REBOOT_WARM || reboot_mode =3D=3D REBOOT_S= OFT) && psci_system_reset2_supported) { /* * reset_type[31] =3D 0 (architectural) @@ -547,6 +565,39 @@ static const struct platform_suspend_ops psci_suspend_= ops =3D { .enter =3D psci_system_suspend_enter, }; =20 +static int psci_set_vendor_sys_reset2(struct reboot_mode_driver *reboot, + u32 reset_type, u32 cookie) +{ + if (psci_system_reset2_supported) { + vendor_reset.reset_type =3D PSCI_1_1_RESET_TYPE_VENDOR_START | reset_typ= e; + vendor_reset.cookie =3D cookie; + vendor_reset.valid =3D true; + } + + return NOTIFY_DONE; +} + +static int __init psci_init_vendor_reset(void) +{ + struct reboot_mode_driver *reboot; + struct device_node *np; + + np =3D of_find_node_by_name(NULL, "reset-types"); + if (!np) + return -ENODEV; + + reboot =3D kzalloc(sizeof(*reboot), GFP_KERNEL); + if (!reboot) { + of_node_put(np); + return -ENOMEM; + } + + reboot->write_with_cookie =3D psci_set_vendor_sys_reset2; + + return reboot_mode_register(reboot, np); +} +late_initcall(psci_init_vendor_reset) + static void __init psci_init_system_reset2(void) { int ret; --=20 2.34.1