From nobody Tue Oct 7 12:27:30 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2E2012441AF for ; Wed, 9 Jul 2025 20:27:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752092839; cv=none; b=pU+ATAy7zDTe9R209bGfpN3ngOyiMJnBlCzJW5RQ4NV/TT6/BLLHt2GiopHjpHioanXO9inXvoqiTkMFncelYZUvz+tv2DoxP2eudzCKhV7voEVUfnOZzVhdbQs8JsMSj/ZnavtbQjG6PbqNCsRT+BOO95+zyXE9ZI1iG1a8nFE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752092839; c=relaxed/simple; bh=6Pf/tXMZzJo5FfKHir7iP/T7zDvDoWdK5wp07Bj9XFo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=P2xyPXgFH9gGxvjj6ar66t1JgG30BB+9p0biwgRHqN/XMlEm0PSvRbnAx1YwCmfMxlweB6JAIoGnTX/ZvEWtd0tsB5lgqEzLGiSNZAhH8vRmSzpddGA9QeOpmnna1zDC9p1+uQLVZBAf2JvuiihsTkJgS8SNgbb5wMKEAIODyGA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=cnqnl2Z/; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=THNCGLgC; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="cnqnl2Z/"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="THNCGLgC" From: "Ahmed S. Darwish" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1752092836; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=moW3grsIEEkZ24nmNYOLsz6RTNF0J1cs4slM6upzMSY=; b=cnqnl2Z/knFAkZ+/Ido1VcBVxiyrgPtaCzottgyo++LOv0HLZxPWBOj4txvZkVFT8O1KaT byZScfMap1As/EVmnjku01fjyVO4iDC726Fe8SQxusf/z/yIsAfJQWyRQ9yWfCgS36qNYe hPigymyV1P/510QFJaZl2eTMY57+Oc2lYvsYMz5DPrfJrLBKG0/LnQY9hFB48GPq5CMKER Lt4xPj1df19iuaS530uazYU8JGOXcGlj8YfyOqmXdbG1LTBhy9W+yNX0v2i1Zx3+/unHqW Xq76zY8gv/CArIwiKJh4c8bryQSfSaO7CQ466OsdnzGT6Oy7fO85WsRA+pX+8A== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1752092836; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=moW3grsIEEkZ24nmNYOLsz6RTNF0J1cs4slM6upzMSY=; b=THNCGLgCGzdGPTjP8ZPTIiEgexODnawEGGOxlV8F88AGHM/Tnxd2NeMGyobLdTpVGf36zI d/qo1TWlsjF8gWBQ== To: Borislav Petkov , Ingo Molnar , Dave Hansen Cc: Thomas Gleixner , Andrew Cooper , John Ogness , x86@kernel.org, x86-cpuid@lists.linux.dev, LKML , "Ahmed S. Darwish" Subject: [PATCH v2 1/6] x86/cpuid: Remove transitional header Date: Wed, 9 Jul 2025 22:26:28 +0200 Message-ID: <20250709202635.89791-2-darwi@linutronix.de> In-Reply-To: <20250709202635.89791-1-darwi@linutronix.de> References: <20250612234010.572636-1-darwi@linutronix.de> <20250709202635.89791-1-darwi@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" All CPUID call sites were updated at commit: 968e30006807 ("x86/cpuid: Set as the main CPUID heade= r") to include instead of . The header was still retained as a wrapper, just in case some new code in -next started using it. Now that everything is merged to Linus' tree, remove the header. Signed-off-by: Ahmed S. Darwish --- arch/x86/include/asm/cpuid.h | 8 -------- 1 file changed, 8 deletions(-) delete mode 100644 arch/x86/include/asm/cpuid.h diff --git a/arch/x86/include/asm/cpuid.h b/arch/x86/include/asm/cpuid.h deleted file mode 100644 index d5749b25fa10..000000000000 --- a/arch/x86/include/asm/cpuid.h +++ /dev/null @@ -1,8 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ - -#ifndef _ASM_X86_CPUID_H -#define _ASM_X86_CPUID_H - -#include - -#endif /* _ASM_X86_CPUID_H */ --=20 2.49.0 From nobody Tue Oct 7 12:27:30 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5658124500A for ; Wed, 9 Jul 2025 20:27:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752092842; cv=none; b=tpKM1L+ciNg6o1FLDAQ39Dx8yAxs642RJuKEUMPH2yJpUTQzfk5SIY3RCSaAx6MO9tsdNkxy497hXwWdsyLWcPJdCIzfGQdr9kZ5DBgLWK+XbxTAfLrL8rts5gc+/upgLQFKyxoVbnyBykfoeOM0N/5AkKqwlgXs5gGnuzok7GY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752092842; c=relaxed/simple; bh=FZ9H4/MGT0XYBHeY+H65v0m9KWcRSW93roPsQeAFDLA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=AqK7TyXbU8et+MAzzcXYRt8IqJfZruVcHTHD5fEkF+h/+DLg44oBjPxAbchhSsSTS75X5McHRwfiHOutqD8rY827Q+ZVsuTruh2xfzJLGqcANaWO7qTN2kvlRr9Ncd8m5K4e7v7THff5X4FYDlZuovzTq7jwmCYceM/IjHiZTNw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=pGHL+WZp; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=CB4vgEXX; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="pGHL+WZp"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="CB4vgEXX" From: "Ahmed S. Darwish" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1752092839; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=av1RJLmDJc38MxsK1DauTEQVAq72KkzKxqMBwAWtSvk=; b=pGHL+WZpvfBJ7CNjZ0sYzhYvLcV2KDR43hFM9OBkFYvPgcT3jO5Qy1v987rMI/huga4ecJ pXtlAeRZxlz/0Ts1Qvafb2XSUObg7SOqkMuYD1PRGkm0c1Vh4RgbOKAqDi40735Vql1lbM UF8VEtJpcCa2yhXpArpoXSrN66XQV9fQABil+uKsRcL2URMkEdLZmRD9KJyofPGvhyfUCh NKpHihgQlA9Z/s/ZNjQiAzIL0hfSIAx+IYNhUqTRvYMm7O6VpDjkw410ARvoJ4DiynbUXz T//FWxfzxvJtzkqREbI2n1NhzD0KtDTHrX7OUJ3JmkC6DJDolh+xXUzWkmCarw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1752092839; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=av1RJLmDJc38MxsK1DauTEQVAq72KkzKxqMBwAWtSvk=; b=CB4vgEXX4BKrRqPnSa1Kicay2XyTJ2X38kbNkv4g779OUz0VNTl5ubvQLecekP/kPImIJw NTbPy6DdGznPIaDg== To: Borislav Petkov , Ingo Molnar , Dave Hansen Cc: Thomas Gleixner , Andrew Cooper , John Ogness , x86@kernel.org, x86-cpuid@lists.linux.dev, LKML , "Ahmed S. Darwish" Subject: [PATCH v2 2/6] ASoC: Intel: avs: Include CPUID header at file scope Date: Wed, 9 Jul 2025 22:26:29 +0200 Message-ID: <20250709202635.89791-3-darwi@linutronix.de> In-Reply-To: <20250709202635.89791-1-darwi@linutronix.de> References: <20250612234010.572636-1-darwi@linutronix.de> <20250709202635.89791-1-darwi@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Commit cbe37a4d2b3c ("ASoC: Intel: avs: Configure basefw on TGL-based platform= s") includes the main CPUID header from within a C function. This works by luck and forbids valid refactorings inside the CPUID header. Include the CPUID header at file scope instead. Note, for the CPUID(0x15) leaf number, use CPUID_LEAF_TSC instead of defining a custom local macro for it. Signed-off-by: Ahmed S. Darwish Acked-by: Cezary Rojewski --- sound/soc/intel/avs/tgl.c | 25 ++++++++++++++++--------- 1 file changed, 16 insertions(+), 9 deletions(-) diff --git a/sound/soc/intel/avs/tgl.c b/sound/soc/intel/avs/tgl.c index 9dbb3ad0954a..cf19d3a7ced2 100644 --- a/sound/soc/intel/avs/tgl.c +++ b/sound/soc/intel/avs/tgl.c @@ -10,8 +10,6 @@ #include "avs.h" #include "messages.h" =20 -#define CPUID_TSC_LEAF 0x15 - static int avs_tgl_dsp_core_power(struct avs_dev *adev, u32 core_mask, boo= l power) { core_mask &=3D AVS_MAIN_CORE_MASK; @@ -39,22 +37,31 @@ static int avs_tgl_dsp_core_stall(struct avs_dev *adev,= u32 core_mask, bool stal return avs_dsp_core_stall(adev, core_mask, stall); } =20 +#ifdef CONFIG_X86 +#include +static unsigned int intel_crystal_freq_hz(void) +{ + return cpuid_ecx(CPUID_LEAF_TSC); +} +#else +static unsigned int intel_crystal_freq_hz(void) +{ + return 0; +} +#endif /* !CONFIG_X86 */ + static int avs_tgl_config_basefw(struct avs_dev *adev) { + unsigned int freq =3D intel_crystal_freq_hz(); struct pci_dev *pci =3D adev->base.pci; struct avs_bus_hwid hwid; int ret; -#ifdef CONFIG_X86 - unsigned int ecx; =20 -#include - ecx =3D cpuid_ecx(CPUID_TSC_LEAF); - if (ecx) { - ret =3D avs_ipc_set_fw_config(adev, 1, AVS_FW_CFG_XTAL_FREQ_HZ, sizeof(e= cx), &ecx); + if (freq) { + ret =3D avs_ipc_set_fw_config(adev, 1, AVS_FW_CFG_XTAL_FREQ_HZ, sizeof(f= req), &freq); if (ret) return AVS_IPC_RET(ret); } -#endif =20 hwid.device =3D pci->device; hwid.subsystem =3D pci->subsystem_vendor | (pci->subsystem_device << 16); --=20 2.49.0 From nobody Tue Oct 7 12:27:30 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 89B57247282 for ; Wed, 9 Jul 2025 20:27:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752092847; cv=none; b=gfUhEUqjmdi914zqmwrHLJMGQPwfy9A3L9zK3JnncPQ+ly5/E+Xbd25oSksc2u+g1gDiQOF0jBoV5RuZlKMxVJCxmj58Lw9uG53bTW1fu/I2uBQecr1MgixiIo0JfG6i2Qj5fmni0a6j86KY0MuvAz6HsHQYu/O74MvlzjImt0E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752092847; c=relaxed/simple; bh=g+JKZAg/TiCH95nnSuM7T6vJeQVg+SeGa1eL3msI0Qs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=MU/xtYktZjUrOjJ27ibqjntECZzseRt25QvQb23yfGmj6IphBrHBXQEJiH9O2Lpc8nrkHc39P73qINve4Kf7FFdKgVK2rbA2vSUYVqXlN3dnqo74cyitm0jAxseBdMo5H4ODUCw7MiHDe6iXy9fCCyla+FO0S7ohWTg+z2U8Uhk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=Vhq/dzZP; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=Sx7EL1K5; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="Vhq/dzZP"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="Sx7EL1K5" From: "Ahmed S. Darwish" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1752092843; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=pCZbBJqJSjCot6gOqD2i4qsn8fO/mwHQL/oAFr+hIVY=; b=Vhq/dzZPUTwrMuoJdMTkIRRPwIyZo68WYk09Y6atqYaq145amKqRPs78RUekanBfTFPrZL YETy5ljDwsIRKrITLSzQCp/qnfjB44sscJVxT+LN92NLctPlte9z3bmhCVT4RWls77hHOJ V1KXXjEg22Sg7azAfPefrnmO1BbtnEdffewkvmhVSvEOdHbEbQh8wWMiJcyix4BEQ6mdJS BiG9fS+9P+x8moh3YNORHaGEEeQ8KpfRjopoHshc9Q8xzfbb4S6viUxsVwX9M0h0k3gKlT 8CXdCimY8vTfk6ZyGbhq6xEPxecCVpjNIt2dz5y0nhFObt1hC0rEruAY5WBkWA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1752092843; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=pCZbBJqJSjCot6gOqD2i4qsn8fO/mwHQL/oAFr+hIVY=; b=Sx7EL1K5zxjZQWOpG9n2SjUehmWU9UKSlmgqCI0FMGTn5hSCqDNMMJr6TeCGztmDxeQa75 2skCYMMXdEmRqNCA== To: Borislav Petkov , Ingo Molnar , Dave Hansen Cc: Thomas Gleixner , Andrew Cooper , John Ogness , x86@kernel.org, x86-cpuid@lists.linux.dev, LKML , "Ahmed S. Darwish" Subject: [PATCH v2 3/6] x86: Reorder headers alphabetically Date: Wed, 9 Jul 2025 22:26:30 +0200 Message-ID: <20250709202635.89791-4-darwi@linutronix.de> In-Reply-To: <20250709202635.89791-1-darwi@linutronix.de> References: <20250612234010.572636-1-darwi@linutronix.de> <20250709202635.89791-1-darwi@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Multiple x86 source files use the cpuid_*() macros, but implicitly include the main CPUID API header through instead. Sort their include lines so that can be explicitly included next. Signed-off-by: Ahmed S. Darwish --- arch/x86/boot/startup/sme.c | 8 ++-- arch/x86/coco/tdx/tdx.c | 5 ++- arch/x86/events/amd/uncore.c | 14 +++--- arch/x86/events/zhaoxin/core.c | 11 +++-- arch/x86/kernel/cpu/amd.c | 25 +++++------ arch/x86/kernel/cpu/mce/core.c | 62 +++++++++++++-------------- arch/x86/kernel/cpu/microcode/core.c | 22 +++++----- arch/x86/kernel/cpu/microcode/intel.c | 11 ++--- arch/x86/kernel/cpu/mshyperv.c | 28 ++++++------ arch/x86/kernel/cpu/resctrl/core.c | 5 ++- arch/x86/kernel/cpu/scattered.c | 2 +- arch/x86/kernel/cpu/topology_common.c | 2 +- arch/x86/kernel/paravirt.c | 28 ++++++------ 13 files changed, 114 insertions(+), 109 deletions(-) diff --git a/arch/x86/boot/startup/sme.c b/arch/x86/boot/startup/sme.c index 70ea1748c0a7..922b236be02f 100644 --- a/arch/x86/boot/startup/sme.c +++ b/arch/x86/boot/startup/sme.c @@ -34,15 +34,15 @@ */ #define USE_EARLY_PGTABLE_L5 =20 +#include #include -#include #include -#include +#include =20 +#include #include -#include #include -#include +#include #include =20 #define PGD_FLAGS _KERNPG_TABLE_NOENC diff --git a/arch/x86/coco/tdx/tdx.c b/arch/x86/coco/tdx/tdx.c index 7b2833705d47..7bc11836c46a 100644 --- a/arch/x86/coco/tdx/tdx.c +++ b/arch/x86/coco/tdx/tdx.c @@ -8,16 +8,17 @@ #include #include #include + #include -#include -#include #include #include #include #include #include #include +#include #include +#include =20 /* MMIO direction */ #define EPT_READ 0 diff --git a/arch/x86/events/amd/uncore.c b/arch/x86/events/amd/uncore.c index e8b6af199c73..c1483ef16c0b 100644 --- a/arch/x86/events/amd/uncore.c +++ b/arch/x86/events/amd/uncore.c @@ -5,18 +5,18 @@ * Author: Jacob Shin */ =20 -#include -#include -#include -#include -#include #include -#include #include +#include +#include +#include +#include +#include #include +#include =20 -#include #include +#include =20 #define NUM_COUNTERS_NB 4 #define NUM_COUNTERS_L2 4 diff --git a/arch/x86/events/zhaoxin/core.c b/arch/x86/events/zhaoxin/core.c index 4bdfcf091200..d59992364880 100644 --- a/arch/x86/events/zhaoxin/core.c +++ b/arch/x86/events/zhaoxin/core.c @@ -5,16 +5,16 @@ =20 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt =20 -#include -#include -#include -#include #include +#include #include +#include +#include +#include =20 +#include #include #include -#include #include =20 #include "../perf_event.h" @@ -616,4 +616,3 @@ __init int zhaoxin_pmu_init(void) =20 return 0; } - diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index 655f44f89ded..6e2ee9ed76d2 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -1,32 +1,33 @@ // SPDX-License-Identifier: GPL-2.0-only -#include + #include #include -#include - +#include #include +#include +#include +#include #include #include -#include #include -#include -#include + #include #include #include #include -#include -#include +#include +#include +#include #include #include -#include -#include +#include #include -#include #include +#include +#include =20 #ifdef CONFIG_X86_64 -# include +#include #endif =20 #include "cpu.h" diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c index 4da4eab56c81..5a11c522ea97 100644 --- a/arch/x86/kernel/cpu/mce/core.c +++ b/arch/x86/kernel/cpu/mce/core.c @@ -9,52 +9,52 @@ * Author: Andi Kleen */ =20 -#include #include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include +#include #include -#include -#include -#include -#include +#include +#include +#include +#include +#include +#include #include +#include +#include +#include +#include #include -#include +#include +#include +#include #include -#include +#include +#include #include -#include -#include -#include -#include -#include -#include +#include +#include +#include #include +#include +#include +#include #include +#include +#include #include -#include -#include +#include +#include +#include =20 -#include #include -#include -#include -#include +#include #include #include +#include #include #include +#include +#include =20 #include "internal.h" =20 diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/mic= rocode/core.c index fe50eb5b7c4a..9243ed3ded85 100644 --- a/arch/x86/kernel/cpu/microcode/core.c +++ b/arch/x86/kernel/cpu/microcode/core.c @@ -17,27 +17,27 @@ =20 #define pr_fmt(fmt) "microcode: " fmt =20 -#include -#include -#include -#include #include -#include +#include #include -#include #include -#include -#include -#include +#include #include +#include +#include #include +#include +#include +#include +#include +#include =20 #include +#include #include +#include #include #include -#include -#include #include =20 #include "internal.h" diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/mi= crocode/intel.c index 371ca6eac00e..99fda8f7dba7 100644 --- a/arch/x86/kernel/cpu/microcode/intel.c +++ b/arch/x86/kernel/cpu/microcode/intel.c @@ -11,21 +11,22 @@ * H Peter Anvin" */ #define pr_fmt(fmt) "microcode: " fmt + +#include #include #include -#include #include #include +#include #include -#include +#include #include -#include =20 #include +#include #include -#include #include -#include +#include =20 #include "internal.h" =20 diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c index c78f860419d6..d0491bba9e30 100644 --- a/arch/x86/kernel/cpu/mshyperv.c +++ b/arch/x86/kernel/cpu/mshyperv.c @@ -6,33 +6,35 @@ * Author : K. Y. Srinivasan */ =20 -#include -#include #include -#include +#include #include #include -#include +#include #include #include #include #include -#include -#include +#include +#include + +#include #include -#include + +#include #include +#include +#include #include #include -#include -#include -#include -#include -#include -#include +#include #include +#include #include +#include +#include #include +#include =20 /* Is Linux running on nested Microsoft Hypervisor */ bool hv_nested; diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resct= rl/core.c index 187d527ef73b..35285567beec 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -17,13 +17,14 @@ #define pr_fmt(fmt) "resctrl: " fmt =20 #include -#include -#include #include +#include +#include =20 #include #include #include + #include "internal.h" =20 /* diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattere= d.c index dbf6d71bdf18..3d23b943f596 100644 --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c @@ -4,8 +4,8 @@ */ #include =20 -#include #include +#include #include =20 #include "cpu.h" diff --git a/arch/x86/kernel/cpu/topology_common.c b/arch/x86/kernel/cpu/to= pology_common.c index b5a5e1411469..48c47d02d8a9 100644 --- a/arch/x86/kernel/cpu/topology_common.c +++ b/arch/x86/kernel/cpu/topology_common.c @@ -3,8 +3,8 @@ =20 #include =20 -#include #include +#include #include #include =20 diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c index ab3e172dcc69..3d745cd25a43 100644 --- a/arch/x86/kernel/paravirt.c +++ b/arch/x86/kernel/paravirt.c @@ -6,34 +6,34 @@ 2007 - x86_64 support added by Glauber de Oliveira Costa, Red Hat Inc */ =20 +#include +#include #include -#include #include -#include -#include #include +#include #include #include #include =20 +#include #include -#include #include +#include #include +#include +#include +#include +#include +#include +#include +#include #include +#include #include -#include -#include -#include -#include -#include -#include #include -#include #include -#include -#include -#include +#include =20 /* stub always returning 0. */ DEFINE_ASM_FUNC(paravirt_ret0, "xor %eax,%eax", .entry.text); --=20 2.49.0 From nobody Tue Oct 7 12:27:30 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 16CC524466B for ; Wed, 9 Jul 2025 20:27:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752092854; cv=none; b=lGuCv1+w30K806GqrRH1eC3SqoZV5opudEXNkdEQIuWUlkeZ4G7w33XXFUbKV4L0+dMlmJPVHATCDtCJaaohq0XPOYnhxbv3xZdyywIA/xaBAMtO1r8+WZl3QIGAJc8xhIPUK5nPuj3ZEmw18QdX9pq6U/kpfinEFoTzYzbgrfw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752092854; c=relaxed/simple; bh=vgm4wXz2ieJ8rei31RF9l8O4B5rpM6AEB8ZaDd0ziX0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=fzvPA5Kkdqz4NYJp1xi2PaPbSuAQfMPrfmqi2ruMOd6NF5tXU7LCv+Lh3nju4ERErO7CwB2tAJ6m6OpLVQibqc0+4WacvAtQ6AgzeY4ML8gyUa0DNxK7CML89qgVBqsura3QjVa904rnUuKu0etck1fFxiKe86AjjXwNOHAM6qc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=BdlIq86g; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=B0JJfPnN; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="BdlIq86g"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="B0JJfPnN" From: "Ahmed S. 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Darwish" Subject: [PATCH v2 4/6] drivers: Reorder headers alphabetically Date: Wed, 9 Jul 2025 22:26:31 +0200 Message-ID: <20250709202635.89791-5-darwi@linutronix.de> In-Reply-To: <20250709202635.89791-1-darwi@linutronix.de> References: <20250612234010.572636-1-darwi@linutronix.de> <20250709202635.89791-1-darwi@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Multiple drivers use the cpuid_*() macros, but implicitly include the main CPUID header through instead. Sort their include lines so that can be explicitly included next. Signed-off-by: Ahmed S. Darwish --- drivers/cpufreq/longrun.c | 6 +++--- drivers/cpufreq/powernow-k7.c | 13 ++++++------- drivers/cpufreq/powernow-k8.c | 16 ++++++++-------- drivers/cpufreq/speedstep-lib.c | 5 +++-- drivers/hwmon/fam15h_power.c | 13 +++++++------ drivers/hwmon/k8temp.c | 11 ++++++----- drivers/thermal/intel/x86_pkg_temp_thermal.c | 14 +++++++------- 7 files changed, 40 insertions(+), 38 deletions(-) diff --git a/drivers/cpufreq/longrun.c b/drivers/cpufreq/longrun.c index 1caaec7c280b..263c48b8f628 100644 --- a/drivers/cpufreq/longrun.c +++ b/drivers/cpufreq/longrun.c @@ -5,15 +5,15 @@ * BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous* */ =20 +#include +#include #include #include -#include -#include #include =20 +#include #include #include -#include =20 static struct cpufreq_driver longrun_driver; =20 diff --git a/drivers/cpufreq/powernow-k7.c b/drivers/cpufreq/powernow-k7.c index 31039330a3ba..0608040fcd1e 100644 --- a/drivers/cpufreq/powernow-k7.c +++ b/drivers/cpufreq/powernow-k7.c @@ -15,20 +15,20 @@ =20 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt =20 +#include +#include +#include +#include #include #include #include -#include -#include #include #include -#include #include -#include =20 -#include /* Needed for recalibrate_cpu_khz() */ -#include #include +#include +#include /* Needed for recalibrate_cpu_khz() */ =20 #ifdef CONFIG_X86_POWERNOW_K7_ACPI #include @@ -691,4 +691,3 @@ MODULE_LICENSE("GPL"); =20 late_initcall(powernow_init); module_exit(powernow_exit); - diff --git a/drivers/cpufreq/powernow-k8.c b/drivers/cpufreq/powernow-k8.c index f7512b4e923e..2b5cdd8f1c0a 100644 --- a/drivers/cpufreq/powernow-k8.c +++ b/drivers/cpufreq/powernow-k8.c @@ -26,22 +26,22 @@ =20 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt =20 +#include +#include +#include +#include +#include +#include #include -#include #include -#include -#include +#include #include +#include #include -#include -#include -#include =20 #include #include =20 -#include -#include #include =20 #define VERSION "version 2.20.00" diff --git a/drivers/cpufreq/speedstep-lib.c b/drivers/cpufreq/speedstep-li= b.c index 0b66df4ed513..f08817331aec 100644 --- a/drivers/cpufreq/speedstep-lib.c +++ b/drivers/cpufreq/speedstep-lib.c @@ -9,14 +9,15 @@ =20 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt =20 +#include +#include #include #include #include -#include -#include =20 #include #include + #include "speedstep-lib.h" =20 #define PFX "speedstep-lib: " diff --git a/drivers/hwmon/fam15h_power.c b/drivers/hwmon/fam15h_power.c index 8ecebea53651..5a5674e85f63 100644 --- a/drivers/hwmon/fam15h_power.c +++ b/drivers/hwmon/fam15h_power.c @@ -6,20 +6,21 @@ * Author: Andreas Herrmann */ =20 +#include +#include +#include #include -#include #include +#include #include #include #include -#include -#include -#include -#include #include +#include #include -#include + #include +#include =20 MODULE_DESCRIPTION("AMD Family 15h CPU processor power monitor"); MODULE_AUTHOR("Andreas Herrmann "); diff --git a/drivers/hwmon/k8temp.c b/drivers/hwmon/k8temp.c index 2b80ac410cd1..8c1efce9a04b 100644 --- a/drivers/hwmon/k8temp.c +++ b/drivers/hwmon/k8temp.c @@ -7,13 +7,14 @@ * Inspired from the w83785 and amd756 drivers. */ =20 -#include -#include -#include -#include -#include #include +#include +#include +#include #include +#include +#include + #include =20 #define TEMP_FROM_REG(val) (((((val) >> 16) & 0xff) - 49) * 1000) diff --git a/drivers/thermal/intel/x86_pkg_temp_thermal.c b/drivers/thermal= /intel/x86_pkg_temp_thermal.c index 3fc679b6f11b..c843cb5fc5c3 100644 --- a/drivers/thermal/intel/x86_pkg_temp_thermal.c +++ b/drivers/thermal/intel/x86_pkg_temp_thermal.c @@ -5,19 +5,19 @@ */ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt =20 -#include +#include +#include +#include +#include #include #include -#include +#include #include -#include #include -#include -#include -#include #include +#include +#include #include -#include =20 #include #include --=20 2.49.0 From nobody Tue Oct 7 12:27:30 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A9A15248F57 for ; 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Darwish" Subject: [PATCH v2 5/6] treewide: Explicitly include CPUID headers Date: Wed, 9 Jul 2025 22:26:32 +0200 Message-ID: <20250709202635.89791-6-darwi@linutronix.de> In-Reply-To: <20250709202635.89791-1-darwi@linutronix.de> References: <20250612234010.572636-1-darwi@linutronix.de> <20250709202635.89791-1-darwi@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Modify all CPUID call sites which implicitly include any of the CPUID headers through to explicitly include the CPUID headers instead. This allows disentangling and from at a later step. Signed-off-by: Ahmed S. Darwish --- arch/x86/boot/compressed/pgtable_64.c | 1 + arch/x86/boot/startup/sme.c | 1 + arch/x86/coco/tdx/tdx.c | 1 + arch/x86/events/amd/core.c | 2 ++ arch/x86/events/amd/ibs.c | 1 + arch/x86/events/amd/lbr.c | 2 ++ arch/x86/events/amd/power.c | 3 +++ arch/x86/events/amd/uncore.c | 1 + arch/x86/events/intel/core.c | 1 + arch/x86/events/intel/lbr.c | 1 + arch/x86/events/zhaoxin/core.c | 1 + arch/x86/include/asm/acrn.h | 2 ++ arch/x86/include/asm/microcode.h | 1 + arch/x86/include/asm/xen/hypervisor.h | 1 + arch/x86/kernel/cpu/amd.c | 1 + arch/x86/kernel/cpu/centaur.c | 1 + arch/x86/kernel/cpu/hygon.c | 1 + arch/x86/kernel/cpu/mce/core.c | 1 + arch/x86/kernel/cpu/mce/inject.c | 1 + arch/x86/kernel/cpu/microcode/core.c | 1 + arch/x86/kernel/cpu/microcode/intel.c | 1 + arch/x86/kernel/cpu/mshyperv.c | 1 + arch/x86/kernel/cpu/resctrl/core.c | 1 + arch/x86/kernel/cpu/resctrl/monitor.c | 1 + arch/x86/kernel/cpu/scattered.c | 1 + arch/x86/kernel/cpu/sgx/main.c | 3 +++ arch/x86/kernel/cpu/topology_amd.c | 1 + arch/x86/kernel/cpu/topology_common.c | 1 + arch/x86/kernel/cpu/topology_ext.c | 1 + arch/x86/kernel/cpu/transmeta.c | 3 +++ arch/x86/kernel/cpu/zhaoxin.c | 1 + arch/x86/kernel/cpuid.c | 1 + arch/x86/kernel/paravirt.c | 1 + arch/x86/kvm/cpuid.h | 3 +++ arch/x86/kvm/mmu/spte.c | 1 + arch/x86/kvm/reverse_cpuid.h | 2 ++ drivers/cpufreq/longrun.c | 1 + drivers/cpufreq/powernow-k7.c | 1 + drivers/cpufreq/powernow-k8.c | 1 + drivers/cpufreq/speedstep-lib.c | 1 + drivers/firmware/efi/libstub/x86-5lvl.c | 1 + drivers/hwmon/fam15h_power.c | 1 + drivers/hwmon/k10temp.c | 2 ++ drivers/hwmon/k8temp.c | 1 + drivers/thermal/intel/intel_hfi.c | 1 + drivers/thermal/intel/x86_pkg_temp_thermal.c | 1 + 46 files changed, 59 insertions(+) diff --git a/arch/x86/boot/compressed/pgtable_64.c b/arch/x86/boot/compress= ed/pgtable_64.c index bdd26050dff7..d94d98595780 100644 --- a/arch/x86/boot/compressed/pgtable_64.c +++ b/arch/x86/boot/compressed/pgtable_64.c @@ -2,6 +2,7 @@ #include "misc.h" #include #include +#include #include #include #include "../string.h" diff --git a/arch/x86/boot/startup/sme.c b/arch/x86/boot/startup/sme.c index 922b236be02f..6a58ab568390 100644 --- a/arch/x86/boot/startup/sme.c +++ b/arch/x86/boot/startup/sme.c @@ -40,6 +40,7 @@ #include =20 #include +#include #include #include #include diff --git a/arch/x86/coco/tdx/tdx.c b/arch/x86/coco/tdx/tdx.c index 7bc11836c46a..4ed8ec642646 100644 --- a/arch/x86/coco/tdx/tdx.c +++ b/arch/x86/coco/tdx/tdx.c @@ -10,6 +10,7 @@ #include =20 #include +#include #include #include #include diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c index b20661b8621d..d28d45ceb707 100644 --- a/arch/x86/events/amd/core.c +++ b/arch/x86/events/amd/core.c @@ -7,8 +7,10 @@ #include #include #include + #include #include +#include #include #include =20 diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c index 112f43b23ebf..0c7848e6149e 100644 --- a/arch/x86/events/amd/ibs.c +++ b/arch/x86/events/amd/ibs.c @@ -15,6 +15,7 @@ #include =20 #include +#include #include =20 #include "../perf_event.h" diff --git a/arch/x86/events/amd/lbr.c b/arch/x86/events/amd/lbr.c index d24da377df77..5b437dc8e4ce 100644 --- a/arch/x86/events/amd/lbr.c +++ b/arch/x86/events/amd/lbr.c @@ -1,5 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 #include + +#include #include #include =20 diff --git a/arch/x86/events/amd/power.c b/arch/x86/events/amd/power.c index dad42790cf7d..744dffa42dee 100644 --- a/arch/x86/events/amd/power.c +++ b/arch/x86/events/amd/power.c @@ -10,8 +10,11 @@ #include #include #include + #include +#include #include + #include "../perf_event.h" =20 /* Event code: LSB 8 bits, passed in attr->config any other bit is reserve= d. */ diff --git a/arch/x86/events/amd/uncore.c b/arch/x86/events/amd/uncore.c index c1483ef16c0b..5261f12007df 100644 --- a/arch/x86/events/amd/uncore.c +++ b/arch/x86/events/amd/uncore.c @@ -15,6 +15,7 @@ #include #include =20 +#include #include #include =20 diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index c2fb729c270e..ebbcdf82b494 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -17,6 +17,7 @@ #include =20 #include +#include #include #include #include diff --git a/arch/x86/events/intel/lbr.c b/arch/x86/events/intel/lbr.c index 7aa59966e7c3..0d1ec3651735 100644 --- a/arch/x86/events/intel/lbr.c +++ b/arch/x86/events/intel/lbr.c @@ -3,6 +3,7 @@ #include =20 #include +#include #include #include =20 diff --git a/arch/x86/events/zhaoxin/core.c b/arch/x86/events/zhaoxin/core.c index d59992364880..15bb9c9c9358 100644 --- a/arch/x86/events/zhaoxin/core.c +++ b/arch/x86/events/zhaoxin/core.c @@ -14,6 +14,7 @@ =20 #include #include +#include #include #include =20 diff --git a/arch/x86/include/asm/acrn.h b/arch/x86/include/asm/acrn.h index fab11192c60a..db42b477c41d 100644 --- a/arch/x86/include/asm/acrn.h +++ b/arch/x86/include/asm/acrn.h @@ -2,6 +2,8 @@ #ifndef _ASM_X86_ACRN_H #define _ASM_X86_ACRN_H =20 +#include + /* * This CPUID returns feature bitmaps in EAX. * Guest VM uses this to detect the appropriate feature bit. diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microc= ode.h index 8b41f26f003b..645e65ac1586 100644 --- a/arch/x86/include/asm/microcode.h +++ b/arch/x86/include/asm/microcode.h @@ -3,6 +3,7 @@ #define _ASM_X86_MICROCODE_H =20 #include +#include =20 struct cpu_signature { unsigned int sig; diff --git a/arch/x86/include/asm/xen/hypervisor.h b/arch/x86/include/asm/x= en/hypervisor.h index c2fc7869b996..7c596cebfb78 100644 --- a/arch/x86/include/asm/xen/hypervisor.h +++ b/arch/x86/include/asm/xen/hypervisor.h @@ -37,6 +37,7 @@ extern struct shared_info *HYPERVISOR_shared_info; extern struct start_info *xen_start_info; =20 #include +#include #include =20 #define XEN_SIGNATURE "XenVMMXenVMM" diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index 6e2ee9ed76d2..6bfe714c75dd 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include diff --git a/arch/x86/kernel/cpu/centaur.c b/arch/x86/kernel/cpu/centaur.c index a3b55db35c96..cc5a390dcd07 100644 --- a/arch/x86/kernel/cpu/centaur.c +++ b/arch/x86/kernel/cpu/centaur.c @@ -5,6 +5,7 @@ =20 #include #include +#include #include #include #include diff --git a/arch/x86/kernel/cpu/hygon.c b/arch/x86/kernel/cpu/hygon.c index 2154f12766fb..75ad7eb1301a 100644 --- a/arch/x86/kernel/cpu/hygon.c +++ b/arch/x86/kernel/cpu/hygon.c @@ -10,6 +10,7 @@ =20 #include #include +#include #include #include #include diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c index 5a11c522ea97..31ff1c578b40 100644 --- a/arch/x86/kernel/cpu/mce/core.c +++ b/arch/x86/kernel/cpu/mce/core.c @@ -47,6 +47,7 @@ #include =20 #include +#include #include #include #include diff --git a/arch/x86/kernel/cpu/mce/inject.c b/arch/x86/kernel/cpu/mce/inj= ect.c index d02c4f556cd0..42c82c14c48a 100644 --- a/arch/x86/kernel/cpu/mce/inject.c +++ b/arch/x86/kernel/cpu/mce/inject.c @@ -26,6 +26,7 @@ =20 #include #include +#include #include #include #include diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/mic= rocode/core.c index 9243ed3ded85..eae9eaa455ba 100644 --- a/arch/x86/kernel/cpu/microcode/core.c +++ b/arch/x86/kernel/cpu/microcode/core.c @@ -35,6 +35,7 @@ #include #include #include +#include #include #include #include diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/mi= crocode/intel.c index 99fda8f7dba7..30d20f78f07d 100644 --- a/arch/x86/kernel/cpu/microcode/intel.c +++ b/arch/x86/kernel/cpu/microcode/intel.c @@ -23,6 +23,7 @@ #include =20 #include +#include #include #include #include diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c index d0491bba9e30..771a65e6fefb 100644 --- a/arch/x86/kernel/cpu/mshyperv.c +++ b/arch/x86/kernel/cpu/mshyperv.c @@ -22,6 +22,7 @@ #include =20 #include +#include #include #include #include diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resct= rl/core.c index 35285567beec..52d3753ab020 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -22,6 +22,7 @@ #include =20 #include +#include #include #include =20 diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/re= sctrl/monitor.c index c261558276cd..5dffb9453d77 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -21,6 +21,7 @@ #include =20 #include +#include #include =20 #include "internal.h" diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattere= d.c index 3d23b943f596..15f8752d4132 100644 --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c @@ -5,6 +5,7 @@ #include =20 #include +#include #include #include =20 diff --git a/arch/x86/kernel/cpu/sgx/main.c b/arch/x86/kernel/cpu/sgx/main.c index 2de01b379aa3..00bf42f4c536 100644 --- a/arch/x86/kernel/cpu/sgx/main.c +++ b/arch/x86/kernel/cpu/sgx/main.c @@ -14,8 +14,11 @@ #include #include #include + +#include #include #include + #include "driver.h" #include "encl.h" #include "encls.h" diff --git a/arch/x86/kernel/cpu/topology_amd.c b/arch/x86/kernel/cpu/topol= ogy_amd.c index 843b1655ab45..abc6f5a7a486 100644 --- a/arch/x86/kernel/cpu/topology_amd.c +++ b/arch/x86/kernel/cpu/topology_amd.c @@ -2,6 +2,7 @@ #include =20 #include +#include #include #include #include diff --git a/arch/x86/kernel/cpu/topology_common.c b/arch/x86/kernel/cpu/to= pology_common.c index 48c47d02d8a9..38189e4fea0e 100644 --- a/arch/x86/kernel/cpu/topology_common.c +++ b/arch/x86/kernel/cpu/topology_common.c @@ -4,6 +4,7 @@ #include =20 #include +#include #include #include #include diff --git a/arch/x86/kernel/cpu/topology_ext.c b/arch/x86/kernel/cpu/topol= ogy_ext.c index 467b0326bf1a..eb915c73895f 100644 --- a/arch/x86/kernel/cpu/topology_ext.c +++ b/arch/x86/kernel/cpu/topology_ext.c @@ -2,6 +2,7 @@ #include =20 #include +#include #include #include =20 diff --git a/arch/x86/kernel/cpu/transmeta.c b/arch/x86/kernel/cpu/transmet= a.c index 42c939827621..1fdcd69c625c 100644 --- a/arch/x86/kernel/cpu/transmeta.c +++ b/arch/x86/kernel/cpu/transmeta.c @@ -3,8 +3,11 @@ #include #include #include + #include +#include #include + #include "cpu.h" =20 static void early_init_transmeta(struct cpuinfo_x86 *c) diff --git a/arch/x86/kernel/cpu/zhaoxin.c b/arch/x86/kernel/cpu/zhaoxin.c index 89b1c8a70fe8..cfcfb6221e3f 100644 --- a/arch/x86/kernel/cpu/zhaoxin.c +++ b/arch/x86/kernel/cpu/zhaoxin.c @@ -4,6 +4,7 @@ =20 #include #include +#include #include =20 #include "cpu.h" diff --git a/arch/x86/kernel/cpuid.c b/arch/x86/kernel/cpuid.c index dae436253de4..cbd04b677fd1 100644 --- a/arch/x86/kernel/cpuid.c +++ b/arch/x86/kernel/cpuid.c @@ -37,6 +37,7 @@ #include #include =20 +#include #include #include =20 diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c index 3d745cd25a43..b7fc3b78086c 100644 --- a/arch/x86/kernel/paravirt.c +++ b/arch/x86/kernel/paravirt.c @@ -18,6 +18,7 @@ =20 #include #include +#include #include #include #include diff --git a/arch/x86/kvm/cpuid.h b/arch/x86/kvm/cpuid.h index d3f5ae15a7ca..89f8ed3fb37a 100644 --- a/arch/x86/kvm/cpuid.h +++ b/arch/x86/kvm/cpuid.h @@ -3,8 +3,11 @@ #define ARCH_X86_KVM_CPUID_H =20 #include "reverse_cpuid.h" + #include +#include #include + #include =20 extern u32 kvm_cpu_caps[NR_KVM_CPU_CAPS] __read_mostly; diff --git a/arch/x86/kvm/mmu/spte.c b/arch/x86/kvm/mmu/spte.c index cfce03d8f123..e7b69275ae50 100644 --- a/arch/x86/kvm/mmu/spte.c +++ b/arch/x86/kvm/mmu/spte.c @@ -15,6 +15,7 @@ #include "x86.h" #include "spte.h" =20 +#include #include #include #include diff --git a/arch/x86/kvm/reverse_cpuid.h b/arch/x86/kvm/reverse_cpuid.h index fde0ae986003..be774dcf5e97 100644 --- a/arch/x86/kvm/reverse_cpuid.h +++ b/arch/x86/kvm/reverse_cpuid.h @@ -3,8 +3,10 @@ #define ARCH_X86_KVM_REVERSE_CPUID_H =20 #include + #include #include +#include =20 /* * Define a KVM-only feature flag. diff --git a/drivers/cpufreq/longrun.c b/drivers/cpufreq/longrun.c index 263c48b8f628..3429857feb96 100644 --- a/drivers/cpufreq/longrun.c +++ b/drivers/cpufreq/longrun.c @@ -12,6 +12,7 @@ #include =20 #include +#include #include #include =20 diff --git a/drivers/cpufreq/powernow-k7.c b/drivers/cpufreq/powernow-k7.c index 0608040fcd1e..7a324a829a43 100644 --- a/drivers/cpufreq/powernow-k7.c +++ b/drivers/cpufreq/powernow-k7.c @@ -27,6 +27,7 @@ #include =20 #include +#include #include #include /* Needed for recalibrate_cpu_khz() */ =20 diff --git a/drivers/cpufreq/powernow-k8.c b/drivers/cpufreq/powernow-k8.c index 2b5cdd8f1c0a..e909eee30edd 100644 --- a/drivers/cpufreq/powernow-k8.c +++ b/drivers/cpufreq/powernow-k8.c @@ -41,6 +41,7 @@ =20 #include #include +#include =20 #include =20 diff --git a/drivers/cpufreq/speedstep-lib.c b/drivers/cpufreq/speedstep-li= b.c index f08817331aec..3c323cd8eede 100644 --- a/drivers/cpufreq/speedstep-lib.c +++ b/drivers/cpufreq/speedstep-lib.c @@ -15,6 +15,7 @@ #include #include =20 +#include #include #include =20 diff --git a/drivers/firmware/efi/libstub/x86-5lvl.c b/drivers/firmware/efi= /libstub/x86-5lvl.c index f1c5fb45d5f7..029ad80cf0b4 100644 --- a/drivers/firmware/efi/libstub/x86-5lvl.c +++ b/drivers/firmware/efi/libstub/x86-5lvl.c @@ -2,6 +2,7 @@ #include =20 #include +#include #include #include =20 diff --git a/drivers/hwmon/fam15h_power.c b/drivers/hwmon/fam15h_power.c index 5a5674e85f63..1ecaef25f04e 100644 --- a/drivers/hwmon/fam15h_power.c +++ b/drivers/hwmon/fam15h_power.c @@ -19,6 +19,7 @@ #include #include =20 +#include #include #include =20 diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c index babf2413d666..12115654689a 100644 --- a/drivers/hwmon/k10temp.c +++ b/drivers/hwmon/k10temp.c @@ -20,7 +20,9 @@ #include #include #include + #include +#include #include =20 MODULE_DESCRIPTION("AMD Family 10h+ CPU core temperature monitor"); diff --git a/drivers/hwmon/k8temp.c b/drivers/hwmon/k8temp.c index 8c1efce9a04b..eb167be245b9 100644 --- a/drivers/hwmon/k8temp.c +++ b/drivers/hwmon/k8temp.c @@ -15,6 +15,7 @@ #include #include =20 +#include #include =20 #define TEMP_FROM_REG(val) (((((val) >> 16) & 0xff) - 49) * 1000) diff --git a/drivers/thermal/intel/intel_hfi.c b/drivers/thermal/intel/inte= l_hfi.c index bd2fca7dc017..c910cc563d9d 100644 --- a/drivers/thermal/intel/intel_hfi.c +++ b/drivers/thermal/intel/intel_hfi.c @@ -41,6 +41,7 @@ #include #include =20 +#include #include =20 #include "intel_hfi.h" diff --git a/drivers/thermal/intel/x86_pkg_temp_thermal.c b/drivers/thermal= /intel/x86_pkg_temp_thermal.c index c843cb5fc5c3..1b9e0b49856c 100644 --- a/drivers/thermal/intel/x86_pkg_temp_thermal.c +++ b/drivers/thermal/intel/x86_pkg_temp_thermal.c @@ -20,6 +20,7 @@ #include =20 #include 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Darwish" Subject: [PATCH v2 6/6] x86/cpu: : Do not include CPUID API header Date: Wed, 9 Jul 2025 22:26:33 +0200 Message-ID: <20250709202635.89791-7-darwi@linutronix.de> In-Reply-To: <20250709202635.89791-1-darwi@linutronix.de> References: <20250612234010.572636-1-darwi@linutronix.de> <20250709202635.89791-1-darwi@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" includes the CPUID API header but it does not need it. Remove the CPUID API header include. This allows the CPUID API header to include without introducing a circular dependency, which is needed for the upcoming CPUID model and parser. Signed-off-by: Ahmed S. Darwish --- arch/x86/include/asm/processor.h | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/proces= sor.h index bde58f6510ac..910e36b0c00d 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -16,7 +16,6 @@ struct vm86; #include #include #include -#include #include #include #include --=20 2.49.0