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X-OriginatorOrg: phytec.fr X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Jul 2025 15:10:19.2371 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0ee9cb31-08c2-45ac-3281-08ddbefab7e9 X-MS-Exchange-CrossTenant-Id: e609157c-80e2-446d-9be3-9c99c2399d29 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e609157c-80e2-446d-9be3-9c99c2399d29;Ip=[91.26.50.189];Helo=[Diagnostix.phytec.de] X-MS-Exchange-CrossTenant-AuthSource: DB1PEPF000509ED.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBAP195MB1018 Content-Type: text/plain; charset="utf-8" - Add missing chip select pin group in pinctrl. - Overwrite the memory map to the Flash device size (16MB) is necessary to avoid waste of virtual memory that will not be used. Without this modification, qspi probe fails because of ioremap error. Signed-off-by: Christophe Parant --- arch/arm/boot/dts/st/stm32mp15xx-phycore-som.dtsi | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/st/stm32mp15xx-phycore-som.dtsi b/arch/arm/b= oot/dts/st/stm32mp15xx-phycore-som.dtsi index 660cdc260963..72926c3de52c 100644 --- a/arch/arm/boot/dts/st/stm32mp15xx-phycore-som.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xx-phycore-som.dtsi @@ -290,8 +290,14 @@ &pwr_regulators { =20 &qspi { pinctrl-names =3D "default", "sleep"; - pinctrl-0 =3D <&qspi_clk_pins_a &qspi_bk1_pins_a>; - pinctrl-1 =3D <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>; + pinctrl-0 =3D <&qspi_clk_pins_a + &qspi_bk1_pins_a + &qspi_cs1_pins_a>; + pinctrl-1 =3D <&qspi_clk_sleep_pins_a + &qspi_bk1_sleep_pins_a + &qspi_cs1_sleep_pins_a>; + reg =3D <0x58003000 0x1000>, + <0x70000000 0x1000000>; status =3D "okay"; =20 flash0: flash@0 { --=20 2.34.1