From nobody Tue Oct 7 15:01:30 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 186D228D8EB; Wed, 9 Jul 2025 11:07:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752059248; cv=none; b=LLYNQR/r6AsJ3JMy5CbEVat1HP2rasCUbmuOlS1qudiOOqUjNMSNa9nzWdzA5Agds6h1fq9hGmDvtyD9LBjRB5RXXmmbCwFDHEYF6hGcovIZD2ix9z27wxwhKFZbhFk8Fbb/fp1WFfFT+15nU7OFbRM1hsvPWamP9klbsSrhEwI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752059248; c=relaxed/simple; bh=yNJoe5t8gSNJpuEqfBIQicEmfiYGe0lwTl7NYsTF3Uw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=On/5bpnyajjnVnEct1xlWfJMlYTMguGGmM/vtQoRe1EC3UrylpSgjqJ8m1VWI2isYvvucoCPdZIO7gi0jDPMe+e76kQoLKvyvRHtHa8CsBrrp+qYKtP8WySiT/1evzilAODBb0hSsbssD1CEbxUHIyp4SK7p4dufO5Y5AUhDP04= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Vea0LOOQ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Vea0LOOQ" Received: by smtp.kernel.org (Postfix) with ESMTPS id CA976C4CEFD; Wed, 9 Jul 2025 11:07:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1752059247; bh=yNJoe5t8gSNJpuEqfBIQicEmfiYGe0lwTl7NYsTF3Uw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=Vea0LOOQTgumwmr3sirezoY/Rf17HNOl8/Lxvqok56HqH8jFzf/T89LW3ApzOKuJK U5oB+og9x1XVTsJgx2Y6J4lDcF7+7+F/y8mZ0Diy+Crl+d7E98+mgJLo2jRsRHke+L ZBqfmOEwELRhTJHX4bvTFi8yaSjP7HmiyeW2sVVv+r6LoGstoZzQmtFWvSCAMA8rZY pd3bGI4OlaB3VeZow1vwxs7zux4JhIDC+EGOaEbLvBJm/KPHYyIWMoZOk4B0mZeEJ4 VkjIkmMkzdzyQnGhTKugorYcXyyYQk9ylpPw1yhZdbIztTjg4C/iRLa8PrCRx5L3M1 JgA+39ctr+S3A== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2482C83F0A; Wed, 9 Jul 2025 11:07:27 +0000 (UTC) From: Keguang Zhang via B4 Relay Date: Wed, 09 Jul 2025 19:05:56 +0800 Subject: [PATCH v2 5/9] MIPS: dts: loongson: Add Smartloong-1C board Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250709-loongson1-arch-v2-5-bcff6e518c09@gmail.com> References: <20250709-loongson1-arch-v2-0-bcff6e518c09@gmail.com> In-Reply-To: <20250709-loongson1-arch-v2-0-bcff6e518c09@gmail.com> To: Thomas Bogendoerfer , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jiaxun Yang , Keguang Zhang Cc: linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1752059245; l=5948; i=keguang.zhang@gmail.com; s=20231129; h=from:subject:message-id; bh=phwJMEvMJf+PrPkMdMehcytqzcA824cdewCc7pYA85s=; b=UrGvspuI7q1Fw+RWwi2TihmmD8xd2qfzjJ9KumWl1KGaPpL5BTvKlDnb9X5BOWstseytzEoNt PmsOyMm862xBK/KdlhA1MXIKvI/krLomHNIZ8uRSUYdvx19QBzCfPqx X-Developer-Key: i=keguang.zhang@gmail.com; a=ed25519; pk=FMKGj/JgKll/MgClpNZ3frIIogsh5e5r8CeW2mr+WLs= X-Endpoint-Received: by B4 Relay for keguang.zhang@gmail.com/20231129 with auth_id=102 X-Original-From: Keguang Zhang Reply-To: keguang.zhang@gmail.com From: Keguang Zhang Add a device tree for Smartloong-1C board, supporting CPU, clock, INTC, UART, Ethernet, GPIO, USB host, RTC, watchdog, DMA, and NAND. Signed-off-by: Keguang Zhang --- arch/mips/boot/dts/loongson/Makefile | 1 + arch/mips/boot/dts/loongson/loongson1c.dtsi | 141 ++++++++++++++++++++++= ++++ arch/mips/boot/dts/loongson/smartloong-1c.dts | 93 +++++++++++++++++ 3 files changed, 235 insertions(+) diff --git a/arch/mips/boot/dts/loongson/Makefile b/arch/mips/boot/dts/loon= gson/Makefile index 1123d08dbfbe..633d95848f76 100644 --- a/arch/mips/boot/dts/loongson/Makefile +++ b/arch/mips/boot/dts/loongson/Makefile @@ -11,4 +11,5 @@ dtb-y :=3D $(addsuffix .dtb, $(CONFIG_BUILTIN_DTB_NAME)) else dtb-$(CONFIG_MACH_LOONGSON32) +=3D ls1b-demo.dtb dtb-$(CONFIG_MACH_LOONGSON32) +=3D lsgz_1b_dev.dtb +dtb-$(CONFIG_MACH_LOONGSON32) +=3D smartloong-1c.dtb endif diff --git a/arch/mips/boot/dts/loongson/loongson1c.dtsi b/arch/mips/boot/d= ts/loongson/loongson1c.dtsi new file mode 100644 index 000000000000..5e80c6a657af --- /dev/null +++ b/arch/mips/boot/dts/loongson/loongson1c.dtsi @@ -0,0 +1,141 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2023-2025 Keguang Zhang + */ + +/dts-v1/; +#include "loongson1.dtsi" + +/ { + clkc: clock-controller@1fe78030 { + compatible =3D "loongson,ls1c-clk"; + reg =3D <0x1fe78030 0x8>; + clocks =3D <&xtal>; + #clock-cells =3D <1>; + }; +}; + +&soc { + syscon: syscon@420 { + compatible =3D "loongson,ls1c-syscon", "syscon"; + reg =3D <0x420 0x8>; + }; + + intc4: interrupt-controller@10a0 { + compatible =3D "loongson,ls1x-intc"; + reg =3D <0x10a0 0x18>; + interrupt-controller; + interrupt-parent =3D <&cpu_intc>; + interrupts =3D <6>; + #interrupt-cells =3D <2>; + }; + + gpio2: gpio@10c8 { + compatible =3D "loongson,ls1x-gpio"; + reg =3D <0x10c8 0x4>; + gpio-controller; + ngpios =3D <32>; + #gpio-cells =3D <2>; + }; + + gpio3: gpio@10cc { + compatible =3D "loongson,ls1x-gpio"; + reg =3D <0x10cc 0x4>; + gpio-controller; + ngpios =3D <32>; + #gpio-cells =3D <2>; + }; + + dma: dma-controller@1160 { + compatible =3D "loongson,ls1c-apbdma", "loongson,ls1b-apbdma"; + reg =3D <0x1160 0x4>; + interrupt-parent =3D <&intc0>; + interrupts =3D <13 IRQ_TYPE_EDGE_RISING>, + <14 IRQ_TYPE_EDGE_RISING>, + <15 IRQ_TYPE_EDGE_RISING>; + interrupt-names =3D "ch0", "ch1", "ch2"; + #dma-cells =3D <1>; + }; + + emac: ethernet@110000 { + compatible =3D "loongson,ls1c-emac", "snps,dwmac-3.50a"; + reg =3D <0x110000 0x10000>; + clocks =3D <&clkc LS1X_CLKID_AHB>; + clock-names =3D "stmmaceth"; + interrupt-parent =3D <&intc1>; + interrupts =3D <3 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names =3D "macirq"; + loongson,ls1-syscon =3D <&syscon>; + snps,pbl =3D <1>; + status =3D "disabled"; + }; + + ehci: usb@120000 { + compatible =3D "generic-ehci"; + reg =3D <0x120000 0x100>; + interrupt-parent =3D <&intc1>; + interrupts =3D <0 IRQ_TYPE_LEVEL_HIGH>; + status =3D "disabled"; + }; + + ohci: usb@128000 { + compatible =3D "generic-ohci"; + reg =3D <0x128000 0x100>; + interrupt-parent =3D <&intc1>; + interrupts =3D <1 IRQ_TYPE_LEVEL_HIGH>; + status =3D "disabled"; + }; +}; + +&apb { + watchdog: watchdog@1c060 { + compatible =3D "loongson,ls1c-wdt"; + reg =3D <0x1c060 0xc>; + clocks =3D <&clkc LS1X_CLKID_APB>; + status =3D "disabled"; + }; + + rtc: rtc@24000 { + compatible =3D "loongson,ls1c-rtc"; + reg =3D <0x24000 0x78>; + status =3D "disabled"; + }; + + nand: nand-controller@38000 { + compatible =3D "loongson,ls1c-nand-controller"; + reg =3D <0x38000 0x24>, <0x38040 0x4>; + reg-names =3D "nand", "nand-dma"; + dmas =3D <&dma 0>; + dma-names =3D "rxtx"; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; + + nand@0 { + reg =3D <0>; + label =3D "ls1x-nand"; + nand-use-soft-ecc-engine; + nand-ecc-algo =3D "hamming"; + }; + }; +}; + +&gpio0 { + ngpios =3D <32>; +}; + +&gpio1 { + ngpios =3D <32>; +}; + +&uart1 { + interrupts =3D <4 IRQ_TYPE_LEVEL_HIGH>; +}; + +&uart2 { + interrupts =3D <5 IRQ_TYPE_LEVEL_HIGH>; +}; + +&uart3 { + interrupts =3D <29 IRQ_TYPE_LEVEL_HIGH>; +}; diff --git a/arch/mips/boot/dts/loongson/smartloong-1c.dts b/arch/mips/boot= /dts/loongson/smartloong-1c.dts new file mode 100644 index 000000000000..7a1719ec272b --- /dev/null +++ b/arch/mips/boot/dts/loongson/smartloong-1c.dts @@ -0,0 +1,93 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2023-2025 Keguang Zhang + */ + +/dts-v1/; + +#include + +#include "loongson1c.dtsi" + +/ { + compatible =3D "loongmasses,smartloong-1c", "loongson,ls1c"; + model =3D "Smartloong-1C Board"; + + memory@0 { + device_type =3D "memory"; + reg =3D <0x0 0x4000000>; + }; + + aliases { + gpio0 =3D &gpio0; + gpio1 =3D &gpio1; + gpio2 =3D &gpio2; + gpio3 =3D &gpio3; + serial0 =3D &uart2; + }; + + chosen { + bootargs =3D "mtdparts=3Dls1x-nand:16m(kernel),-(rootfs)"; + stdout-path =3D "serial0:115200n8"; + }; + + leds { + compatible =3D "gpio-leds"; + + led0 { + label =3D "led0"; + gpios =3D <&gpio1 20 GPIO_ACTIVE_LOW>; + linux,default-trigger =3D "heartbeat"; + }; + + led1 { + label =3D "led1"; + gpios =3D <&gpio1 21 GPIO_ACTIVE_LOW>; + linux,default-trigger =3D "nand-disk"; + }; + }; +}; + +&emac { + phy-handle =3D <&phy0>; + phy-mode =3D "rmii"; + status =3D "okay"; + + mdio { + compatible =3D "snps,dwmac-mdio"; + #address-cells =3D <1>; + #size-cells =3D <0>; + + phy0: ethernet-phy@13 { + reg =3D <0x13>; + }; + }; +}; + +&xtal { + clock-frequency =3D <24000000>; +}; + +&ehci { + status =3D "okay"; +}; + +&ohci { + status =3D "okay"; +}; + +&nand { + status =3D "okay"; +}; + +&rtc { + status =3D "okay"; +}; + +&uart2 { + status =3D "okay"; +}; + +&watchdog { + status =3D "okay"; +}; --=20 2.43.0