From nobody Tue Oct 7 14:59:16 2025 Received: from smtp.forwardemail.net (smtp.forwardemail.net [121.127.44.73]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BF84622578C for ; Tue, 8 Jul 2025 22:49:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=121.127.44.73 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752014983; cv=none; b=Rwe0YwwpBMh8JNjx5xUJ5gTR33JFU3J1BG8WUS2BTd04jQ1jalfM6N2ica5+i9Hz9CCi/YabwfgOJ5YOwcwaQCRJbK/C1gaLNHbQqyDDQhPopNm+ABQT1dFmqcPlLMocCemHgD8Ijo0hSKjdRGPVeXDpMRK+a7SC+PSz1r0QWpQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752014983; c=relaxed/simple; bh=5J0VHQQPIukmhLAtfNaOxgRodqKnOMQJ2hLhEG1OPTU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ID339T0ZC9R587KKKol4B/bZjMdqzZHBgndB9nPzoDTBEMgukg7LNbbco1KaI1yA4vhJwMICa5tAV8n5ZSbgcY7ZLbunOtdgyZLfhRpxRHBZnjoa4XAmyOZbPtqo0SP7F1anTjy/935MF5ubooostu1WOf00sPtYewbi6H+ymZw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b=U/Wx4eOD; arc=none smtp.client-ip=121.127.44.73 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b="U/Wx4eOD" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-ID: Date: Subject: Cc: To: From; q=dns/txt; s=fe-e1b5cab7be; t=1752014974; bh=BmqNJa1An8REJ9AUcRdzNVNiR2hfr+EH12RkNn7sOKw=; b=U/Wx4eODl5lnsxHEISjQg5x02Q5PtnGaac4RNmCq+j4Enzs1I9S7QqtPlRfI06CcFQv+1w8W/ Zp71t9YCOaO38u806uirBcn5+tNtJ7T7THCTxsAT7EreyVWf5oRacypc16oJb25gxgCYGEChUFo K/IagAIryv++zCy/dwb09Nv9tYEsZiazzMx5DW8D6EhOLhug2L06dny7WXKDvTLurnJjTMokyao 16eSmpNe9BEUUHSmrLQXNuEpF50ooDCNWPIeqFCGPUMTKm224e2lfN97BR0TwKD/LEybNEycnyC bdpWYgrkmYiqqLymD7BDBAu3NfupoogoLxj71ijLM0ag== X-Forward-Email-ID: 686da07b75317ad3cfdad3b7 X-Forward-Email-Sender: rfc822; jonas@kwiboo.se, smtp.forwardemail.net, 121.127.44.73 X-Forward-Email-Version: 1.1.3 X-Forward-Email-Website: https://forwardemail.net X-Complaints-To: abuse@forwardemail.net X-Report-Abuse: abuse@forwardemail.net X-Report-Abuse-To: abuse@forwardemail.net From: Jonas Karlman To: Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Yao Zi , Chukun Pan , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jonas Karlman Subject: [PATCH 1/6] dt-bindings: arm: rockchip: Add Radxa ROCK 2A/2F Date: Tue, 8 Jul 2025 22:48:51 +0000 Message-ID: <20250708224921.2254116-2-jonas@kwiboo.se> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250708224921.2254116-1-jonas@kwiboo.se> References: <20250708224921.2254116-1-jonas@kwiboo.se> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The ROCK 2A and ROCK 2F is a high-performance single board computer developed by Radxa, based on the Rockchip RK3528A SoC. Add devicetree binding documentation for the Radxa ROCK 2A and ROCK 2F boards. Signed-off-by: Jonas Karlman --- Documentation/devicetree/bindings/arm/rockchip.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Document= ation/devicetree/bindings/arm/rockchip.yaml index 58b9312c6c73..6636f98561e7 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -875,6 +875,13 @@ properties: - const: radxa,rock - const: rockchip,rk3188 =20 + - description: Radxa ROCK 2A/2F + items: + - enum: + - radxa,rock-2a + - radxa,rock-2f + - const: rockchip,rk3528 + - description: Radxa ROCK Pi 4A/A+/B/B+/C items: - enum: --=20 2.49.0 From nobody Tue Oct 7 14:59:16 2025 Received: from smtp.forwardemail.net (smtp.forwardemail.net [149.28.215.223]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 741C4223DE8 for ; Tue, 8 Jul 2025 22:49:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=149.28.215.223 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752014995; cv=none; b=gDSRfSCVP8JMRF4EPvaEHpTZjbrv/QA+3OFD54webn9TcMsPycif4K4ke5VKvMMRK7NGHM/kpr/8Z+eJj3pDncO81n3uLueputIZ7TZei4XniEczGioamLh0bkwsYCCEziQr0ZyCT8WqIZ5A8jjhi3WGwnrnF2IuqSIsNsJr0Iw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752014995; c=relaxed/simple; bh=HOWGTLUfbskPOQvzTxJxLo8iq8/Jo9m3/UXh5nn3e1w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=UtCDllJfzjSXIN6mO0EGLE8O1+1UynZyh0XJ06AnySrDHv10rBBMrbsOLX0YKUKcPGubUMLVmteRX2N/PXLA9UAWCe9EvEssgMkxMm+qU0/mdRbLw3Y7Me7oVKh2eZz/mrjkjgwE9c0IF1Xf4/z5Or5oNuwHBr2Q55PPKjrtMq4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b=SwAiAFfW; arc=none smtp.client-ip=149.28.215.223 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b="SwAiAFfW" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-ID: Date: Subject: Cc: To: From; q=dns/txt; s=fe-e1b5cab7be; t=1752014987; bh=A5/VtjUxg/j/xeORI++LiGqKDWJaDVK0mnI01ojTBFs=; b=SwAiAFfWMcF+N9I0o2oo5vEgDDd+oeVwDD70ul4Cww2xs2eMdwZC2M4NzpY2N/CzYFcNMiKhk hZeBIkiAGWgj5OFBUYu+BeE38P5nw4BaEQlN2EhDfBfwLhNYVhsHBmcE8wiIlprA71YlSTS8Xa+ k7e/FokdwA40CTTIO883vOe+pZPeB5XqQWUQ/Wslt7VB8OpLVYDRWY9K/A5mDtNJ1aDR2iUgElN VXfUQdnVCUmORQKLoLHEBDO0n8FIgMOqyFWJWbrqdVrDImX4LM29RMuNsvBVcDEkhlMPeRCVw1H 78xYQ18bSyKK+W2sFhqcMiUtNfLBcZw91VK3xEkIgzcw== X-Forward-Email-ID: 686da08475317ad3cfdad3db X-Forward-Email-Sender: rfc822; jonas@kwiboo.se, smtp.forwardemail.net, 149.28.215.223 X-Forward-Email-Version: 1.1.3 X-Forward-Email-Website: https://forwardemail.net X-Complaints-To: abuse@forwardemail.net X-Report-Abuse: abuse@forwardemail.net X-Report-Abuse-To: abuse@forwardemail.net From: Jonas Karlman To: Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Yao Zi , Chukun Pan , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jonas Karlman Subject: [PATCH 2/6] arm64: dts: rockchip: Add Radxa ROCK 2A/2F Date: Tue, 8 Jul 2025 22:48:52 +0000 Message-ID: <20250708224921.2254116-3-jonas@kwiboo.se> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250708224921.2254116-1-jonas@kwiboo.se> References: <20250708224921.2254116-1-jonas@kwiboo.se> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The ROCK 2A and ROCK 2F is a high-performance single board computer developed by Radxa, based on the Rockchip RK3528A SoC. Add initial device tree for the Radxa ROCK 2A and ROCK 2F boards. Signed-off-by: Jonas Karlman --- Schematics: - https://dl.radxa.com/rock2/2a/v1.2/radxa_rock_2a_v1.2_schematic.pdf - https://dl.radxa.com/rock2/2f/radxa_rock2f_v1.01_schematic.pdf --- arch/arm64/boot/dts/rockchip/Makefile | 2 + .../boot/dts/rockchip/rk3528-rock-2.dtsi | 292 ++++++++++++++++++ .../boot/dts/rockchip/rk3528-rock-2a.dts | 82 +++++ .../boot/dts/rockchip/rk3528-rock-2f.dts | 10 + 4 files changed, 386 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3528-rock-2.dtsi create mode 100644 arch/arm64/boot/dts/rockchip/rk3528-rock-2a.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk3528-rock-2f.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index e43565c53c56..d0d21f5029ea 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -90,6 +90,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399-sapphire.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399-sapphire-excavator.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399pro-rock-pi-n10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3528-radxa-e20c.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3528-rock-2a.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3528-rock-2f.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3562-evb2-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-anbernic-rg-arc-d.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-anbernic-rg-arc-s.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3528-rock-2.dtsi b/arch/arm64/b= oot/dts/rockchip/rk3528-rock-2.dtsi new file mode 100644 index 000000000000..fc23c51836b1 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3528-rock-2.dtsi @@ -0,0 +1,292 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include +#include +#include +#include "rk3528.dtsi" + +/ { + aliases { + i2c1 =3D &i2c1; + mmc0 =3D &sdhci; + mmc1 =3D &sdmmc; + serial0 =3D &uart0; + }; + + chosen { + stdout-path =3D "serial0:1500000n8"; + }; + + adc-keys { + compatible =3D "adc-keys"; + io-channels =3D <&saradc 0>; + io-channel-names =3D "buttons"; + keyup-threshold-microvolt =3D <1800000>; + poll-interval =3D <100>; + + button-maskrom { + label =3D "MASKROM"; + linux,code =3D ; + press-threshold-microvolt =3D <0>; + }; + }; + + leds: leds { + compatible =3D "gpio-leds"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&state_led_b>; + + led-state { + color =3D ; + default-state =3D "on"; + function =3D LED_FUNCTION_HEARTBEAT; + gpios =3D <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; + linux,default-trigger =3D "heartbeat"; + }; + }; + + vdd_0v9: regulator-0v9-vdd { + compatible =3D "regulator-fixed"; + regulator-name =3D "vdd_0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vcc_ddr: regulator-1v1-vcc-ddr { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1100000>; + regulator-max-microvolt =3D <1100000>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vcc_1v8: regulator-1v8-vcc { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + vin-supply =3D <&vcc_3v3>; + }; + + vcc_3v3: regulator-3v3-vcc { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vcc_wifi: regulator-3v3-vcc-wifi { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb_wifi_pwr>; + regulator-name =3D "vcc_wifi"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&vcc_3v3>; + }; + + vcc5v0_sys: regulator-5v0-vcc-sys { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + }; + + vcc5v0_usb20: regulator-5v0-vcc-usb20 { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb_host_en>; + regulator-name =3D "vcc5v0_usb20"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vccio_sd: regulator-vccio-sd { + compatible =3D "regulator-gpio"; + gpios =3D <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sdmmc_vol_ctrl_h>; + regulator-name =3D "vccio_sd"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + states =3D <1800000 0x0>, <3300000 0x1>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vdd_arm: regulator-vdd-arm { + compatible =3D "pwm-regulator"; + pwms =3D <&pwm1 0 5000 PWM_POLARITY_INVERTED>; + pwm-supply =3D <&vcc5v0_sys>; + regulator-name =3D "vdd_arm"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <746000>; + regulator-max-microvolt =3D <1201000>; + regulator-settling-time-up-us =3D <250>; + }; + + vdd_logic: regulator-vdd-logic { + compatible =3D "pwm-regulator"; + pwms =3D <&pwm2 0 5000 PWM_POLARITY_INVERTED>; + pwm-supply =3D <&vcc5v0_sys>; + regulator-name =3D "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <705000>; + regulator-max-microvolt =3D <1006000>; + regulator-settling-time-up-us =3D <250>; + }; + + rfkill { + compatible =3D "rfkill-gpio"; + label =3D "rfkill-wlan"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&wifi_reg_on_h>; + radio-type =3D "wlan"; + shutdown-gpios =3D <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>; + }; +}; + +&cpu0 { + cpu-supply =3D <&vdd_arm>; +}; + +&cpu1 { + cpu-supply =3D <&vdd_arm>; +}; + +&cpu2 { + cpu-supply =3D <&vdd_arm>; +}; + +&cpu3 { + cpu-supply =3D <&vdd_arm>; +}; + +&gpu { + mali-supply =3D <&vdd_logic>; + status =3D "okay"; +}; + +&i2c1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c1m0_xfer>; + status =3D "okay"; + + eeprom@50 { + compatible =3D "belling,bl24c16a", "atmel,24c16"; + reg =3D <0x50>; + pagesize =3D <16>; + read-only; + vcc-supply =3D <&vcc_3v3>; + }; +}; + +&pinctrl { + bluetooth { + bt_wake_host_h: bt-wake-host-h { + rockchip,pins =3D <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + host_wake_bt_h: host-wake-bt-h { + rockchip,pins =3D <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + leds { + state_led_b: state-led-b { + rockchip,pins =3D <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + sdmmc { + sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h { + rockchip,pins =3D <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb { + usb_host_en: usb-host-en { + rockchip,pins =3D <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + wifi { + usb_wifi_pwr: usb-wifi-pwr { + rockchip,pins =3D <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + wifi_reg_on_h: wifi-reg-on-h { + rockchip,pins =3D <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + wifi_wake_host_h: wifi-wake-host-h { + rockchip,pins =3D <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; +}; + +&pwm1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pwm1m0_pins>; + status =3D "okay"; +}; + +&pwm2 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pwm2m0_pins>; + status =3D "okay"; +}; + +&saradc { + vref-supply =3D <&vcc_1v8>; + status =3D "okay"; +}; + +&sdhci { + bus-width =3D <8>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + no-sd; + no-sdio; + non-removable; + vmmc-supply =3D <&vcc_3v3>; + vqmmc-supply =3D <&vcc_1v8>; + status =3D "okay"; +}; + +&sdmmc { + bus-width =3D <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + sd-uhs-sdr104; + vmmc-supply =3D <&vcc_3v3>; + vqmmc-supply =3D <&vccio_sd>; + status =3D "okay"; +}; + +&uart0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&uart0m0_xfer>; + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3528-rock-2a.dts b/arch/arm64/b= oot/dts/rockchip/rk3528-rock-2a.dts new file mode 100644 index 000000000000..c6f4d9b683d8 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3528-rock-2a.dts @@ -0,0 +1,82 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include "rk3528-rock-2.dtsi" + +/ { + model =3D "Radxa ROCK 2A"; + compatible =3D "radxa,rock-2a", "rockchip,rk3528"; + + aliases { + ethernet0 =3D &gmac1; + }; + + vcc5v0_usb30_otg: regulator-5v0-vcc-usb30-otg { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio1 RK_PC3 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb_otg_en>; + regulator-name =3D "vcc5v0_usb30_otg"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc5v0_sys>; + }; +}; + +&gmac1 { + clock_in_out =3D "output"; + phy-handle =3D <&rgmii_phy>; + phy-mode =3D "rgmii-id"; + phy-supply =3D <&vcc_3v3>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&rgmii_miim>, <&rgmii_tx_bus2>, <&rgmii_rx_bus2>, + <&rgmii_rgmii_clk>, <&rgmii_rgmii_bus>; + status =3D "okay"; +}; + +&leds { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&state_led_b>, <&sys_led_g>; + + led-sys { + color =3D ; + default-state =3D "on"; + function =3D LED_FUNCTION_STATUS; + gpios =3D <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>; + linux,default-trigger =3D "default-on"; + }; +}; + +&mdio1 { + rgmii_phy: ethernet-phy@1 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <0x1>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&gmac1_rstn_l>; + reset-assert-us =3D <20000>; + reset-deassert-us =3D <100000>; + reset-gpios =3D <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>; + }; +}; + +&pinctrl { + ethernet { + gmac1_rstn_l: gmac1-rstn-l { + rockchip,pins =3D <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + leds { + sys_led_g: sys-led-g { + rockchip,pins =3D <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb { + usb_otg_en: usb-otg-en { + rockchip,pins =3D <1 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3528-rock-2f.dts b/arch/arm64/b= oot/dts/rockchip/rk3528-rock-2f.dts new file mode 100644 index 000000000000..3e2b9b685cb2 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3528-rock-2f.dts @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include "rk3528-rock-2.dtsi" + +/ { + model =3D "Radxa ROCK 2F"; + compatible =3D "radxa,rock-2f", "rockchip,rk3528"; +}; --=20 2.49.0 From nobody Tue Oct 7 14:59:16 2025 Received: from smtp.forwardemail.net (smtp.forwardemail.net [149.28.215.223]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8BF75229B2A for ; Tue, 8 Jul 2025 22:49:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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charset="utf-8" The Sige1 is a single board computer developed by ArmSoM, based on the Rockchip RK3528A SoC. Add devicetree binding documentation for the ArmSoM Sige1 board. Signed-off-by: Jonas Karlman --- Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Document= ation/devicetree/bindings/arm/rockchip.yaml index 6636f98561e7..e955e3334e35 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -54,6 +54,11 @@ properties: - const: ariaboard,photonicat - const: rockchip,rk3568 =20 + - description: ArmSoM Sige1 board + items: + - const: armsom,sige1 + - const: rockchip,rk3528 + - description: ArmSoM Sige5 board items: - const: armsom,sige5 --=20 2.49.0 From nobody Tue Oct 7 14:59:16 2025 Received: from smtp.forwardemail.net (smtp.forwardemail.net [121.127.44.73]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 87E502264D0 for ; Tue, 8 Jul 2025 22:49:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=121.127.44.73 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752014997; cv=none; b=aViPYmjImP4B0PPxojHNOGq26xrCu9wOu2IHFRFhkihnrmywiho5WaW3MLDDPBReqda82AmRDo5fd7Gxmmaqkt5L47q/532aISxu4mmapqNNljKVbALooPxrQ/muflrq9XBc0w6oEAnNV8md0FEmcGynwrc6d3+3wnsIqD0r4uE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752014997; c=relaxed/simple; bh=IZVn2S9KENlZDMs3ABzEhkJMHpM2obsD+zuscs9a5FM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=VsL+6BYauxkWcSC3vPb4Bwwd9nnpliJcwu8yG1xQ2c0+AOWVK8/huzrDehdranqYgvg2vmwPfD7ryb46LJvKXqYt5cMsKu7OEOjBsMOHN1Alk3souLp+fJ7NUosTqvjjr6BaPw/SfTgOwBH3tpJVtjWNGndu/h29kRTyodMI3b4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b=cmItHPxJ; arc=none smtp.client-ip=121.127.44.73 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b="cmItHPxJ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-ID: Date: Subject: Cc: To: From; q=dns/txt; s=fe-e1b5cab7be; t=1752014994; bh=eowzcy8ITG2aagOcds6bHgFeKHO9g+RqlX3pgIIMC1E=; b=cmItHPxJNuh1ml+TNMbB4w/Hp8QdbV5fajDiEc+ZYNJk3E9B1b5a/ZzQgZVHZ+vMlolm/pKJ6 XMn6m0bAhU6Ihn04LyDBUfSmDOL1ektSinymnQcZEeQI4u6F9rLSOli/0FYVOiadZsAuv4EKCTw kExkBG8d9cvB4MAHA2dpwPYI6+yFfSxiQE6SwiyjdCU/KiTTYwl84XCRikRhdwhV7+AznWIFtCs ws+1TS/qlgzcol/vb/BifiGL301+BnQJ8yEc1bR42ELh6ThLEWDa0Thnd9i6AubZCZ/K04hUHcR 9ofuob8rPR/h5jTnJkRqsMcjsdpz5lj3jPItB65ctMQQ== X-Forward-Email-ID: 686da09075317ad3cfdad41c X-Forward-Email-Sender: rfc822; jonas@kwiboo.se, smtp.forwardemail.net, 121.127.44.73 X-Forward-Email-Version: 1.1.3 X-Forward-Email-Website: https://forwardemail.net X-Complaints-To: abuse@forwardemail.net X-Report-Abuse: abuse@forwardemail.net X-Report-Abuse-To: abuse@forwardemail.net From: Jonas Karlman To: Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Yao Zi , Chukun Pan , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jonas Karlman Subject: [PATCH 4/6] arm64: dts: rockchip: Add ArmSoM Sige1 Date: Tue, 8 Jul 2025 22:48:54 +0000 Message-ID: <20250708224921.2254116-5-jonas@kwiboo.se> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250708224921.2254116-1-jonas@kwiboo.se> References: <20250708224921.2254116-1-jonas@kwiboo.se> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Sige1 is a single board computer developed by ArmSoM, based on the Rockchip RK3528A SoC. Add initial device tree for the ArmSoM Sige1 board. Signed-off-by: Jonas Karlman --- Schematics: https://drive.google.com/drive/folders/15uvc2lcOAKP0enXezASUhVF= Luzkq3IEX --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3528-armsom-sige1.dts | 449 ++++++++++++++++++ 2 files changed, 450 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index d0d21f5029ea..e86131b03692 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -89,6 +89,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399-rockpro64-screen.= dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399-sapphire.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399-sapphire-excavator.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399pro-rock-pi-n10.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3528-armsom-sige1.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3528-radxa-e20c.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3528-rock-2a.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3528-rock-2f.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts b/arch/ar= m64/boot/dts/rockchip/rk3528-armsom-sige1.dts new file mode 100644 index 000000000000..15d8d32572e8 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts @@ -0,0 +1,449 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include +#include +#include +#include "rk3528.dtsi" + +/ { + model =3D "ArmSoM Sige1"; + compatible =3D "armsom,sige1", "rockchip,rk3528"; + + aliases { + ethernet0 =3D &gmac1; + i2c0 =3D &i2c0; + mmc0 =3D &sdhci; + mmc1 =3D &sdmmc; + mmc2 =3D &sdio0; + serial0 =3D &uart0; + serial2 =3D &uart2; + }; + + chosen { + stdout-path =3D "serial0:1500000n8"; + }; + + adc-keys { + compatible =3D "adc-keys"; + io-channels =3D <&saradc 0>; + io-channel-names =3D "buttons"; + keyup-threshold-microvolt =3D <1800000>; + poll-interval =3D <100>; + + button-maskrom { + label =3D "MASKROM"; + linux,code =3D ; + press-threshold-microvolt =3D <0>; + }; + }; + + leds { + compatible =3D "gpio-leds"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&g_led>, <&r_led>; + + led-green { + color =3D ; + default-state =3D "on"; + function =3D LED_FUNCTION_HEARTBEAT; + gpios =3D <&gpio3 RK_PB3 GPIO_ACTIVE_HIGH>; + linux,default-trigger =3D "heartbeat"; + }; + + led-red { + color =3D ; + default-state =3D "on"; + function =3D LED_FUNCTION_STATUS; + gpios =3D <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>; + linux,default-trigger =3D "default-on"; + }; + }; + + vcc0v6_ddr: regulator-0v6-vcc-ddr { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc0v6_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <600000>; + regulator-max-microvolt =3D <600000>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vdd_0v9: regulator-0v9-vdd { + compatible =3D "regulator-fixed"; + regulator-name =3D "vdd_0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vcc_ddr: regulator-1v1-vcc-ddr { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1100000>; + regulator-max-microvolt =3D <1100000>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vcc_1v8: regulator-1v8-vcc { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + vin-supply =3D <&vcc_3v3>; + }; + + vcc1v8_ddr: regulator-1v8-vcc-ddr { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc1v8_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vcc_3v3: regulator-3v3-vcc { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&vcc_dcin>; + }; + + vcc3v3_sd: regulator-3v3-vcc-sd { + compatible =3D "regulator-fixed"; + gpios =3D <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sdmmc_pwren_l>; + regulator-name =3D "vcc3v3_sd"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&vcc_3v3>; + }; + + vcc5v0_sys: regulator-5v0-vcc-sys { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc_dcin>; + }; + + vcc5v0_usb1_host: regulator-5v0-vcc-usb1-host { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb20_host1_drv_h>; + regulator-name =3D "vcc5v0_usb1_host"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vcc5v0_usb2_host: regulator-5v0-vcc-usb2-host { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb20_host2_drv_h>; + regulator-name =3D "vcc5v0_usb2_host"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vcc5v0_usb_otg: regulator-5v0-vcc-usb-otg { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb20_otg0_drv_h>; + regulator-name =3D "vcc5v0_usb_otg"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vcc_dcin: regulator-vcc-dcin { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_dcin"; + regulator-always-on; + regulator-boot-on; + }; + + vccio_sd: regulator-vccio-sd { + compatible =3D "regulator-gpio"; + gpios =3D <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sdmmc_vol_ctrl_h>; + regulator-name =3D "vccio_sd"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + states =3D <1800000 0x0>, <3300000 0x1>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vdd_arm: regulator-vdd-arm { + compatible =3D "pwm-regulator"; + pwms =3D <&pwm3 0 5000 PWM_POLARITY_INVERTED>; + pwm-supply =3D <&vcc5v0_sys>; + regulator-name =3D "vdd_arm"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <746000>; + regulator-max-microvolt =3D <1201000>; + regulator-settling-time-up-us =3D <250>; + }; + + vdd_logic: regulator-vdd-logic { + compatible =3D "pwm-regulator"; + pwms =3D <&pwm2 0 5000 PWM_POLARITY_INVERTED>; + pwm-supply =3D <&vcc5v0_sys>; + regulator-name =3D "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <705000>; + regulator-max-microvolt =3D <1006000>; + regulator-settling-time-up-us =3D <250>; + }; + + rfkill { + compatible =3D "rfkill-gpio"; + label =3D "rfkill-wlan"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&wifi_reg_on_h>; + radio-type =3D "wlan"; + shutdown-gpios =3D <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>; + }; + + rfkill-bt { + compatible =3D "rfkill-gpio"; + label =3D "rfkill-bt"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&bt_reg_on_h>; + radio-type =3D "bluetooth"; + shutdown-gpios =3D <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; + }; +}; + +&cpu0 { + cpu-supply =3D <&vdd_arm>; +}; + +&cpu1 { + cpu-supply =3D <&vdd_arm>; +}; + +&cpu2 { + cpu-supply =3D <&vdd_arm>; +}; + +&cpu3 { + cpu-supply =3D <&vdd_arm>; +}; + +&gmac1 { + clock_in_out =3D "output"; + phy-handle =3D <&rgmii_phy>; + phy-mode =3D "rgmii-id"; + phy-supply =3D <&vcc_3v3>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&rgmii_miim>, <&rgmii_tx_bus2>, <&rgmii_rx_bus2>, + <&rgmii_rgmii_clk>, <&rgmii_rgmii_bus>; + status =3D "okay"; +}; + +&gpu { + mali-supply =3D <&vdd_logic>; + status =3D "okay"; +}; + +&i2c0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c0m0_xfer>; + status =3D "okay"; + + hym8563: rtc@51 { + compatible =3D "haoyu,hym8563"; + reg =3D <0x51>; + #clock-cells =3D <0>; + clock-output-names =3D "hym8563"; + interrupt-parent =3D <&gpio4>; + interrupts =3D ; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&rtc_int_l>; + wakeup-source; + }; +}; + +&mdio1 { + rgmii_phy: ethernet-phy@1 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <0x1>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&gmac1_rstn_l>; + reset-assert-us =3D <20000>; + reset-deassert-us =3D <100000>; + reset-gpios =3D <&gpio4 RK_PB5 GPIO_ACTIVE_LOW>; + }; +}; + +&pinctrl { + bluetooth { + bt_reg_on_h: bt-reg-on-h { + rockchip,pins =3D <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + bt_wake_host_h: bt-wake-host-h { + rockchip,pins =3D <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + host_wake_bt_h: host-wake-bt-h { + rockchip,pins =3D <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + ethernet { + gmac1_rstn_l: gmac1-rstn-l { + rockchip,pins =3D <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + leds { + g_led: g-led { + rockchip,pins =3D <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + r_led: r-led { + rockchip,pins =3D <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + rtc { + rtc_int_l: rtc-int-l { + rockchip,pins =3D <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + sdmmc { + sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h { + rockchip,pins =3D <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + sdmmc_pwren_l: sdmmc-pwren-l { + rockchip,pins =3D <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb { + usb20_host1_drv_h: usb20-host1-drv-h { + rockchip,pins =3D <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + usb20_host2_drv_h: usb20-host2-drv-h { + rockchip,pins =3D <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + usb20_otg0_drv_h: usb20-otg0-drv-h { + rockchip,pins =3D <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + wifi { + wifi_reg_on_h: wifi-reg-on-h { + rockchip,pins =3D <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + wifi_wake_host_h: wifi-wake-host-h { + rockchip,pins =3D <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; +}; + +&pwm2 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pwm2m0_pins>; + status =3D "okay"; +}; + +&pwm3 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pwm3m0_pins>; + status =3D "okay"; +}; + +&saradc { + vref-supply =3D <&vcc_1v8>; + status =3D "okay"; +}; + +&sdhci { + bus-width =3D <8>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + no-sd; + no-sdio; + non-removable; + vmmc-supply =3D <&vcc_3v3>; + vqmmc-supply =3D <&vcc_1v8>; + status =3D "okay"; +}; + +&sdio0 { + bus-width =3D <4>; + cap-sd-highspeed; + cap-sdio-irq; + disable-wp; + keep-power-in-suspend; + no-mmc; + no-sd; + non-removable; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sdio0_bus4>, <&sdio0_clk>, <&sdio0_cmd>, <&clkm1_32k_out>; + sd-uhs-sdr104; + vmmc-supply =3D <&vcc_3v3>; + vqmmc-supply =3D <&vcc_1v8>; + status =3D "okay"; +}; + +&sdmmc { + bus-width =3D <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + sd-uhs-sdr104; + vmmc-supply =3D <&vcc3v3_sd>; + vqmmc-supply =3D <&vccio_sd>; + status =3D "okay"; +}; + +&uart0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&uart0m0_xfer>; + status =3D "okay"; +}; + +&uart2 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&uart2m1_xfer>, <&uart2m1_ctsn>, <&uart2m1_rtsn>; + uart-has-rtscts; + status =3D "okay"; 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jonas@kwiboo.se, smtp.forwardemail.net, 121.127.44.73 X-Forward-Email-Version: 1.1.3 X-Forward-Email-Website: https://forwardemail.net X-Complaints-To: abuse@forwardemail.net X-Report-Abuse: abuse@forwardemail.net X-Report-Abuse-To: abuse@forwardemail.net From: Jonas Karlman To: Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Yao Zi , Chukun Pan , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jonas Karlman Subject: [PATCH 5/6] dt-bindings: arm: rockchip: Add FriendlyElec NanoPi Zero2 Date: Tue, 8 Jul 2025 22:48:55 +0000 Message-ID: <20250708224921.2254116-6-jonas@kwiboo.se> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250708224921.2254116-1-jonas@kwiboo.se> References: <20250708224921.2254116-1-jonas@kwiboo.se> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The NanoPi Zero2 is small single board computer developed by FriendlyElec, based on the Rockchip RK3528A SoC. Add devicetree binding documentation for the FriendlyElec NanoPi Zero2 board. Signed-off-by: Jonas Karlman --- Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Document= ation/devicetree/bindings/arm/rockchip.yaml index e955e3334e35..a84076841504 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -319,6 +319,11 @@ properties: - friendlyarm,nanopi-r6s - const: rockchip,rk3588s =20 + - description: FriendlyElec NanoPi Zero2 + items: + - const: friendlyarm,nanopi-zero2 + - const: rockchip,rk3528 + - description: FriendlyElec NanoPC T6 series boards items: - enum: --=20 2.49.0 From nobody Tue Oct 7 14:59:16 2025 Received: from smtp.forwardemail.net (smtp.forwardemail.net [149.28.215.223]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E0BE9222594 for ; Tue, 8 Jul 2025 22:50:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=149.28.215.223 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752015013; cv=none; b=KdnW6tqrM47pglRd4ubrj8FCPWKZguQDHBP7eKrigk+erDqbSbUVHThYTB5VWJMuqIhH3cn6DgB9lj09YSTslaCY0CvOzH2g5XcmIAL+JdM901bgZt/8H/oDpOXw1oJ+0EJNSARNVL6qKE2SQqYfftOOb1nX7Hn5mvtvXHh+k9E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752015013; c=relaxed/simple; bh=PRz+jjEm0rck9HVTf4YPDbah0B5T3fLtkJ5O/r5Ydv8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=khMZHvwS2KXWgnyErV05AVR9OU3ZoC3U3vjmIiDjaa+zHqWvr+vfbFiWe7NBgLZbXrWJHc5sZUWokd7KebfTRFScAA1TzsgKXNSXaSuNRhSk5KQE8oM270UvR9/hlcBg9JBpgCAhBrrSiArRoCHCegEzYe3lUAIUb2Y3E0aCn7Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b=HMpCQW3R; arc=none smtp.client-ip=149.28.215.223 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b="HMpCQW3R" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-ID: Date: Subject: Cc: To: From; q=dns/txt; s=fe-e1b5cab7be; t=1752015011; bh=AaE1Zf0tPosN4O0ohibQWK7rQ9p5L8gIlWL2uprfeeQ=; b=HMpCQW3RqbzfAYoK04j/HRv3LdW8SLBfavpSdwL9mCuxBW6+poYH6l9s37MOXoZKombSnpVZ8 VnYyuJhY+tkC0gArfXVhjZU5fv58+FaAo3rr+ebblIdtx/GZvEgjEctWDY1YqSuPArDHdmfoYR5 gfrOtBpoguxtt12AYlSMShGZ+uUOpuG2pmsbnccR4hGcKsim5FoFMDecIMJqdAjGAMbpe6LDgAN twrqcf7esfQSxAWrSKrq4G2oKhxgj56rmusTqmqRNA7HP5TiMCvv3pv+scrTe5wp2Nr0dYBLkep VQzdy/hAi+dGGcborJqe61CCD/W5utL2POFZpvhY28YQ== X-Forward-Email-ID: 686da09c75317ad3cfdad45b X-Forward-Email-Sender: rfc822; jonas@kwiboo.se, smtp.forwardemail.net, 149.28.215.223 X-Forward-Email-Version: 1.1.3 X-Forward-Email-Website: https://forwardemail.net X-Complaints-To: abuse@forwardemail.net X-Report-Abuse: abuse@forwardemail.net X-Report-Abuse-To: abuse@forwardemail.net From: Jonas Karlman To: Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Yao Zi , Chukun Pan , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jonas Karlman Subject: [PATCH 6/6] arm64: dts: rockchip: Add FriendlyElec NanoPi Zero2 Date: Tue, 8 Jul 2025 22:48:56 +0000 Message-ID: <20250708224921.2254116-7-jonas@kwiboo.se> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250708224921.2254116-1-jonas@kwiboo.se> References: <20250708224921.2254116-1-jonas@kwiboo.se> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The NanoPi Zero2 is a small single board computer developed by FriendlyElec, based on the Rockchip RK3528A SoC. Add initial device tree for the FriendlyElec NanoPi Zero2 board. Signed-off-by: Jonas Karlman Tested-by: Yao Zi --- Schematics: https://wiki.friendlyelec.com/wiki/images/3/37/NanoPi_Zero2_240= 7_SCH.pdf --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3528-nanopi-zero2.dts | 341 ++++++++++++++++++ 2 files changed, 342 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index e86131b03692..8e95b5620af1 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -90,6 +90,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399-sapphire.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399-sapphire-excavator.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399pro-rock-pi-n10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3528-armsom-sige1.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3528-nanopi-zero2.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3528-radxa-e20c.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3528-rock-2a.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3528-rock-2f.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts b/arch/ar= m64/boot/dts/rockchip/rk3528-nanopi-zero2.dts new file mode 100644 index 000000000000..8bc5da9f24c3 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts @@ -0,0 +1,341 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include +#include +#include +#include "rk3528.dtsi" + +/ { + model =3D "FriendlyElec NanoPi Zero2"; + compatible =3D "friendlyarm,nanopi-zero2", "rockchip,rk3528"; + + aliases { + ethernet0 =3D &gmac1; + i2c1 =3D &i2c1; + mmc0 =3D &sdhci; + mmc1 =3D &sdmmc; + serial0 =3D &uart0; + }; + + chosen { + stdout-path =3D "serial0:1500000n8"; + }; + + adc-keys-0 { + compatible =3D "adc-keys"; + io-channels =3D <&saradc 0>; + io-channel-names =3D "buttons"; + keyup-threshold-microvolt =3D <1800000>; + poll-interval =3D <100>; + + button-maskrom { + label =3D "MASK"; + linux,code =3D ; + press-threshold-microvolt =3D <0>; + }; + }; + + adc-keys-1 { + compatible =3D "adc-keys"; + io-channels =3D <&saradc 1>; + io-channel-names =3D "buttons"; + keyup-threshold-microvolt =3D <1800000>; + poll-interval =3D <100>; + + button-recovery { + label =3D "RECOVERY"; + linux,code =3D ; + press-threshold-microvolt =3D <0>; + }; + }; + + leds { + compatible =3D "gpio-leds"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&led1>, <&led_sys>; + + led-1 { + color =3D ; + default-state =3D "on"; + function =3D LED_FUNCTION_STATUS; + gpios =3D <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>; + linux,default-trigger =3D "default-on"; + }; + + led-sys { + color =3D ; + default-state =3D "on"; + function =3D LED_FUNCTION_HEARTBEAT; + gpios =3D <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; + linux,default-trigger =3D "heartbeat"; + }; + }; + + vcc0v6_ddr: regulator-0v6-vcc-ddr { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc0v6_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <600000>; + regulator-max-microvolt =3D <600000>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vdd_0v9: regulator-0v9-vdd { + compatible =3D "regulator-fixed"; + regulator-name =3D "vdd_0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vcc_ddr: regulator-1v1-vcc-ddr { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1100000>; + regulator-max-microvolt =3D <1100000>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vcc_1v8: regulator-1v8-vcc { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + vin-supply =3D <&vcc_3v3>; + }; + + vcc_3v3: regulator-3v3-vcc { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vcc3v3_sd: regulator-3v3-vcc-sd { + compatible =3D "regulator-fixed"; + gpios =3D <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sdmmc_pwren_l>; + regulator-name =3D "vcc3v3_sd"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&vcc_3v3>; + }; + + vcc5v0_sys: regulator-5v0-vcc-sys { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + }; + + usb2_host_5v: regulator-5v0-usb2-host { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb20_host1_pwren>; + regulator-name =3D "usb2_host_5v"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vccio_sd: regulator-vccio-sd { + compatible =3D "regulator-gpio"; + gpios =3D <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sdmmc_vol_ctrl_h>; + regulator-name =3D "vccio_sd"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + states =3D <1800000 0x0>, <3300000 0x1>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vdd_arm: regulator-vdd-arm { + compatible =3D "pwm-regulator"; + pwms =3D <&pwm1 0 5000 PWM_POLARITY_INVERTED>; + pwm-supply =3D <&vcc5v0_sys>; + regulator-name =3D "vdd_arm"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <746000>; + regulator-max-microvolt =3D <1201000>; + regulator-settling-time-up-us =3D <250>; + }; + + vdd_logic: regulator-vdd-logic { + compatible =3D "pwm-regulator"; + pwms =3D <&pwm2 0 5000 PWM_POLARITY_INVERTED>; + pwm-supply =3D <&vcc5v0_sys>; + regulator-name =3D "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <705000>; + regulator-max-microvolt =3D <1006000>; + regulator-settling-time-up-us =3D <250>; + }; +}; + +&cpu0 { + cpu-supply =3D <&vdd_arm>; +}; + +&cpu1 { + cpu-supply =3D <&vdd_arm>; +}; + +&cpu2 { + cpu-supply =3D <&vdd_arm>; +}; + +&cpu3 { + cpu-supply =3D <&vdd_arm>; +}; + +&gmac1 { + clock_in_out =3D "output"; + phy-handle =3D <&rgmii_phy>; + phy-mode =3D "rgmii-id"; + phy-supply =3D <&vcc_3v3>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&rgmii_miim>, <&rgmii_tx_bus2>, <&rgmii_rx_bus2>, + <&rgmii_rgmii_clk>, <&rgmii_rgmii_bus>; + status =3D "okay"; +}; + +&gpu { + mali-supply =3D <&vdd_logic>; + status =3D "okay"; +}; + +&i2c1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c1m0_xfer>; + status =3D "okay"; + + hym8563: rtc@51 { + compatible =3D "haoyu,hym8563"; + reg =3D <0x51>; + #clock-cells =3D <0>; + clock-output-names =3D "hym8563"; + interrupt-parent =3D <&gpio4>; + interrupts =3D ; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&rtc_int_l>; + wakeup-source; + }; +}; + +&mdio1 { + rgmii_phy: ethernet-phy@1 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <0x1>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&gmac1_rstn_l>; + reset-assert-us =3D <20000>; + reset-deassert-us =3D <100000>; + reset-gpios =3D <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>; + }; +}; + +&pinctrl { + ethernet { + gmac1_rstn_l: gmac1-rstn-l { + rockchip,pins =3D <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + leds { + led1: led1 { + rockchip,pins =3D <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + led_sys: led-sys { + rockchip,pins =3D <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + rtc { + rtc_int_l: rtc-int-l { + rockchip,pins =3D <4 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + sdmmc { + sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h { + rockchip,pins =3D <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + sdmmc_pwren_l: sdmmc-pwren-l { + rockchip,pins =3D <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb { + usb20_host1_pwren: usb20-host1-pwren { + rockchip,pins =3D <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pwm1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pwm1m0_pins>; + status =3D "okay"; +}; + +&pwm2 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pwm2m0_pins>; + status =3D "okay"; +}; + +&saradc { + vref-supply =3D <&vcc_1v8>; + status =3D "okay"; +}; + +&sdhci { + bus-width =3D <8>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + no-sd; + no-sdio; + non-removable; + vmmc-supply =3D <&vcc_3v3>; + vqmmc-supply =3D <&vcc_1v8>; + status =3D "okay"; +}; + +&sdmmc { + bus-width =3D <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + sd-uhs-sdr104; + vmmc-supply =3D <&vcc3v3_sd>; + vqmmc-supply =3D <&vccio_sd>; + status =3D "okay"; +}; + +&uart0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&uart0m0_xfer>; + status =3D "okay"; +}; --=20 2.49.0