From nobody Tue Oct 7 16:40:38 2025 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9E6792264B0; Tue, 8 Jul 2025 13:46:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751982383; cv=none; b=Aqph0V31emn/uBIpsGI1gReKoFakDqdC0rEv7jZjXFvCBdVRNTzmIWsuZQ0zoi3Xby1DLb2yjByF3t/818PJQJqWwZsh1ga1DPijPS7LowgFv5rgiCPuQi2Mg69lL9aXhjrKnQ/fT9XwezhbK7WI4c7DnHI4GpRfPQ+jmfXTv4k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751982383; c=relaxed/simple; bh=Lr82PX4N9X+gT/KdYsj2EuGP+lYsxw1GdqaGQp3vXVk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=p/mdvUlWgdz4GXQn1YTMYMYQ26NHR0eMyt9vbx5juysGV0+FMS+UxVAjk6AikmHwXXPnE26sIqTDxdY41dOHjtAS+5u9McAqw6AaE7vBEjqrhJkPVYz5IsS3Gp8S6rhFfNll1I4F+cL1ZWJTmm9BKpXgDy4h3azVRDaW9ytehXg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=Wh2downz; arc=none smtp.client-ip=217.70.183.200 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="Wh2downz" Received: by mail.gandi.net (Postfix) with ESMTPSA id 76FD743976; Tue, 8 Jul 2025 13:46:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1751982378; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=s93gvfxLj9zjVh9uh/NE71PGdJHBQa7yq+J70RRMUSE=; b=Wh2downz8CN8sgA4aTQ2S/65CbphBuLUPWaAIWemfwsy80Wc+9dgyrUjE+vQmVX5HogWXV DaLKXC3YiuWAblVq8e6RHZEEa7S1MeMMg33NADX5MQXU5hqwtqFaAASHTauwOrovEnspwb 5xbR7n31gT7HQcu25m+Jv5qjKNQM9uF8hkM6fvqFDvX5r+z+fM0qn04ILiN9nXHygPJTfq ez/3xEPeZnMA6DEkq/QYxv6caxHRh4aIOs0bnSbz3uXxUOxL2YpeNEp+fTKcJg+O2dxp89 tLWpM/UXsS+SA4+ur6CsgMkH+OBc6WdcRNyb9YoIS04eVvLVinNoB7XS+qGoCg== From: Gregory CLEMENT Date: Tue, 08 Jul 2025 15:46:11 +0200 Subject: [PATCH v3 1/2] MIPS: CPS: Improve mips_cps_first_online_in_cluster() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250708-smp_calib-v3-1-6dabf01a7d9f@bootlin.com> References: <20250708-smp_calib-v3-0-6dabf01a7d9f@bootlin.com> In-Reply-To: <20250708-smp_calib-v3-0-6dabf01a7d9f@bootlin.com> To: Thomas Bogendoerfer Cc: Jiaxun Yang , Vladimir Kondratiev , =?utf-8?q?Th=C3=A9o_Lebrun?= , Tawfik Bayouk , Thomas Petazzoni , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Gregory CLEMENT X-Mailer: b4 0.14.2 X-GND-State: clean X-GND-Score: -100 X-GND-Cause: gggruggvucftvghtrhhoucdtuddrgeeffedrtdefgdefgeekfecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfitefpfffkpdcuggftfghnshhusghstghrihgsvgenuceurghilhhouhhtmecufedtudenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurhephfffufggtgfgkfhfjgfvvefosehtjeertdertdejnecuhfhrohhmpefirhgvghhorhihucevnffgoffgpffvuceoghhrvghgohhrhidrtghlvghmvghnthessghoohhtlhhinhdrtghomheqnecuggftrfgrthhtvghrnhepfedvffevfefhieefteeuieeuleevgffhveegvdegueegjeehfeejudettdegvdffnecukfhppedvrgdtudemtggsudegmeehheeimeejrgdttdemieejgedtmeeftdgrleemheguleejmegrvdegleenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepihhnvghtpedvrgdtudemtggsudegmeehheeimeejrgdttdemieejgedtmeeftdgrleemheguleejmegrvdegledphhgvlhhopehlohgtrghlhhhoshhtpdhmrghilhhfrhhomhepghhrvghgohhrhidrtghlvghmvghnthessghoohhtlhhinhdrtghomhdpnhgspghrtghpthhtohepledprhgtphhtthhopehgrhgvghhorhihrdgtlhgvmhgvnhhtsegsohhothhlihhnrdgtohhmpdhrtghpthhtohepthhhohhmrghsrdhpvghtrgiiiihonhhisegsohhothhlihhnrdgtohhmpdhrtghpthhtohepthhssghoghgvnhgusegrlhhphhgrrdhfr hgrnhhkvghnrdguvgdprhgtphhtthhopehvlhgrughimhhirhdrkhhonhgurhgrthhivghvsehmohgsihhlvgihvgdrtghomhdprhgtphhtthhopehjihgrgihunhdrhigrnhhgsehflhihghhorghtrdgtohhmpdhrtghpthhtohepthgrfihfihhkrdgsrgihohhukhesmhhosghilhgvhigvrdgtohhmpdhrtghpthhtoheplhhinhhugidqkhgvrhhnvghlsehvghgvrhdrkhgvrhhnvghlrdhorhhgpdhrtghpthhtohepthhhvghordhlvggsrhhunhessghoohhtlhhinhdrtghomh X-GND-Sasl: gregory.clement@bootlin.com The initial implementation of this function goes through all the CPUs in a cluster to determine if the current CPU is the only one running. This process occurs every time the function is called. However, during boot, we already perform this task, so let's take advantage of this opportunity to create and fill a CPU bitmask that can be easily and efficiently used later. This patch modifies the function to allow providing the first available online CPU when one already exists, which is necessary for delay CPU calibration optimization. Signed-off-by: Gregory CLEMENT Reviewed-by: Jiaxun Yang --- arch/mips/include/asm/mips-cps.h | 4 +++- arch/mips/include/asm/smp-cps.h | 1 + arch/mips/kernel/mips-cm.c | 47 ++++++++++++++----------------------= ---- arch/mips/kernel/smp-cps.c | 5 ++++- 4 files changed, 24 insertions(+), 33 deletions(-) diff --git a/arch/mips/include/asm/mips-cps.h b/arch/mips/include/asm/mips-= cps.h index 917009b80e6951dc7e2b308ad7fb42cd9fbbf7d7..1fffd47a4564fb891d3c1e3ae38= 95b34d6700e5e 100644 --- a/arch/mips/include/asm/mips-cps.h +++ b/arch/mips/include/asm/mips-cps.h @@ -258,6 +258,8 @@ static inline bool mips_cps_multicluster_cpus(void) =20 /** * mips_cps_first_online_in_cluster() - Detect if CPU is first online in c= luster + * @first_cpu: The first other online CPU in cluster, or nr_cpu_ids if + * the function returns true. * * Determine whether the local CPU is the first to be brought online in its * cluster - that is, whether there are any other online CPUs in the local @@ -265,6 +267,6 @@ static inline bool mips_cps_multicluster_cpus(void) * * Returns true if this CPU is first online, else false. */ -extern unsigned int mips_cps_first_online_in_cluster(void); +extern unsigned int mips_cps_first_online_in_cluster(int *first_cpu); =20 #endif /* __MIPS_ASM_MIPS_CPS_H__ */ diff --git a/arch/mips/include/asm/smp-cps.h b/arch/mips/include/asm/smp-cp= s.h index 10d3ebd890cb2f3ac2b1db5a541cfe9e7f1a0c99..88cfae5d22c83e44451200ad3da= ae12fced03303 100644 --- a/arch/mips/include/asm/smp-cps.h +++ b/arch/mips/include/asm/smp-cps.h @@ -24,6 +24,7 @@ struct core_boot_config { =20 struct cluster_boot_config { unsigned long *core_power; + struct cpumask cpumask; struct core_boot_config *core_config; }; =20 diff --git a/arch/mips/kernel/mips-cm.c b/arch/mips/kernel/mips-cm.c index 43cb1e20baed3648ff83bb5d3bbe6a726072e063..f49138f551d3c347c6a98afe05a= d5027b0d91637 100644 --- a/arch/mips/kernel/mips-cm.c +++ b/arch/mips/kernel/mips-cm.c @@ -10,6 +10,7 @@ #include =20 #include +#include #include =20 void __iomem *mips_gcr_base; @@ -529,39 +530,23 @@ void mips_cm_error_report(void) write_gcr_error_cause(cm_error); } =20 -unsigned int mips_cps_first_online_in_cluster(void) +unsigned int mips_cps_first_online_in_cluster(int *first_cpu) { - unsigned int local_cl; - int i; - - local_cl =3D cpu_cluster(¤t_cpu_data); + unsigned int local_cl =3D cpu_cluster(¤t_cpu_data); + struct cpumask *local_cl_mask; =20 /* - * We rely upon knowledge that CPUs are numbered sequentially by - * cluster - ie. CPUs 0..X will be in cluster 0, CPUs X+1..Y in cluster - * 1, CPUs Y+1..Z in cluster 2 etc. This means that CPUs in the same - * cluster will immediately precede or follow one another. - * - * First we scan backwards, until we find an online CPU in the cluster - * or we move on to another cluster. + * mips_cps_cluster_bootcfg is allocated in cps_prepare_cpus. If it is + * not yet done, then we are so early that only one CPU is running, so + * it is the first online CPU in the cluster. */ - for (i =3D smp_processor_id() - 1; i >=3D 0; i--) { - if (cpu_cluster(&cpu_data[i]) !=3D local_cl) - break; - if (!cpu_online(i)) - continue; - return false; - } - - /* Then do the same for higher numbered CPUs */ - for (i =3D smp_processor_id() + 1; i < nr_cpu_ids; i++) { - if (cpu_cluster(&cpu_data[i]) !=3D local_cl) - break; - if (!cpu_online(i)) - continue; - return false; - } - - /* We found no online CPUs in the local cluster */ - return true; + if (mips_cps_cluster_bootcfg) + local_cl_mask =3D &mips_cps_cluster_bootcfg[local_cl].cpumask; + else + return true; + + *first_cpu =3D cpumask_any_and_but(local_cl_mask, + cpu_online_mask, + smp_processor_id()); + return (*first_cpu >=3D nr_cpu_ids); } diff --git a/arch/mips/kernel/smp-cps.c b/arch/mips/kernel/smp-cps.c index 7b0e69af4097025196b93115139a5e89c1d71fcc..6c5f15293a8e58a701601b242f4= 3ba19a6814f06 100644 --- a/arch/mips/kernel/smp-cps.c +++ b/arch/mips/kernel/smp-cps.c @@ -283,7 +283,7 @@ static void __init cps_smp_setup(void) =20 static void __init cps_prepare_cpus(unsigned int max_cpus) { - unsigned int nclusters, ncores, core_vpes, c, cl, cca; + unsigned int nclusters, ncores, core_vpes, nvpe =3D 0, c, cl, cca; bool cca_unsuitable, cores_limited; struct cluster_boot_config *cluster_bootcfg; struct core_boot_config *core_bootcfg; @@ -356,10 +356,13 @@ static void __init cps_prepare_cpus(unsigned int max_= cpus) =20 /* Allocate VPE boot configuration structs */ for (c =3D 0; c < ncores; c++) { + int v; core_vpes =3D core_vpe_count(cl, c); core_bootcfg[c].vpe_config =3D kcalloc(core_vpes, sizeof(*core_bootcfg[c].vpe_config), GFP_KERNEL); + for (v =3D 0; v < core_vpes; v++) + cpumask_set_cpu(nvpe++, &mips_cps_cluster_bootcfg[cl].cpumask); if (!core_bootcfg[c].vpe_config) goto err_out; } --=20 2.47.2 From nobody Tue Oct 7 16:40:38 2025 Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [217.70.183.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0315422DA15; Tue, 8 Jul 2025 13:46:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="Z9L5syEc" Received: by mail.gandi.net (Postfix) with ESMTPSA id 8292243A23; Tue, 8 Jul 2025 13:46:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1751982380; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ynEjQanVjx7lJcfMhqKPdS9j3JjYwrWdI9qW+hDgZ4c=; b=Z9L5syEcixFSUv0ag2d92k4CL1O6UB7JVgtkpbULM3NuUC+0rvcLJFxn9Yb4YVMzJ02rc4 yk7n1ZIUuBXUqLBw3PgV7hOkvZCwXXPTYW4TrXJYZaSn7hxWUiqH1UNNLRdjZzjfmXmd7U wCLztpxdlqKnJPFF+NxNKJq0mEtuoAv6MXkg36m/BSc3ZwZ+MqAPuD4j538apDAFOg3gIf bUiS5dDJGd8rRFmhNqZwhBoQBKHyImNtqc17UA4qxkn82xPx33EjGGzbsr4TPPUFmfg0yW 3Re5BBrNF3q//1TrLHO/cC3I08YfbEusZWxOGLJDcmBIiNOG0RadcokfarEevA== From: Gregory CLEMENT Date: Tue, 08 Jul 2025 15:46:12 +0200 Subject: [PATCH v3 2/2] MIPS: CPS: Optimise delay CPU calibration for SMP Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250708-smp_calib-v3-2-6dabf01a7d9f@bootlin.com> References: <20250708-smp_calib-v3-0-6dabf01a7d9f@bootlin.com> In-Reply-To: <20250708-smp_calib-v3-0-6dabf01a7d9f@bootlin.com> To: Thomas Bogendoerfer Cc: Jiaxun Yang , Vladimir Kondratiev , =?utf-8?q?Th=C3=A9o_Lebrun?= , Tawfik Bayouk , Thomas Petazzoni , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Gregory CLEMENT X-Mailer: b4 0.14.2 X-GND-State: clean X-GND-Score: -100 X-GND-Cause: gggruggvucftvghtrhhoucdtuddrgeeffedrtdefgdefgeekfecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfitefpfffkpdcuggftfghnshhusghstghrihgsvgenuceurghilhhouhhtmecufedtudenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurhephfffufggtgfgkfhfjgfvvefosehtjeertdertdejnecuhfhrohhmpefirhgvghhorhihucevnffgoffgpffvuceoghhrvghgohhrhidrtghlvghmvghnthessghoohhtlhhinhdrtghomheqnecuggftrfgrthhtvghrnhepfedvffevfefhieefteeuieeuleevgffhveegvdegueegjeehfeejudettdegvdffnecukfhppedvrgdtudemtggsudegmeehheeimeejrgdttdemieejgedtmeeftdgrleemheguleejmegrvdegleenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepihhnvghtpedvrgdtudemtggsudegmeehheeimeejrgdttdemieejgedtmeeftdgrleemheguleejmegrvdegledphhgvlhhopehlohgtrghlhhhoshhtpdhmrghilhhfrhhomhepghhrvghgohhrhidrtghlvghmvghnthessghoohhtlhhinhdrtghomhdpnhgspghrtghpthhtohepledprhgtphhtthhopehgrhgvghhorhihrdgtlhgvmhgvnhhtsegsohhothhlihhnrdgtohhmpdhrtghpthhtohepthhhohhmrghsrdhpvghtrgiiiihonhhisegsohhothhlihhnrdgtohhmpdhrtghpthhtohepthhssghoghgvnhgusegrlhhphhgrrdhfr hgrnhhkvghnrdguvgdprhgtphhtthhopehvlhgrughimhhirhdrkhhonhgurhgrthhivghvsehmohgsihhlvgihvgdrtghomhdprhgtphhtthhopehjihgrgihunhdrhigrnhhgsehflhihghhorghtrdgtohhmpdhrtghpthhtohepthgrfihfihhkrdgsrgihohhukhesmhhosghilhgvhigvrdgtohhmpdhrtghpthhtoheplhhinhhugidqkhgvrhhnvghlsehvghgvrhdrkhgvrhhnvghlrdhorhhgpdhrtghpthhtohepthhhvghordhlvggsrhhunhessghoohhtlhhinhdrtghomh X-GND-Sasl: gregory.clement@bootlin.com On MIPS architecture with CPS-based SMP support, all CPU cores in the same cluster run at the same frequency since they share the same L2 cache, requiring a fixed CPU/L2 cache ratio. This allows to implement calibrate_delay_is_known(), which will return 0 (triggering calibration) only for the primary CPU of each cluster. For other CPUs, we can simply reuse the value from their cluster's primary CPU core. With the introduction of this patch, a configuration running 32 cores spread across two clusters sees a significant reduction in boot time by approximately 600 milliseconds. Signed-off-by: Gregory CLEMENT Reviewed-by: Jiaxun Yang --- arch/mips/kernel/smp-cps.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/mips/kernel/smp-cps.c b/arch/mips/kernel/smp-cps.c index 6c5f15293a8e58a701601b242f43ba19a6814f06..22d4f9ff3ae2671b07da5bb1491= 54c686e07b209 100644 --- a/arch/mips/kernel/smp-cps.c +++ b/arch/mips/kernel/smp-cps.c @@ -281,6 +281,17 @@ static void __init cps_smp_setup(void) #endif /* CONFIG_MIPS_MT_FPAFF */ } =20 +unsigned long calibrate_delay_is_known(void) +{ + int first_cpu_cluster =3D 0; + + /* The calibration has to be done on the primary CPU of the cluster */ + if (mips_cps_first_online_in_cluster(&first_cpu_cluster)) + return 0; + + return cpu_data[first_cpu_cluster].udelay_val; +} + static void __init cps_prepare_cpus(unsigned int max_cpus) { unsigned int nclusters, ncores, core_vpes, nvpe =3D 0, c, cl, cca; --=20 2.47.2