From nobody Tue Oct 7 16:38:16 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 14E08224B0D for ; Tue, 8 Jul 2025 19:37:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752003438; cv=none; b=mM9hFUB+Bmh/hjVwur7h+p8f/YYP+JhBKNtOAXB1B2jCLO830UN6v7iJX6IP546v9fbOnzHm0oM25Wj2I6ymb/oPYBcHXYoXTR08IwXXb5jaB5WqtoMW9PaRxkuwWU88J/5RwhMzOCvDY1MfweF/J66h3P779X9aJuOcraeG1to= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752003438; c=relaxed/simple; bh=QvHYoBZpVNwqNTbauHVKNfMaD6wc++kyq4PE4rdkCb0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=W/KtDuvMS/oPMhiZhlxcFnoA9/T/7NepudwliV/p1TOexXJ7wKTub+ipnKgs2iQpAwJwr1RVj1ThSJxeTyXVtVSNruQVUkRrxO8jphTzWXjSssU+fvdnAP8hp2H1CS+xXiRp5PfZybYM6mAPeeeLglFw7DMQq8rc9SCw6lN0O78= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=EcAxHAY/; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="EcAxHAY/" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1752003435; bh=QvHYoBZpVNwqNTbauHVKNfMaD6wc++kyq4PE4rdkCb0=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=EcAxHAY/gAzDlJ8OuP0RnmQoB5gCPVnyZ+7wl39KWyUZVDs2xcgnjCjFmUHe6GA7q XaGXzr2YTK2N+/EDjVkWS9g5m2fsin13vkvBXUP57yt6bt6xafUVnIspojApW54Et5 A5UWVFKnXwoeEU6S658CjhDw/EzhEWBPQc+OBNTv+QVRYhyiplhjbqu4YWFaYjB8F7 iWehbKrNXieTVV9Z3s8bUjrHB657KchE+hhoxHe4Rp4q8PA1XIMv70z7XtpSyNnGAx 9owgGSAVDUDZTuhtuglCGJfPfI2tP97VHh86c4FW2L8U6PIBxjN6viOHaSEvwkBxFZ vgUYrsAilAb1A== Received: from localhost (unknown [212.93.144.165]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with UTF8SMTPSA id 2840517E0CF8; Tue, 8 Jul 2025 21:37:15 +0200 (CEST) From: Cristian Ciocaltea Date: Tue, 08 Jul 2025 22:35:44 +0300 Subject: [PATCH 03/12] phy: rockchip: samsung-hdptx: Prevent Inter-Pair Skew from exceeding the limits Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250708-phy-hdptx-frl-v1-3-cfe096e224f4@collabora.com> References: <20250708-phy-hdptx-frl-v1-0-cfe096e224f4@collabora.com> In-Reply-To: <20250708-phy-hdptx-frl-v1-0-cfe096e224f4@collabora.com> To: Vinod Koul , Kishon Vijay Abraham I , Heiko Stuebner , Algea Cao Cc: kernel@collabora.com, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.14.2 Fixup PHY deskew FIFO to prevent the phase of D2 lane going ahead of other lanes. It's worth noting this might only happen when dealing with HDMI 2.0 rates. Fixes: 553be2830c5f ("phy: rockchip: Add Samsung HDMI/eDP Combo PHY driver") Co-developed-by: Algea Cao Signed-off-by: Algea Cao Signed-off-by: Cristian Ciocaltea --- drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/ph= y/rockchip/phy-rockchip-samsung-hdptx.c index d7d6c1ebacc890e257c1550210ee144387ef7183..2dd70f0cd8de34aad957d4d1463= 66e5521cd897e 100644 --- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c +++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c @@ -668,13 +668,9 @@ static const struct reg_sequence rk_hdtpx_common_lane_= init_seq[] =3D { =20 static const struct reg_sequence rk_hdtpx_tmds_lane_init_seq[] =3D { REG_SEQ0(LANE_REG(0312), 0x00), - REG_SEQ0(LANE_REG(031e), 0x00), REG_SEQ0(LANE_REG(0412), 0x00), - REG_SEQ0(LANE_REG(041e), 0x00), REG_SEQ0(LANE_REG(0512), 0x00), - REG_SEQ0(LANE_REG(051e), 0x00), REG_SEQ0(LANE_REG(0612), 0x00), - REG_SEQ0(LANE_REG(061e), 0x08), REG_SEQ0(LANE_REG(0303), 0x2f), REG_SEQ0(LANE_REG(0403), 0x2f), REG_SEQ0(LANE_REG(0503), 0x2f), @@ -687,6 +683,11 @@ static const struct reg_sequence rk_hdtpx_tmds_lane_in= it_seq[] =3D { REG_SEQ0(LANE_REG(0406), 0x1c), REG_SEQ0(LANE_REG(0506), 0x1c), REG_SEQ0(LANE_REG(0606), 0x1c), + /* Keep Inter-Pair Skew in the limits */ + REG_SEQ0(LANE_REG(031e), 0x02), + REG_SEQ0(LANE_REG(041e), 0x02), + REG_SEQ0(LANE_REG(051e), 0x02), + REG_SEQ0(LANE_REG(061e), 0x0a), }; =20 static struct tx_drv_ctrl tx_drv_ctrl_rbr[4][4] =3D { --=20 2.50.0