From nobody Tue Oct 7 18:24:28 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3F4E0233D7C; Mon, 7 Jul 2025 16:49:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751906990; cv=none; b=hXc9hKkZ6cjRPHuafodQtGmEpexmppJHvYSAOUkJmzpJvbBNsGAMCPfhurdWv/V/uKAZPEZxc0sE5cvBmXe+ENeOUsq/l1ieJZ2jzXQjnIiRdtWgFeDu1eExB2mLdqSzI7plWndpo2xTvvArDhWnIJIZnGYVIWxncxN8n0khyZ0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751906990; c=relaxed/simple; bh=/3CwDimBmAAFenMGSw7r5KRs4qtqpBFYctyMFe1V+IE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Eb7pUBp1H2C2iAUQHneuMhXKuq/sJluYJfo2dV0crS9WK+WFUYTrfYHwsAcnuRZhiCZJuNcjCdrPg8w1P386pSy26PTdf/me/QtWY8hSfcheYggKfAxbbm01ORVaiBw87NbTq3YBf11EckW6ySsJ7UV4qwKWGHqd3IArtrj8zAE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=rblIXFTo; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="rblIXFTo" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=Sab3PBZsYV+Qg8JG/2ark+p+RM4PexQTwQc3BCtUEOQ=; b=rblIXFToZUEfu3MV05/8H8SEQF bYqLZZeXf7U1nmiPSumzkIidH3TEM89H9qDFc5mRLV8/3T0VJn3UPBBk8qmmR0CSZt5lyqQSTpfzY EKAshbgRKHRsEIfnvv1DJX9zOoYcXLFVb0F26SuTIcqPJCRSVcQBjsLglVVkI/6wY2ATTGswflbBD 97lRqb3sCXs2RUXOVeeYKAZ4Ihrw4ESCnJyVLpJC7Cw9kNIKzDHJUBaITGHPJRLqfj/jiGvfaTih4 sI/AFWak2UsTXo/s7Z3lGt7LYHdH4Su8vcUaBwYclo/GZJqrmn4bRWw4ortlYD9CkWTz1oE4loYy7 eaqaf+5w==; Received: from i53875bf5.versanet.de ([83.135.91.245] helo=localhost.localdomain) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1uYp1p-0004yl-JE; Mon, 07 Jul 2025 18:49:17 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: neil.armstrong@linaro.org, quic_jesszhan@quicinc.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, hjc@rock-chips.com, andy.yan@rock-chips.com, andyshrk@163.com, nicolas.frattaroli@collabora.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH 01/13] drm/panel: ilitek-ili9881c: turn off power-supply when init fails Date: Mon, 7 Jul 2025 18:48:54 +0200 Message-ID: <20250707164906.1445288-2-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250707164906.1445288-1-heiko@sntech.de> References: <20250707164906.1445288-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The prepare function turns on the power-supply regulator first, when preparing the display. But in an error case, just returns the error code, but does not power off the regulator again, fix that. Signed-off-by: Heiko Stuebner Reviewed-by: Neil Armstrong --- drivers/gpu/drm/panel/panel-ilitek-ili9881c.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c b/drivers/gpu/dr= m/panel/panel-ilitek-ili9881c.c index 28cd7560e5db..d7a17dca2a9c 100644 --- a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c @@ -1292,7 +1292,7 @@ static int ili9881c_prepare(struct drm_panel *panel) instr->arg.cmd.data); =20 if (ret) - return ret; + goto disable_power; } =20 ret =3D ili9881c_switch_page(ctx, 0); @@ -1304,18 +1304,22 @@ static int ili9881c_prepare(struct drm_panel *panel) &ctx->address_mode, sizeof(ctx->address_mode)); if (ret < 0) - return ret; + goto disable_power; } =20 ret =3D mipi_dsi_dcs_set_tear_on(ctx->dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK); if (ret) - return ret; + goto disable_power; =20 ret =3D mipi_dsi_dcs_exit_sleep_mode(ctx->dsi); if (ret) - return ret; + goto disable_power; =20 return 0; + +disable_power: + regulator_disable(ctx->power); + return ret; } =20 static int ili9881c_enable(struct drm_panel *panel) --=20 2.47.2 From nobody Tue Oct 7 18:24:28 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3F477233737; Mon, 7 Jul 2025 16:49:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751906989; cv=none; b=QH1jwPmvoxP/Qc1TshUV+lv+3netYYxQOwP/+8WLLOT7YsBxmPY/VE2Ot0POyTGsEJNtYSUH6bFPuSeb+jb4Ca2+/l+HtRF+2+2Q/YGI6+gqugxvdEFUYNg+V5dz1e7nXjOrejvKZfONn5hvCjqyTyAg3HyUwKC6osfk/06qN4k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751906989; c=relaxed/simple; bh=buO8iFOzPG0Hv2jwbinSmPF51YI6H9mT+HmKeO6CpD8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=R5FEfZsho9FWpqlE70u7LvAwxEaPRHrJhlCiGfcZkhmPfKBrmt2WfD0gblwtFdc1MNMN2adlbVaYL+VX1szRFF70O02qP5X+rINuaUYkdsxcN5I0auep0YrQH+PQ1KFEulHQW5zLZKYmZsQ+a3N3yNNNtGMle5mVePdZocnCcBo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=AIKF8kQR; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="AIKF8kQR" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=YpitKWsGYdvkCnrR1mHFS1FP2h9VNXePXRkQPh7Xnq8=; b=AIKF8kQRHi8mNwcFM+zhxqLyl6 Ge/ez06ZIr4EFSDUVGczPLCZiaO3f+uSZ/kjawcOUBkqqKpCWZmXisTdeZhMnqsvmmQa3W84mTdOl MepxtMwXCbvF4G4403s+qSumq4ZnBZZ9K0wbi8Igi7UHOjqfIUYTeyyy+qNjHUQDHo6s+Z0xbx2mk 5e0BZm/C0w33YqocUYHABh26i0o7cTQHBrrd1Dhrn6BnMVAAu8WgeUqEJuPu5lUQNYrxVY2OPy0GQ OAyekpgppxNmuEd7UKIG3qkt/GJ0x9fy8Rea+CNQH8R0AYcbVI/L7I98pr9USHRgf0e7CZInB0mf5 7vUZrHxw==; Received: from i53875bf5.versanet.de ([83.135.91.245] helo=localhost.localdomain) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1uYp1q-0004yl-A5; Mon, 07 Jul 2025 18:49:18 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: neil.armstrong@linaro.org, quic_jesszhan@quicinc.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, hjc@rock-chips.com, andy.yan@rock-chips.com, andyshrk@163.com, nicolas.frattaroli@collabora.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH 02/13] drm/panel: ilitek-ili9881c: move display_on/_off dcs calls to (un-)prepare Date: Mon, 7 Jul 2025 18:48:55 +0200 Message-ID: <20250707164906.1445288-3-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250707164906.1445288-1-heiko@sntech.de> References: <20250707164906.1445288-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" At least for panel-bridges, the atomic_enable call is defined as being called right after the preceding element in the display pipe is enabled. It is also stated that "The bridge can assume that the display pipe (i.e. clocks and timing signals) feeding it is running when this callback is called" This means the DSI controller driving this display would have already switched over to video-mode from command mode and thus dcs functions should not be called anymore at this point. This caused a non-working display for me, when trying to enable the rk3576 dsi controller using a display using this controller. Therefore move the display_on/off calls the more appropriate prepare/unprepare callbacks. Signed-off-by: Heiko Stuebner Reviewed-by: Neil Armstrong --- drivers/gpu/drm/panel/panel-ilitek-ili9881c.c | 27 +++++-------------- 1 file changed, 7 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c b/drivers/gpu/dr= m/panel/panel-ilitek-ili9881c.c index d7a17dca2a9c..a20b52181ea0 100644 --- a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c @@ -1315,35 +1315,24 @@ static int ili9881c_prepare(struct drm_panel *panel) if (ret) goto disable_power; =20 - return 0; - -disable_power: - regulator_disable(ctx->power); - return ret; -} - -static int ili9881c_enable(struct drm_panel *panel) -{ - struct ili9881c *ctx =3D panel_to_ili9881c(panel); - msleep(120); =20 - mipi_dsi_dcs_set_display_on(ctx->dsi); + ret =3D mipi_dsi_dcs_set_display_on(ctx->dsi); + if (ret) + goto disable_power; =20 return 0; -} =20 -static int ili9881c_disable(struct drm_panel *panel) -{ - struct ili9881c *ctx =3D panel_to_ili9881c(panel); - - return mipi_dsi_dcs_set_display_off(ctx->dsi); +disable_power: + regulator_disable(ctx->power); + return ret; } =20 static int ili9881c_unprepare(struct drm_panel *panel) { struct ili9881c *ctx =3D panel_to_ili9881c(panel); =20 + mipi_dsi_dcs_set_display_off(ctx->dsi); mipi_dsi_dcs_enter_sleep_mode(ctx->dsi); regulator_disable(ctx->power); gpiod_set_value_cansleep(ctx->reset, 1); @@ -1499,8 +1488,6 @@ static enum drm_panel_orientation ili9881c_get_orient= ation(struct drm_panel *pan static const struct drm_panel_funcs ili9881c_funcs =3D { .prepare =3D ili9881c_prepare, .unprepare =3D ili9881c_unprepare, - .enable =3D ili9881c_enable, - .disable =3D ili9881c_disable, .get_modes =3D ili9881c_get_modes, .get_orientation =3D ili9881c_get_orientation, }; --=20 2.47.2 From nobody Tue Oct 7 18:24:28 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3525A238C10; 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Mon, 07 Jul 2025 18:49:19 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: neil.armstrong@linaro.org, quic_jesszhan@quicinc.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, hjc@rock-chips.com, andy.yan@rock-chips.com, andyshrk@163.com, nicolas.frattaroli@collabora.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH 03/13] drm/panel: ilitek-ili9881c: convert (un-)prepare to mipi_dsi_multi_context Date: Mon, 7 Jul 2025 18:48:56 +0200 Message-ID: <20250707164906.1445288-4-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250707164906.1445288-1-heiko@sntech.de> References: <20250707164906.1445288-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This saves some lines for error handling. For the address mode change, that value is always an u8, so switching to dcs_write_buffer function should be appropriate. Signed-off-by: Heiko Stuebner Reviewed-by: Neil Armstrong --- drivers/gpu/drm/panel/panel-ilitek-ili9881c.c | 66 ++++++------------- 1 file changed, 21 insertions(+), 45 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c b/drivers/gpu/dr= m/panel/panel-ilitek-ili9881c.c index a20b52181ea0..154eea5f4d77 100644 --- a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c @@ -1239,33 +1239,24 @@ static inline struct ili9881c *panel_to_ili9881c(st= ruct drm_panel *panel) * So before any attempt at sending a command or data, we have to be * sure if we're in the right page or not. */ -static int ili9881c_switch_page(struct ili9881c *ctx, u8 page) +static void ili9881c_switch_page(struct mipi_dsi_multi_context *mctx, u8 p= age) { u8 buf[4] =3D { 0xff, 0x98, 0x81, page }; - int ret; - - ret =3D mipi_dsi_dcs_write_buffer(ctx->dsi, buf, sizeof(buf)); - if (ret < 0) - return ret; =20 - return 0; + mipi_dsi_dcs_write_buffer_multi(mctx, buf, sizeof(buf)); } =20 -static int ili9881c_send_cmd_data(struct ili9881c *ctx, u8 cmd, u8 data) +static void ili9881c_send_cmd_data(struct mipi_dsi_multi_context *mctx, u8= cmd, u8 data) { u8 buf[2] =3D { cmd, data }; - int ret; =20 - ret =3D mipi_dsi_dcs_write_buffer(ctx->dsi, buf, sizeof(buf)); - if (ret < 0) - return ret; - - return 0; + mipi_dsi_dcs_write_buffer_multi(mctx, buf, sizeof(buf)); } =20 static int ili9881c_prepare(struct drm_panel *panel) { struct ili9881c *ctx =3D panel_to_ili9881c(panel); + struct mipi_dsi_multi_context mctx =3D { .dsi =3D ctx->dsi }; unsigned int i; int ret; =20 @@ -1286,54 +1277,39 @@ static int ili9881c_prepare(struct drm_panel *panel) const struct ili9881c_instr *instr =3D &ctx->desc->init[i]; =20 if (instr->op =3D=3D ILI9881C_SWITCH_PAGE) - ret =3D ili9881c_switch_page(ctx, instr->arg.page); + ili9881c_switch_page(&mctx, instr->arg.page); else if (instr->op =3D=3D ILI9881C_COMMAND) - ret =3D ili9881c_send_cmd_data(ctx, instr->arg.cmd.cmd, - instr->arg.cmd.data); - - if (ret) - goto disable_power; - } - - ret =3D ili9881c_switch_page(ctx, 0); - if (ret) - return ret; - - if (ctx->address_mode) { - ret =3D mipi_dsi_dcs_write(ctx->dsi, MIPI_DCS_SET_ADDRESS_MODE, - &ctx->address_mode, - sizeof(ctx->address_mode)); - if (ret < 0) - goto disable_power; + ili9881c_send_cmd_data(&mctx, instr->arg.cmd.cmd, + instr->arg.cmd.data); } =20 - ret =3D mipi_dsi_dcs_set_tear_on(ctx->dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK); - if (ret) - goto disable_power; - - ret =3D mipi_dsi_dcs_exit_sleep_mode(ctx->dsi); - if (ret) - goto disable_power; + ili9881c_switch_page(&mctx, 0); =20 - msleep(120); + if (ctx->address_mode) + ili9881c_send_cmd_data(&mctx, MIPI_DCS_SET_ADDRESS_MODE, + ctx->address_mode); =20 - ret =3D mipi_dsi_dcs_set_display_on(ctx->dsi); - if (ret) + mipi_dsi_dcs_set_tear_on_multi(&mctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK); + mipi_dsi_dcs_exit_sleep_mode_multi(&mctx); + mipi_dsi_msleep(&mctx, 120); + mipi_dsi_dcs_set_display_on_multi(&mctx); + if (mctx.accum_err) goto disable_power; =20 return 0; =20 disable_power: regulator_disable(ctx->power); - return ret; + return mctx.accum_err; } =20 static int ili9881c_unprepare(struct drm_panel *panel) { struct ili9881c *ctx =3D panel_to_ili9881c(panel); + struct mipi_dsi_multi_context mctx =3D { .dsi =3D ctx->dsi }; =20 - mipi_dsi_dcs_set_display_off(ctx->dsi); - mipi_dsi_dcs_enter_sleep_mode(ctx->dsi); + mipi_dsi_dcs_set_display_off_multi(&mctx); + mipi_dsi_dcs_enter_sleep_mode_multi(&mctx); regulator_disable(ctx->power); gpiod_set_value_cansleep(ctx->reset, 1); =20 --=20 2.47.2 From nobody Tue Oct 7 18:24:28 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3BDE323507F; Mon, 7 Jul 2025 16:49:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; 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Mon, 07 Jul 2025 18:49:19 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: neil.armstrong@linaro.org, quic_jesszhan@quicinc.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, hjc@rock-chips.com, andy.yan@rock-chips.com, andyshrk@163.com, nicolas.frattaroli@collabora.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH 04/13] dt-bindings: vendor-prefixes: Add prefix for Shenzhen Bestar Electronic Date: Mon, 7 Jul 2025 18:48:57 +0200 Message-ID: <20250707164906.1445288-5-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250707164906.1445288-1-heiko@sntech.de> References: <20250707164906.1445288-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the prefix for Bestar, named in full both on Panelook.com and their display datasheets as Shenzhen Bestar Electronic Technology Co., Ltd. which produces at least DSI displays and maybe more. Signed-off-by: Heiko Stuebner Acked-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Docum= entation/devicetree/bindings/vendor-prefixes.yaml index 5d2a7a8d3ac6..5e066c07c188 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -216,6 +216,8 @@ patternProperties: description: BeagleBoard.org Foundation "^belling,.*": description: Shanghai Belling Co., Ltd. + "^bestar,.*": + description: Shenzhen Bestar Electronic Technology Co., Ltd. "^bhf,.*": description: Beckhoff Automation GmbH & Co. KG "^bigtreetech,.*": --=20 2.47.2 From nobody Tue Oct 7 18:24:28 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3F418233736; Mon, 7 Jul 2025 16:49:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751906989; cv=none; b=RewTBElBmkx51qFg/pF18G9ZVV5VXj5c23HGhxdOnIeppjL2NbS+WWo4ghceMdDxNHAkTz9nUg+afdSDKXodafX5pvwWTGGwFsplp7DKp/v1d0ufS/wf3jceEMhXSn+I6VKLEvu2QpW7uvttV+5IzAUEqAtKuEAQkACBpKG20t0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751906989; c=relaxed/simple; bh=4S0LeobjDGyc9lgYqGWhAm3UdJgbs2RY9qdSzCyZ6nw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=oWeDHOppuAjme9k38qRLkBFHuAqL4wnAySQKDryB5cKCh6rTsrHOQFPGlBTS1ra0Nu7UqOzXDY1Fjox7mFo2/e3/XZLMpX8vxef4Sw6+igYEgXOLzX4UQwYSHpnT1vnfHqY4VNzxwzKyCF/+4ESIywUI2dU8sJGjzEF1MhfiUeY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=yWuK4Eyl; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="yWuK4Eyl" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=z3oo4jp/mWDXJM4loc/Z9mF5O/3QC0Xa5p4jSoWlt2w=; b=yWuK4Eyl5vZRgqKAYAhhf5a2V2 YlX0Lw/Wa+sVwk/B4wvKfqvE8w+bOUD34xSSmYZuyU8sOqi5nRT+hINz0n1t8yzFGR0MqP3z/7HNu e9R8o3Fno1t8YK6atx1BeLyYAX60Dd/5oLfDwuPATN7z2bXqHI/sfs3ayd+uhPiMDWII9ySdIOhi9 9o1yw4343jaz2Ww6Ls3Adlbn42d3HnYgofQc2mCB6VB6xa0c8BPEi6+FbvIjGiw+COVFiEv9n1Str iFMwmDlj5hlBO57U8/27o98u3pFzWrl0vamF83rE9yPF0ItjoFVCAC/qPyuJV1I8D5jzWxKEhsW2/ So/tIGJw==; Received: from i53875bf5.versanet.de ([83.135.91.245] helo=localhost.localdomain) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1uYp1s-0004yl-Ea; Mon, 07 Jul 2025 18:49:20 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: neil.armstrong@linaro.org, quic_jesszhan@quicinc.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, hjc@rock-chips.com, andy.yan@rock-chips.com, andyshrk@163.com, nicolas.frattaroli@collabora.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH 05/13] dt-bindings: display: ili9881c: Add Bestar BSD1218-A101KL68 LCD panel Date: Mon, 7 Jul 2025 18:48:58 +0200 Message-ID: <20250707164906.1445288-6-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250707164906.1445288-1-heiko@sntech.de> References: <20250707164906.1445288-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Document the compatible value for Bestar BSD1218-A101KL68 LCD panels that are based around the ili9881c controller. Signed-off-by: Heiko Stuebner Acked-by: Rob Herring (Arm) --- .../devicetree/bindings/display/panel/ilitek,ili9881c.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/panel/ilitek,ili9881= c.yaml b/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.ya= ml index baf5dfe5f5eb..79064f9dde23 100644 --- a/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml +++ b/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml @@ -18,6 +18,7 @@ properties: - enum: - ampire,am8001280g - bananapi,lhr050h41 + - bestar,bsd1218-a101kl68 - feixin,k101-im2byl02 - startek,kd050hdfia020 - tdo,tl050hdv35 --=20 2.47.2 From nobody Tue Oct 7 18:24:28 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 25C8F23B600; Mon, 7 Jul 2025 16:49:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751906995; cv=none; b=AsBQoBsTI0ekQTG9xHl8otQS57FaZYFPEMadMnxQPEeLvdIqTaE/hrV9Xx0neVlPHwdav+/SWc4uB2xDiM/Nj/XRR1zx5ZtuqrI8lcbLN4Jh9/Cz9pZzbs33dm0rjybnxz/lhckqjD+l3dJsvnS3bXm6n29W73EjR5gHvydCMAE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751906995; c=relaxed/simple; bh=CKWWybGh8y3f8YoKJUzg+wqqKoqY0eT//W7nmhYp9ZU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=d3ttVWsYuonC22R6sl35ApN2YH0bVkMKYVJcen1Whwu802FWjxPdrS0uJkAkTm9hWJKYYRsBd3qZeeR1fakjfpOzijNyadzSQZtYzQJN485P1//TCwZ/3SJOI5cpSpl0kNunSDLUpQLwsnPtLHoqbJfEyJ6dSjCjtUvSiilWE5E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=bg6zCFw9; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="bg6zCFw9" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=UgDyrbY7CdskTK70D5noANtlFt/YxfxBmkElKCjjEWU=; b=bg6zCFw9BsFIzPiBP9J4vDAHQ4 JA5QvATBXNuz2I+Ler6sJCaLkuLTj9MguafUELuCkrTy4PxIevVDmaOaCzUVtqI7lTZg2vhWkizdd qT/TEZDniDNfdrRB3E9jR2THpB08PaMebo+cyw5G1kdONc9h6Z/rZ+R49x1hVMUxH0Kh+YqS49RwZ Qt2mPMKxcU8c/pDMlbYponD9cbfI4rRMieY876kpD5gjP2HurcAE0XW+DJFi8H1Ch0a1SZHKlDvSb 6WHUdeVeYtuW6v8JVKNeycNaTNjV7TdAdz5dZHHxktHi+dsULYhUF0isFzuXfRg31vbDhnai6BQep W1WScSYA==; Received: from i53875bf5.versanet.de ([83.135.91.245] helo=localhost.localdomain) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1uYp1t-0004yl-4W; Mon, 07 Jul 2025 18:49:21 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: neil.armstrong@linaro.org, quic_jesszhan@quicinc.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, hjc@rock-chips.com, andy.yan@rock-chips.com, andyshrk@163.com, nicolas.frattaroli@collabora.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH 06/13] drm/panel: ilitek-ili9881c: Add Bestar BSD1218-A101KL68 support Date: Mon, 7 Jul 2025 18:48:59 +0200 Message-ID: <20250707164906.1445288-7-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250707164906.1445288-1-heiko@sntech.de> References: <20250707164906.1445288-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add support for the Bestar BSD1218-A101KL68 panel. The init table comes from the Firefly BSP ([1]). [1] https://gitlab.com/firefly-linux/kernel/-/blob/rk3588/firefly/arch/arm6= 4/boot/dts/rockchip/aio-3588l-mipi101-BSD1218-A101KL68.dtsi Signed-off-by: Heiko Stuebner Reviewed-by: Neil Armstrong --- drivers/gpu/drm/panel/panel-ilitek-ili9881c.c | 220 ++++++++++++++++++ 1 file changed, 220 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c b/drivers/gpu/dr= m/panel/panel-ilitek-ili9881c.c index 154eea5f4d77..3095a8bd1ebf 100644 --- a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c @@ -1223,6 +1223,200 @@ static const struct ili9881c_instr am8001280g_init[= ] =3D { ILI9881C_COMMAND_INSTR(MIPI_DCS_WRITE_POWER_SAVE, 0x00), }; =20 +static const struct ili9881c_instr bsd1218_a101kl68_init[] =3D { + ILI9881C_SWITCH_PAGE_INSTR(3), + ILI9881C_COMMAND_INSTR(0x01, 0x00), + ILI9881C_COMMAND_INSTR(0x02, 0x00), + ILI9881C_COMMAND_INSTR(0x03, 0x55), + ILI9881C_COMMAND_INSTR(0x04, 0x55), + ILI9881C_COMMAND_INSTR(0x05, 0x03), + ILI9881C_COMMAND_INSTR(0x06, 0x06), + ILI9881C_COMMAND_INSTR(0x07, 0x00), + ILI9881C_COMMAND_INSTR(0x08, 0x07), + ILI9881C_COMMAND_INSTR(0x09, 0x00), + ILI9881C_COMMAND_INSTR(0x0a, 0x00), + ILI9881C_COMMAND_INSTR(0x0b, 0x00), + ILI9881C_COMMAND_INSTR(0x0c, 0x00), + ILI9881C_COMMAND_INSTR(0x0d, 0x00), + ILI9881C_COMMAND_INSTR(0x0e, 0x00), + ILI9881C_COMMAND_INSTR(0x0f, 0x00), + ILI9881C_COMMAND_INSTR(0x10, 0x00), + ILI9881C_COMMAND_INSTR(0x11, 0x00), + ILI9881C_COMMAND_INSTR(0x12, 0x00), + ILI9881C_COMMAND_INSTR(0x13, 0x00), + ILI9881C_COMMAND_INSTR(0x14, 0x00), + ILI9881C_COMMAND_INSTR(0x15, 0x00), + ILI9881C_COMMAND_INSTR(0x16, 0x00), + ILI9881C_COMMAND_INSTR(0x17, 0x00), + ILI9881C_COMMAND_INSTR(0x18, 0x00), + ILI9881C_COMMAND_INSTR(0x19, 0x00), + ILI9881C_COMMAND_INSTR(0x1a, 0x00), + ILI9881C_COMMAND_INSTR(0x1b, 0x00), + ILI9881C_COMMAND_INSTR(0x1c, 0x00), + ILI9881C_COMMAND_INSTR(0x1d, 0x00), + ILI9881C_COMMAND_INSTR(0x1e, 0xc0), + ILI9881C_COMMAND_INSTR(0x1f, 0x80), + ILI9881C_COMMAND_INSTR(0x20, 0x04), + ILI9881C_COMMAND_INSTR(0x21, 0x03), + ILI9881C_COMMAND_INSTR(0x22, 0x00), + ILI9881C_COMMAND_INSTR(0x23, 0x00), + ILI9881C_COMMAND_INSTR(0x24, 0x00), + ILI9881C_COMMAND_INSTR(0x25, 0x00), + ILI9881C_COMMAND_INSTR(0x26, 0x00), + ILI9881C_COMMAND_INSTR(0x27, 0x00), + ILI9881C_COMMAND_INSTR(0x28, 0x33), + ILI9881C_COMMAND_INSTR(0x29, 0x33), + ILI9881C_COMMAND_INSTR(0x2a, 0x00), + ILI9881C_COMMAND_INSTR(0x2b, 0x00), + ILI9881C_COMMAND_INSTR(0x2c, 0x00), + ILI9881C_COMMAND_INSTR(0x2d, 0x00), + ILI9881C_COMMAND_INSTR(0x2e, 0x00), + ILI9881C_COMMAND_INSTR(0x2f, 0x00), + ILI9881C_COMMAND_INSTR(0x30, 0x00), + ILI9881C_COMMAND_INSTR(0x31, 0x00), + ILI9881C_COMMAND_INSTR(0x32, 0x00), + ILI9881C_COMMAND_INSTR(0x33, 0x00), + ILI9881C_COMMAND_INSTR(0x34, 0x04), + ILI9881C_COMMAND_INSTR(0x35, 0x00), + ILI9881C_COMMAND_INSTR(0x36, 0x00), + ILI9881C_COMMAND_INSTR(0x37, 0x00), + ILI9881C_COMMAND_INSTR(0x38, 0x3c), + ILI9881C_COMMAND_INSTR(0x39, 0x00), + ILI9881C_COMMAND_INSTR(0x3a, 0x00), + ILI9881C_COMMAND_INSTR(0x3b, 0x00), + ILI9881C_COMMAND_INSTR(0x3c, 0x00), + ILI9881C_COMMAND_INSTR(0x3d, 0x00), + ILI9881C_COMMAND_INSTR(0x3e, 0x00), + ILI9881C_COMMAND_INSTR(0x3f, 0x00), + ILI9881C_COMMAND_INSTR(0x40, 0x00), + ILI9881C_COMMAND_INSTR(0x41, 0x00), + ILI9881C_COMMAND_INSTR(0x42, 0x00), + ILI9881C_COMMAND_INSTR(0x43, 0x00), + ILI9881C_COMMAND_INSTR(0x44, 0x00), + ILI9881C_COMMAND_INSTR(0x50, 0x00), + ILI9881C_COMMAND_INSTR(0x51, 0x11), + ILI9881C_COMMAND_INSTR(0x52, 0x44), + ILI9881C_COMMAND_INSTR(0x53, 0x55), + ILI9881C_COMMAND_INSTR(0x54, 0x88), + ILI9881C_COMMAND_INSTR(0x55, 0xab), + ILI9881C_COMMAND_INSTR(0x56, 0x00), + ILI9881C_COMMAND_INSTR(0x57, 0x11), + ILI9881C_COMMAND_INSTR(0x58, 0x22), + ILI9881C_COMMAND_INSTR(0x59, 0x33), + ILI9881C_COMMAND_INSTR(0x5a, 0x44), + ILI9881C_COMMAND_INSTR(0x5b, 0x55), + ILI9881C_COMMAND_INSTR(0x5c, 0x66), + ILI9881C_COMMAND_INSTR(0x5d, 0x77), + ILI9881C_COMMAND_INSTR(0x5e, 0x00), + ILI9881C_COMMAND_INSTR(0x5f, 0x02), + ILI9881C_COMMAND_INSTR(0x60, 0x02), + ILI9881C_COMMAND_INSTR(0x61, 0x0a), + ILI9881C_COMMAND_INSTR(0x62, 0x09), + ILI9881C_COMMAND_INSTR(0x63, 0x08), + ILI9881C_COMMAND_INSTR(0x64, 0x13), + ILI9881C_COMMAND_INSTR(0x65, 0x12), + ILI9881C_COMMAND_INSTR(0x66, 0x11), + ILI9881C_COMMAND_INSTR(0x67, 0x10), + ILI9881C_COMMAND_INSTR(0x68, 0x0f), + ILI9881C_COMMAND_INSTR(0x69, 0x0e), + ILI9881C_COMMAND_INSTR(0x6a, 0x0d), + ILI9881C_COMMAND_INSTR(0x6b, 0x0c), + ILI9881C_COMMAND_INSTR(0x6c, 0x06), + ILI9881C_COMMAND_INSTR(0x6d, 0x07), + ILI9881C_COMMAND_INSTR(0x6e, 0x02), + ILI9881C_COMMAND_INSTR(0x6f, 0x02), + ILI9881C_COMMAND_INSTR(0x70, 0x02), + ILI9881C_COMMAND_INSTR(0x71, 0x02), + ILI9881C_COMMAND_INSTR(0x72, 0x02), + ILI9881C_COMMAND_INSTR(0x73, 0x02), + ILI9881C_COMMAND_INSTR(0x74, 0x02), + ILI9881C_COMMAND_INSTR(0x75, 0x02), + ILI9881C_COMMAND_INSTR(0x76, 0x02), + ILI9881C_COMMAND_INSTR(0x77, 0x0a), + ILI9881C_COMMAND_INSTR(0x78, 0x06), + ILI9881C_COMMAND_INSTR(0x79, 0x07), + ILI9881C_COMMAND_INSTR(0x7a, 0x10), + ILI9881C_COMMAND_INSTR(0x7b, 0x11), + ILI9881C_COMMAND_INSTR(0x7c, 0x12), + ILI9881C_COMMAND_INSTR(0x7d, 0x13), + ILI9881C_COMMAND_INSTR(0x7e, 0x0c), + ILI9881C_COMMAND_INSTR(0x7f, 0x0d), + ILI9881C_COMMAND_INSTR(0x80, 0x0e), + ILI9881C_COMMAND_INSTR(0x81, 0x0f), + ILI9881C_COMMAND_INSTR(0x82, 0x09), + ILI9881C_COMMAND_INSTR(0x83, 0x08), + ILI9881C_COMMAND_INSTR(0x84, 0x02), + ILI9881C_COMMAND_INSTR(0x85, 0x02), + ILI9881C_COMMAND_INSTR(0x86, 0x02), + ILI9881C_COMMAND_INSTR(0x87, 0x02), + ILI9881C_COMMAND_INSTR(0x88, 0x02), + ILI9881C_COMMAND_INSTR(0x89, 0x02), + ILI9881C_COMMAND_INSTR(0x8a, 0x02), + + ILI9881C_SWITCH_PAGE_INSTR(4), + ILI9881C_COMMAND_INSTR(0x6e, 0x2a), + ILI9881C_COMMAND_INSTR(0x6f, 0x37), + ILI9881C_COMMAND_INSTR(0x3a, 0x24), + ILI9881C_COMMAND_INSTR(0x8d, 0x19), + ILI9881C_COMMAND_INSTR(0x87, 0xba), + ILI9881C_COMMAND_INSTR(0xb2, 0xd1), + ILI9881C_COMMAND_INSTR(0x88, 0x0b), + ILI9881C_COMMAND_INSTR(0x38, 0x01), + ILI9881C_COMMAND_INSTR(0x39, 0x00), + ILI9881C_COMMAND_INSTR(0xb5, 0x02), + ILI9881C_COMMAND_INSTR(0x31, 0x25), + ILI9881C_COMMAND_INSTR(0x3b, 0x98), + + ILI9881C_SWITCH_PAGE_INSTR(1), + ILI9881C_COMMAND_INSTR(0x22, 0x0a), + ILI9881C_COMMAND_INSTR(0x31, 0x0c), + ILI9881C_COMMAND_INSTR(0x53, 0x40), + ILI9881C_COMMAND_INSTR(0x55, 0x45), + ILI9881C_COMMAND_INSTR(0x50, 0xb7), + ILI9881C_COMMAND_INSTR(0x51, 0xb2), + ILI9881C_COMMAND_INSTR(0x60, 0x07), + ILI9881C_COMMAND_INSTR(0xa0, 0x22), + ILI9881C_COMMAND_INSTR(0xa1, 0x3f), + ILI9881C_COMMAND_INSTR(0xa2, 0x4e), + ILI9881C_COMMAND_INSTR(0xa3, 0x17), + ILI9881C_COMMAND_INSTR(0xa4, 0x1a), + ILI9881C_COMMAND_INSTR(0xa5, 0x2d), + ILI9881C_COMMAND_INSTR(0xa6, 0x21), + ILI9881C_COMMAND_INSTR(0xa7, 0x22), + ILI9881C_COMMAND_INSTR(0xa8, 0xc4), + ILI9881C_COMMAND_INSTR(0xa9, 0x1b), + ILI9881C_COMMAND_INSTR(0xaa, 0x25), + ILI9881C_COMMAND_INSTR(0xab, 0xa7), + ILI9881C_COMMAND_INSTR(0xac, 0x1a), + ILI9881C_COMMAND_INSTR(0xad, 0x19), + ILI9881C_COMMAND_INSTR(0xae, 0x4b), + ILI9881C_COMMAND_INSTR(0xaf, 0x1f), + ILI9881C_COMMAND_INSTR(0xb0, 0x2a), + ILI9881C_COMMAND_INSTR(0xb1, 0x59), + ILI9881C_COMMAND_INSTR(0xb2, 0x64), + ILI9881C_COMMAND_INSTR(0xb3, 0x3f), + ILI9881C_COMMAND_INSTR(0xc0, 0x22), + ILI9881C_COMMAND_INSTR(0xc1, 0x48), + ILI9881C_COMMAND_INSTR(0xc2, 0x59), + ILI9881C_COMMAND_INSTR(0xc3, 0x15), + ILI9881C_COMMAND_INSTR(0xc4, 0x15), + ILI9881C_COMMAND_INSTR(0xc5, 0x28), + ILI9881C_COMMAND_INSTR(0xc6, 0x1c), + ILI9881C_COMMAND_INSTR(0xc7, 0x1e), + ILI9881C_COMMAND_INSTR(0xc8, 0xc4), + ILI9881C_COMMAND_INSTR(0xc9, 0x1c), + ILI9881C_COMMAND_INSTR(0xca, 0x2b), + ILI9881C_COMMAND_INSTR(0xcb, 0xa3), + ILI9881C_COMMAND_INSTR(0xcc, 0x1f), + ILI9881C_COMMAND_INSTR(0xcd, 0x1e), + ILI9881C_COMMAND_INSTR(0xce, 0x52), + ILI9881C_COMMAND_INSTR(0xcf, 0x24), + ILI9881C_COMMAND_INSTR(0xd0, 0x2a), + ILI9881C_COMMAND_INSTR(0xd1, 0x58), + ILI9881C_COMMAND_INSTR(0xd2, 0x68), + ILI9881C_COMMAND_INSTR(0xd3, 0x3f), +}; + static inline struct ili9881c *panel_to_ili9881c(struct drm_panel *panel) { return container_of(panel, struct ili9881c, panel); @@ -1418,6 +1612,23 @@ static const struct drm_display_mode am8001280g_defa= ult_mode =3D { .height_mm =3D 151, }; =20 +static const struct drm_display_mode bsd1218_a101kl68_default_mode =3D { + .clock =3D 70000, + + .hdisplay =3D 800, + .hsync_start =3D 800 + 40, + .hsync_end =3D 800 + 40 + 20, + .htotal =3D 800 + 40 + 20 + 20, + + .vdisplay =3D 1280, + .vsync_start =3D 1280 + 20, + .vsync_end =3D 1280 + 20 + 4, + .vtotal =3D 1280 + 20 + 4 + 20, + + .width_mm =3D 120, + .height_mm =3D 170, +}; + static int ili9881c_get_modes(struct drm_panel *panel, struct drm_connector *connector) { @@ -1576,8 +1787,17 @@ static const struct ili9881c_desc am8001280g_desc = =3D { MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM, }; =20 +static const struct ili9881c_desc bsd1218_a101kl68_desc =3D { + .init =3D bsd1218_a101kl68_init, + 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i53875bf5.versanet.de ([83.135.91.245] helo=localhost.localdomain) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1uYp1t-0004yl-Tr; Mon, 07 Jul 2025 18:49:21 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: neil.armstrong@linaro.org, quic_jesszhan@quicinc.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, hjc@rock-chips.com, andy.yan@rock-chips.com, andyshrk@163.com, nicolas.frattaroli@collabora.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH 07/13] dt-bindings: soc: rockchip: add rk3576 mipi dcphy syscon Date: Mon, 7 Jul 2025 18:49:00 +0200 Message-ID: <20250707164906.1445288-8-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250707164906.1445288-1-heiko@sntech.de> References: <20250707164906.1445288-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" RK3576 CSI and DSI support requires the GRF for its DC-PHY. The "general register files" provide additional setting-bits outside the regular ip-block reg-space. Signed-off-by: Heiko Stuebner Acked-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/soc/rockchip/grf.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml b/Docu= mentation/devicetree/bindings/soc/rockchip/grf.yaml index ccdcc889ba8e..d4fda4ee33e4 100644 --- a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml +++ b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml @@ -31,6 +31,7 @@ properties: - rockchip,rk3568-usb2phy-grf - rockchip,rk3576-bigcore-grf - rockchip,rk3576-cci-grf + - rockchip,rk3576-dcphy-grf - rockchip,rk3576-gpu-grf - rockchip,rk3576-hdptxphy-grf - rockchip,rk3576-litcore-grf --=20 2.47.2 From nobody Tue Oct 7 18:24:28 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3506223817A; Mon, 7 Jul 2025 16:49:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751906994; cv=none; b=k2DuVmSGi+Um5yWgich17f/dLNWyKeFgFtICAZvuzkXv0c7PpVACHIuKbLD3yga9H9++GT2UyXjBW7v9xRbr/8yKkcwl54OBrVjmqYQQuSxDqQM43PtdlaF49oqp5K5DZ6rYT4aRbt8X6Rzor7pSGJM31NoWPLrKNx9grj48VHk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751906994; c=relaxed/simple; bh=Qz8v6cPHb2u2uf47/QYRFsu4w+OxY7kWX9SjdrHu/TY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=kC0IWdqok8AlW4t5wOGSUEj/2wSbJ98y6MxT9UAcpJutiu6zwU0oF1tJlYaUgHzXaIHTuRvEpnRTcNNENzNRQhvBnYp4Zog/dwRnDw3fbIV6OGbQD/+ytof3cQS0xLHQexPxdBR7Nmsq/p6EYQ41UkGFfGl15P0xzrC4JHATe94= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=j1FbE116; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="j1FbE116" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=v4TLQmAGOcWD0y8Mnt5eC5Fpk/ELMiMig19bQQmdhOg=; b=j1FbE116GrdVoQK9ijrfRr8Hhx TKwzoBePZ7MsI/oHcKP5Cogld+t1KdRxusbn1hDlul5ZDEqw1WXz/dKOWKFwMq6fuGmURKHIYpwI6 +k/xPiFDjgAE/5cedxZbeskedf3TXPbmX2GVW5nlLekqnESEMRxzQ1IXjXNCeZp6r3pXHZtw8NhAD kGrmjsG2uq9QxSjTCW+FSDeGYGqoya5bEPu7yCHelco4DfzNz3hpn/TC9QIOUNbr9lvrOzqWXZfT7 wsRHwLxwbF/127nqi0xlgGT07+j2Jp5cAKlX5SDXdk9iZ9LMZUKqrGxAaZkUraoCJwKddFVrxBd7i sRSAtywA==; Received: from i53875bf5.versanet.de ([83.135.91.245] helo=localhost.localdomain) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1uYp1u-0004yl-N8; Mon, 07 Jul 2025 18:49:22 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: neil.armstrong@linaro.org, quic_jesszhan@quicinc.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, hjc@rock-chips.com, andy.yan@rock-chips.com, andyshrk@163.com, nicolas.frattaroli@collabora.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH 08/13] dt-bindings: display: rockchip: Add rk3576 to RK3588 DW DSI2 controller schema Date: Mon, 7 Jul 2025 18:49:01 +0200 Message-ID: <20250707164906.1445288-9-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250707164906.1445288-1-heiko@sntech.de> References: <20250707164906.1445288-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The rk3576 controller is based on the same newer Synopsis IP as the one found in the rk3588. Its external setting bits in the GRF are different though, so it needs its own distinct compatible. Signed-off-by: Heiko Stuebner Acked-by: Rob Herring (Arm) --- .../bindings/display/rockchip/rockchip,rk3588-mipi-dsi2.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk= 3588-mipi-dsi2.yaml b/Documentation/devicetree/bindings/display/rockchip/ro= ckchip,rk3588-mipi-dsi2.yaml index 53384e47b507..75cd1c13fa52 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3588-mi= pi-dsi2.yaml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3588-mi= pi-dsi2.yaml @@ -12,6 +12,7 @@ maintainers: properties: compatible: enum: + - rockchip,rk3576-mipi-dsi2 - rockchip,rk3588-mipi-dsi2 =20 reg: --=20 2.47.2 From nobody Tue Oct 7 18:24:28 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3BE5F23534D; Mon, 7 Jul 2025 16:49:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751906991; cv=none; b=FwQU9JYREzUgurP0aDGUDL0y7LwAz5gb1mCWKs/XiiiW40JcNqSb8qn3eVij+vnC9y3F41txs3hSXvApIPNSYhq9aC5smAE9dF20b+PMO1RBplpHyuMzlr5gWeAHrgPb6yLzO0vq4y9cN/efoe/2liQytYSrHdLoecY3M/+GFNM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751906991; c=relaxed/simple; bh=nwnkywKkZ2yW7obRzxv3ivkf/5jICPCX8W5fi86WMPk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=NNk8L8fIEb9/6F6EMHKNMgj2H0B+VV0SaoPAOoEwbJ/3eHGB/Bpe4FyCjjStv1GoGlYAyrFGazmhLTNIVRLxWXpSzY8KhOGplNRLhg4tlbEs3QfUoqTzb0Qae/gFwfDonTvH8LOLhGX0dxqPxQrySENxk/WJAA1AAgYqty7dJ84= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=rNXX5d1u; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="rNXX5d1u" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=58erMwoxBaQAKtl014X0pCQs9xXgy2ZbGkCMSXmUpbI=; b=rNXX5d1ukA1xbpvXU3rwD2i/6k R9uWibvpvUbZ/AglO1KOIH02VeJWvrWsUfa7di7XPVJOn5WyolKx17r3Ssb6Hb++Ik476zksJeS91 PQmqBlDVRq//zRNVcltwajqqlxGCKMRiYV4/TFui7b/a+Wt7ywycIey0VGW1cSOlZx2yihLxzAeih SC0HI79+QmgiXfb+vx/tBAS/JW4BqAOv6U2MDhhmSOZC/2funCEIADqlbH3ZfXn/TOtQlL63lQ1LD 8opC/6wBye9qFSa1ByrkTiz5yzbLuqNiSfXJllq0upwjk8Aqh5MGloiSbSpxzbErtekkUU8GqoNTN h3OiLYQg==; Received: from i53875bf5.versanet.de ([83.135.91.245] helo=localhost.localdomain) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1uYp1v-0004yl-Fu; Mon, 07 Jul 2025 18:49:23 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: neil.armstrong@linaro.org, quic_jesszhan@quicinc.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, hjc@rock-chips.com, andy.yan@rock-chips.com, andyshrk@163.com, nicolas.frattaroli@collabora.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, Guochun Huang Subject: [PATCH 09/13] drm/rockchip: dsi2: add support rk3576 Date: Mon, 7 Jul 2025 18:49:02 +0200 Message-ID: <20250707164906.1445288-10-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250707164906.1445288-1-heiko@sntech.de> References: <20250707164906.1445288-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Guochun Huang Add the necessary specific bits to support the rk3576-variant of the DW-DSI2 controller. Signed-off-by: Guochun Huang [adapted from the vendor-kernel for mainline] Signed-off-by: Heiko Stuebner Reviewed-by: Andy Yan --- .../gpu/drm/rockchip/dw-mipi-dsi2-rockchip.c | 21 +++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi2-rockchip.c b/drivers/gpu= /drm/rockchip/dw-mipi-dsi2-rockchip.c index cdd490778756..0aea764e29b2 100644 --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi2-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi2-rockchip.c @@ -437,6 +437,15 @@ static void dw_mipi_dsi2_rockchip_remove(struct platfo= rm_device *pdev) dw_mipi_dsi2_remove(dsi2->dmd); } =20 +static const struct dsigrf_reg rk3576_dsi_grf_reg_fields[MAX_FIELDS] =3D { + [TXREQCLKHS_EN] =3D { 0x0028, 1, 1 }, + [GATING_EN] =3D { 0x0028, 0, 0 }, + [IPI_SHUTDN] =3D { 0x0028, 3, 3 }, + [IPI_COLORM] =3D { 0x0028, 2, 2 }, + [IPI_COLOR_DEPTH] =3D { 0x0028, 8, 11 }, + [IPI_FORMAT] =3D { 0x0028, 4, 7 }, +}; + static const struct dsigrf_reg rk3588_dsi0_grf_reg_fields[MAX_FIELDS] =3D { [TXREQCLKHS_EN] =3D { 0x0000, 11, 11 }, [GATING_EN] =3D { 0x0000, 10, 10 }, @@ -455,6 +464,15 @@ static const struct dsigrf_reg rk3588_dsi1_grf_reg_fie= lds[MAX_FIELDS] =3D { [IPI_FORMAT] =3D { 0x0004, 0, 3 }, }; =20 +static const struct rockchip_dw_dsi2_chip_data rk3576_chip_data[] =3D { + { + .reg =3D 0x27d80000, + .grf_regs =3D rk3576_dsi_grf_reg_fields, + .max_bit_rate_per_lane =3D 2500000ULL, + }, + { /* sentinel */ } +}; + static const struct rockchip_dw_dsi2_chip_data rk3588_chip_data[] =3D { { .reg =3D 0xfde20000, @@ -470,6 +488,9 @@ static const struct rockchip_dw_dsi2_chip_data rk3588_c= hip_data[] =3D { =20 static const struct of_device_id dw_mipi_dsi2_rockchip_dt_ids[] =3D { { + .compatible =3D "rockchip,rk3576-mipi-dsi2", + .data =3D &rk3576_chip_data, + }, { .compatible =3D "rockchip,rk3588-mipi-dsi2", .data =3D &rk3588_chip_data, }, --=20 2.47.2 From nobody Tue Oct 7 18:24:28 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5DAAC2550D8; Mon, 7 Jul 2025 16:56:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Mon, 07 Jul 2025 18:49:24 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: neil.armstrong@linaro.org, quic_jesszhan@quicinc.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, hjc@rock-chips.com, andy.yan@rock-chips.com, andyshrk@163.com, nicolas.frattaroli@collabora.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH 10/13] arm64: dts: rockchip: add mipi-dcphy to rk3576 Date: Mon, 7 Jul 2025 18:49:03 +0200 Message-ID: <20250707164906.1445288-11-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250707164906.1445288-1-heiko@sntech.de> References: <20250707164906.1445288-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the MIPI-DC-phy node to the RK3576, that will be used by the one DSI2 controller and hopefully in some future also for camera input. Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3576.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts= /rockchip/rk3576.dtsi index 8b2161b83059..87d518422a60 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi @@ -822,6 +822,12 @@ hdptxphy_grf: syscon@26032000 { reg =3D <0x0 0x26032000 0x0 0x100>; }; =20 + mipidcphy_grf: syscon@26034000 { + compatible =3D "rockchip,rk3576-dcphy-grf", "syscon"; + reg =3D <0x0 0x26034000 0x0 0x2000>; + clocks =3D <&cru PCLK_PMUPHY_ROOT>; + }; + vo1_grf: syscon@26036000 { compatible =3D "rockchip,rk3576-vo1-grf", "syscon"; reg =3D <0x0 0x26036000 0x0 0x100>; @@ -2538,6 +2544,22 @@ uart11: serial@2afd0000 { status =3D "disabled"; }; =20 + mipidcphy: phy@2b020000 { + compatible =3D "rockchip,rk3576-mipi-dcphy"; + reg =3D <0x0 0x2b020000 0x0 0x10000>; + clocks =3D <&cru PCLK_MIPI_DCPHY>, + <&cru CLK_PHY_REF_SRC>; + clock-names =3D "pclk", "ref"; + resets =3D <&cru SRST_M_MIPI_DCPHY>, + <&cru SRST_P_MIPI_DCPHY>, + <&cru SRST_P_DCPHY_GRF>, + <&cru SRST_S_MIPI_DCPHY>; + reset-names =3D "m_phy", "apb", "grf", "s_phy"; + rockchip,grf =3D <&mipidcphy_grf>; + #phy-cells =3D <1>; + status =3D "disabled"; + }; + combphy0_ps: phy@2b050000 { compatible =3D "rockchip,rk3576-naneng-combphy"; reg =3D <0x0 0x2b050000 0x0 0x100>; --=20 2.47.2 From nobody Tue Oct 7 18:24:28 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A0DEA253B5C; Mon, 7 Jul 2025 16:55:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751907331; cv=none; b=B0480qRjAd9H76/4XyOdXBVbqJx3go6F8Tr1ypWJZ7Or9SqZcMjAYjq9D4OAl8e3qnIteBjRVMWvEdzItF1QF64igmj92fKFQfYjca630EiG0H4nymPx7GISaUF6tIBQ0A8OvXMfljYIzil+FoMUv5pmkpCZh57UMmJaGz5xDZc= ARC-Message-Signature: i=1; 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charset="utf-8" The RK3576 comes with one DSI2 controllers based on the same newer Synopsis IP as the ones on the RK3588. Add the necessary node for it. Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3576.dtsi | 28 ++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts= /rockchip/rk3576.dtsi index 87d518422a60..5e9c3dce5823 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi @@ -1271,6 +1271,34 @@ sai6: sai@27d50000 { status =3D "disabled"; }; =20 + dsi: dsi@27d80000 { + compatible =3D "rockchip,rk3576-mipi-dsi2"; + reg =3D <0x0 0x27d80000 0x0 0x10000>; + interrupts =3D ; + clocks =3D <&cru PCLK_DSIHOST0>, <&cru CLK_DSIHOST0>; + clock-names =3D "pclk", "sys"; + power-domains =3D <&power RK3576_PD_VO0>; + resets =3D <&cru SRST_P_DSIHOST0>; + reset-names =3D "apb"; + phys =3D <&mipidcphy PHY_TYPE_DPHY>; + phy-names =3D "dcphy"; + rockchip,grf =3D <&vo0_grf>; + status =3D "disabled"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + dsi_in: port@0 { + reg =3D <0>; + }; + + dsi_out: port@1 { + reg =3D <1>; + }; + }; + }; + hdmi: hdmi@27da0000 { compatible =3D "rockchip,rk3576-dw-hdmi-qp"; reg =3D <0x0 0x27da0000 0x0 0x20000>; --=20 2.47.2 From nobody Tue Oct 7 18:24:28 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5D1C3286D50; Mon, 7 Jul 2025 16:56:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751907409; cv=none; b=Wnybwkopmizb6T19+c8d5PjLwa00nHKtNwjyGxstnFZDvugODE9xzX3OFiC1zmrMznDOBZXnpHhTp0KFtbp47cYhYRBTzk+w2RKcdCmHrPqCeHTDc/N6/KJshk4GnWt7NIerRYgMtaimSUurMoaLKsYpitOLe4f2R7OKQR0dtgM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751907409; c=relaxed/simple; bh=aN3THnLd5tCPlI69MReI3gSNZwFID7+A5kTI7toLCLc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=YfH/DbjCaVJOwtoGCEteCNt3VLw8FC3yxZioAxfUmVxX84KpYW7Mez/zs1yLMLIX+FToK91Sm5Wp8jSXZeT7w8E+f2iIRvOKxKmPMAki9rhjGzlNifMg333XOPueRxrfRpH2EU3UvhQofbXIuXTcFYX8cQQVq7B/ZZEVz1CDLWw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=IR1Yo93b; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="IR1Yo93b" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=QVv9VN6mF2jxRpVKoSC9NQ/7rqOozAMNWU4uby4GCM4=; b=IR1Yo93bPSVYTBpRB2sx+wIFNR cKsnu3dqCuXZdo7vsfK/S4xBckIlpnz6iKMzQZUpOj8Yh7EpZJabNQzbcetjIkLKJTKvjbOFrnbCY GZf64RuNZwUsQUWDMZuRX2Kvh3A/yrf/GbSm7B9MLIld5KNkyjw6Gk1g1tjP8ivysdH6mPk2SPr3j zJCi3NHDSrHV23YPISx13kFZK7TZUejR6eBIYn+XYtaJOk+aPt3uEHdzpfiVd+5Svc05Y36sK/Mfg M/u+tfOMCl+vDAY3kHRVPAqIGp+Y2WV9RtIxxnuEsRSKYkG3vYiqLz2LpQhGo9zHC/CwrGFmLO/co MM+Yx4Uw==; Received: from i53875bf5.versanet.de ([83.135.91.245] helo=localhost.localdomain) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1uYp1x-0004yl-H7; Mon, 07 Jul 2025 18:49:25 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: neil.armstrong@linaro.org, quic_jesszhan@quicinc.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, hjc@rock-chips.com, andy.yan@rock-chips.com, andyshrk@163.com, nicolas.frattaroli@collabora.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH 12/13] arm64: dts: rockchip: add vcc3v3-lcd-s0 regulator to roc-rk3576-pc Date: Mon, 7 Jul 2025 18:49:05 +0200 Message-ID: <20250707164906.1445288-13-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250707164906.1445288-1-heiko@sntech.de> References: <20250707164906.1445288-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This fixed regulator is described by the schematics as being part of the baseboard and its output supply is then routed to the 30pin DSI connector on the board. Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3576-roc-pc.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3576-roc-pc.dts b/arch/arm64/bo= ot/dts/rockchip/rk3576-roc-pc.dts index d4e437ea6cd8..d0ab1d1e0e11 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576-roc-pc.dts +++ b/arch/arm64/boot/dts/rockchip/rk3576-roc-pc.dts @@ -107,6 +107,18 @@ vcc1v8_ufs_vccq2_s0: regulator-vcc1v8-ufs-vccq2-s0 { vin-supply =3D <&vcc_1v8_s3>; }; =20 + vcc3v3_lcd_s0: regulator-vcc3v3-lcd-s0 { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&lcd_pwren_h>; + regulator-name =3D "vcc3v3-lcd-s0"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&vcc_3v3_s3>; + }; + vcc3v3_pcie: regulator-vcc3v3-pcie { compatible =3D "regulator-fixed"; enable-active-high; @@ -715,6 +727,10 @@ rtc_int_l: rtc-int-l { }; =20 power { + lcd_pwren_h: lcd-pwren-h { + rockchip,pins =3D <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + vcc5vd_en: vcc5vd-en { rockchip,pins =3D <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; }; --=20 2.47.2 From nobody Tue Oct 7 18:24:28 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3F6E9255F22; Mon, 7 Jul 2025 16:55:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751907358; cv=none; b=nDTky3ZoEX4ouWsts2S4OUY/4Mte4B65ES8xrvInlNUJr02KCKQvMVoq8FUtaov96MzRDQtX6Bhw3J4jnHXf5LUqHsSZRpJ2Aq2rD+XD6wc74HH0XQO2AJZyDQgkHSLu7Aze4FrdHbwuCG2SphM631QZ4XPhsSiQtwWeOkOv8Zs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751907358; c=relaxed/simple; bh=HTYtfIZaU0IISaNC8EoPJlLRQ0RpkF34zxfeQMah8mw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=tH7RjmWu9yC+57CYzZ3F494bqzbzwrbXZriOuOrOw/ugdk19CG9eM4txUrPb221p+ldXXHypAWW023oZzYlcWm8UgxCJ1WxDiHboGsmfm0SQuVcaxbLmBL72yJ3waEY9FDHAUxPEXf92KguQe37MNTsw9QxqRT9FUudxCMvyp2Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=yveiteqG; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="yveiteqG" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=FBkOzD22uC8TIZOltlSVNHsJqb3ZyD7/5ACUKJRygzc=; b=yveiteqGRw+GqinEANa2wqFgJC NNpONaZ55YGsw8HuCGIfqEktn/gV9sC16ymuH5WCeG70RYOSpsYsZBHpyNLk9oOp5GgcBNxHc2w7s pfXFhhEavvPZYn7gywwDbQpMhpLu97n0XlUqA8+zBYhyIQy2fVsT3YyNKR+qwbQBk9YNlMzzgsLFk XtcatsDyQqbxq8SlHKfFgiodjFVamhh2mPD8wjDcPQeEFuzMrhahHsKLXtJz0qyzoYv3s3/c280Wz 6YwQ/2jtexiXlZWSuMUk8aNJkozqr+++nogYOt6M1+wTZxnt7xp0BKpbitr46Jev5LtQeWLcqA4YN V4iaKzVA==; Received: from i53875bf5.versanet.de ([83.135.91.245] helo=localhost.localdomain) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1uYp1y-0004yl-7q; Mon, 07 Jul 2025 18:49:26 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: neil.armstrong@linaro.org, quic_jesszhan@quicinc.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, hjc@rock-chips.com, andy.yan@rock-chips.com, andyshrk@163.com, nicolas.frattaroli@collabora.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH 13/13] arm64: dts: rockchip: add dm-m10r800-v3s overlay for roc-rk3576-pc Date: Mon, 7 Jul 2025 18:49:06 +0200 Message-ID: <20250707164906.1445288-14-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250707164906.1445288-1-heiko@sntech.de> References: <20250707164906.1445288-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add DT-overlay for the DM-M10R800-V3S display module when connected to the ROC-RK3576-PC board. It contains a bestar,bsd1218-a101kl68 display and a Goodix GT911 touchscreen in one enclosed case. Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/Makefile | 5 + .../rk3576-roc-pc-dm-m10r800-v3s.dtso | 134 ++++++++++++++++++ 2 files changed, 139 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3576-roc-pc-dm-m10r800-v= 3s.dtso diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index 4bf84622db47..f320dd2b5f6f 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -145,6 +145,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-wolfvision-pf5-= io-expander.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-armsom-sige5.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-evb1-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-roc-pc.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-roc-pc-dm-m10r800-v3s.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-rock-4d.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3582-radxa-e52c.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-armsom-sige7.dtb @@ -225,6 +226,10 @@ rk3568-wolfvision-pf5-vz-2-uhd-dtbs :=3D rk3568-wolfvi= sion-pf5.dtb \ rk3568-wolfvision-pf5-display-vz.dtbo \ rk3568-wolfvision-pf5-io-expander.dtbo =20 +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-roc-pc-dm-m10r800-v3s.dtb +rk3576-roc-pc-dm-m10r800-v3s-dtbs :=3D rk3576-roc-pc.dtb \ + rk3576-roc-pc-dm-m10r800-v3s.dtbo + dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-edgeble-neu6a-wifi.dtb rk3588-edgeble-neu6a-wifi-dtbs :=3D rk3588-edgeble-neu6a-io.dtb \ rk3588-edgeble-neu6a-wifi.dtbo diff --git a/arch/arm64/boot/dts/rockchip/rk3576-roc-pc-dm-m10r800-v3s.dtso= b/arch/arm64/boot/dts/rockchip/rk3576-roc-pc-dm-m10r800-v3s.dtso new file mode 100644 index 000000000000..2817cc585c3a --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3576-roc-pc-dm-m10r800-v3s.dtso @@ -0,0 +1,134 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2025 Heiko Stuebner + * + * DM-M10R800-V3S display module for ROC-RK3576-PC + * https://en.t-firefly.com/doc/download/303.html + * + * DT-overlay for the DM-M10R800-V3S display module when connected to a + * ROC-RK3576-PC board. It contains a bestar,bsd1218-a101kl68 display + * and a Goodix GT911 touchscreen in one enclosed case. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +&{/} { + backlight: backlight { + compatible =3D "pwm-backlight"; + enable-gpios =3D <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mipi_bl_en>; + pwms =3D <&pwm1_6ch_1 0 50000 1>; + }; + + vcc_tp: regulator-vcc-tp { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc-tp"; + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3000000>; + vin-supply =3D <&vcc5v0_device_s0>; + }; +}; + +&dsi { + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "okay"; + + panel@0 { + compatible =3D "bestar,bsd1218-a101kl68", "ilitek,ili9881c"; + reg =3D <0>; + backlight =3D <&backlight>; + power-supply =3D <&vcc3v3_lcd_s0>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&lcd_reset_l>; + reset-gpios =3D <&gpio0 RK_PB4 GPIO_ACTIVE_LOW>; + + port { + mipi_panel_in: endpoint { + remote-endpoint =3D <&dsi_out_panel>; + }; + }; + }; +}; + +&dsi_in { + dsi_in_vp1: endpoint { + remote-endpoint =3D <&vp1_out_dsi>; + }; +}; + +&dsi_out { + dsi_out_panel: endpoint { + remote-endpoint =3D <&mipi_panel_in>; + }; +}; + +&i2c0 { + /* GT911 is limited to 400KHz */ + clock-frequency =3D <400000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c0m1_xfer>; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "okay"; + + touchscreen@14 { + compatible =3D "goodix,gt911"; + reg =3D <0x14>; + interrupt-parent =3D <&gpio0>; + interrupts =3D ; + irq-gpios =3D <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&touch_int>, <&touch_reset>; + reset-gpios =3D <&gpio0 RK_PD0 GPIO_ACTIVE_HIGH>; + AVDD28-supply =3D <&vcc_tp>; + VDDIO-supply =3D <&vcc3v3_lcd_s0>; + }; +}; + +&mipidcphy { + status =3D "okay"; +}; + +&pinctrl { + dsi { + lcd_reset_l: lcd-reset-l { + rockchip,pins =3D <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + mipi_bl_en: mipi-bl-en { + rockchip,pins =3D <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + touch { + touch_int: touch-int { + rockchip,pins =3D <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + touch_reset: touch-reset { + rockchip,pins =3D <0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pwm1_6ch_1 { + status =3D "okay"; +}; + +&vp1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + + vp1_out_dsi: endpoint@ROCKCHIP_VOP2_EP_MIPI0 { + reg =3D ; + remote-endpoint =3D <&dsi_in_vp1>; + }; +}; --=20 2.47.2