From nobody Tue Oct 7 20:01:39 2025 Received: from cpanel.siel.si (cpanel.siel.si [46.19.9.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0204814A82; Mon, 7 Jul 2025 06:11:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=46.19.9.99 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751868666; cv=none; b=L3k5ORNGrYEDrOn5XAkx59+QxnBVVE4zV3Sp8zV5rCnvQFsEKj6eljLga8RzVh+CGzEI+V586i439d09wzOMtRCDmt2IjJvDUGoeWo9ncuii729kNosQTFEXWRUu8f3GVkDBR8EBcOZXb7QLwbnl79nDVZ5vZ8KBUMg+rod6OBI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751868666; c=relaxed/simple; bh=ywKkp03jH+gfInGP9oVa9S/zNAkbi+fU8woSzIp+x6g=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=PQbKNsWZN/GraJFwcIOBM2UApexNKindqBTlJKj/xNgF9ScqckFwqktBrs3NqR4+OOssMOJW0bIOakPmbAKNKPXRrP6THYczKy9lAWHGFO2NC1V7a678ERtl1SmlSZUZEThht5jtRx2FvhXKIQqibGxZWCefM9JkHKn1YOm8m0U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=norik.com; spf=pass smtp.mailfrom=norik.com; arc=none smtp.client-ip=46.19.9.99 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=norik.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=norik.com Received: from [89.212.21.243] (port=56226 helo=localhost.localdomain) by cpanel.siel.si with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96.2) (envelope-from ) id 1uYf4B-00DKr8-0U; Mon, 07 Jul 2025 08:11:02 +0200 From: Primoz Fiser To: Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, upstream@lists.phytec.de Subject: [PATCH v2 1/4] arm64: dts: imx93-phycore-som: Add RPMsg overlay Date: Mon, 7 Jul 2025 08:10:58 +0200 Message-Id: <20250707061101.1194618-2-primoz.fiser@norik.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250707061101.1194618-1-primoz.fiser@norik.com> References: <20250707061101.1194618-1-primoz.fiser@norik.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - cpanel.siel.si X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - norik.com X-Get-Message-Sender-Via: cpanel.siel.si: authenticated_id: primoz.fiser@norik.com X-Authenticated-Sender: cpanel.siel.si: primoz.fiser@norik.com X-Source: X-Source-Args: X-Source-Dir: Content-Type: text/plain; charset="utf-8" Add an overlay used for remote processor inter-core communication between A55 and M33 cores on the phyCORE-i.MX93 SoM based boards. Overlay adds the required reserved memory regions and enables the mailbox unit and the M33 core for RPMsg (Remote Processor Messaging Framework). Signed-off-by: Primoz Fiser Reviewed-by: Peng Fan --- Changes in v2: - reorder reserved memory nodes by address arch/arm64/boot/dts/freescale/Makefile | 4 ++ .../dts/freescale/imx93-phycore-rpmsg.dtso | 60 +++++++++++++++++++ 2 files changed, 64 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx93-phycore-rpmsg.dtso diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/f= reescale/Makefile index 0b473a23d120..08a1de299538 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -324,6 +324,10 @@ dtb-$(CONFIG_ARCH_MXC) +=3D imx93-14x14-evk.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx93-kontron-bl-osm-s.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx93-phyboard-nash.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx93-phyboard-segin.dtb + +imx93-phycore-rpmsg-dtbs +=3D imx93-phyboard-nash.dtb imx93-phyboard-segin= .dtb imx93-phycore-rpmsg.dtbo +dtb-$(CONFIG_ARCH_MXC) +=3D imx93-phycore-rpmsg.dtb + dtb-$(CONFIG_ARCH_MXC) +=3D imx93-tqma9352-mba91xxca.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx93-tqma9352-mba93xxca.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx93-tqma9352-mba93xxla.dtb diff --git a/arch/arm64/boot/dts/freescale/imx93-phycore-rpmsg.dtso b/arch/= arm64/boot/dts/freescale/imx93-phycore-rpmsg.dtso new file mode 100644 index 000000000000..c6cb5c580455 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx93-phycore-rpmsg.dtso @@ -0,0 +1,60 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2025 PHYTEC Messtechnik GmbH + * Author: Primoz Fiser + */ + +/dts-v1/; +/plugin/; + +&{/} { + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + + rsc_table: rsc-table@2021e000 { + reg =3D <0 0x2021e000 0 0x1000>; + no-map; + }; + + vdev0vring0: vdev0vring0@a4000000 { + reg =3D <0 0xa4000000 0 0x8000>; + no-map; + }; + + vdev0vring1: vdev0vring1@a4008000 { + reg =3D <0 0xa4008000 0 0x8000>; + no-map; + }; + + vdev1vring0: vdev1vring0@a4010000 { + reg =3D <0 0xa4010000 0 0x8000>; + no-map; + }; + + vdev1vring1: vdev1vring1@a4018000 { + reg =3D <0 0xa4018000 0 0x8000>; + no-map; + }; + + vdevbuffer: vdevbuffer@a4020000 { + compatible =3D "shared-dma-pool"; + reg =3D <0 0xa4020000 0 0x100000>; + no-map; + }; + }; +}; + +&cm33 { + mbox-names =3D "tx", "rx", "rxdb"; + mboxes =3D <&mu1 0 1>, + <&mu1 1 1>, + <&mu1 3 1>; + memory-region =3D <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>, + <&vdev1vring0>, <&vdev1vring1>, <&rsc_table>; + status =3D "okay"; +}; + +&mu1 { + status =3D "okay"; +}; --=20 2.34.1 From nobody Tue Oct 7 20:01:39 2025 Received: from cpanel.siel.si (cpanel.siel.si [46.19.9.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 152D1274FD7; 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charset="utf-8" Add overlay to support PEB-EVAL-01 adapter on phyBOARD-Segin-i.MX93. This is a PHYTEC evaluation module with three LEDs and two input buttons that users can attach to the board expansion connector X16. Note that, due to compatibility with existing PHYTEC platforms using the phyBOARD-Segin carrier board such as i.MX6UL and STM32MP1, we face some hardware limitations and can thus only support one user LED (D2) and one button (S2) on the i.MX93 variant of the phyBOARD-Segin. Signed-off-by: Primoz Fiser Reviewed-by: Peng Fan --- Changes in v2: - no changes=20 arch/arm64/boot/dts/freescale/Makefile | 2 + .../imx93-phyboard-segin-peb-eval-01.dtso | 52 +++++++++++++++++++ 2 files changed, 54 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx93-phyboard-segin-peb-= eval-01.dtso diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/f= reescale/Makefile index 08a1de299538..011b2d58e4f7 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -325,7 +325,9 @@ dtb-$(CONFIG_ARCH_MXC) +=3D imx93-kontron-bl-osm-s.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx93-phyboard-nash.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx93-phyboard-segin.dtb =20 +imx93-phyboard-segin-peb-eval-01-dtbs +=3D imx93-phyboard-segin.dtb imx93-= phyboard-segin-peb-eval-01.dtbo imx93-phycore-rpmsg-dtbs +=3D imx93-phyboard-nash.dtb imx93-phyboard-segin= .dtb imx93-phycore-rpmsg.dtbo +dtb-$(CONFIG_ARCH_MXC) +=3D imx93-phyboard-segin-peb-eval-01.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx93-phycore-rpmsg.dtb =20 dtb-$(CONFIG_ARCH_MXC) +=3D imx93-tqma9352-mba91xxca.dtb diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin-peb-eval-01= .dtso b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin-peb-eval-01.dtso new file mode 100644 index 000000000000..8039aa1ddfba --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin-peb-eval-01.dtso @@ -0,0 +1,52 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2025 PHYTEC Messtechnik GmbH + * Author: Andrej Picej + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include "imx93-pinfunc.h" + +&{/} { + gpio-keys { + compatible =3D "gpio-keys"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_gpio_keys>; + + button-s2 { + label =3D "sleep"; + linux,code =3D ; + gpios =3D <&gpio1 10 GPIO_ACTIVE_LOW>; + wakeup-source; + }; + }; + + user-leds { + compatible =3D "gpio-leds"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_user_leds>; + + user-led2 { + gpios =3D <&gpio4 13 GPIO_ACTIVE_HIGH>; + default-state =3D "on"; + }; + }; +}; + +&iomuxc { + pinctrl_gpio_keys: gpiokeysgrp { + fsl,pins =3D < + MX93_PAD_PDM_BIT_STREAM1__GPIO1_IO10 0x31e + >; + }; + + pinctrl_user_leds: userledsgrp { + fsl,pins =3D < + MX93_PAD_ENET1_RD3__GPIO4_IO13 0x31e + >; + }; +}; --=20 2.34.1 From nobody Tue Oct 7 20:01:39 2025 Received: from cpanel.siel.si (cpanel.siel.si [46.19.9.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5D8C5275862; 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dmarc=none (p=none dis=none) header.from=norik.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=norik.com Received: from [89.212.21.243] (port=56226 helo=localhost.localdomain) by cpanel.siel.si with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96.2) (envelope-from ) id 1uYf4B-00DKr8-18; Mon, 07 Jul 2025 08:11:02 +0200 From: Primoz Fiser To: Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, upstream@lists.phytec.de Subject: [PATCH v2 3/4] arm64: dts: imx93-phyboard-segin: Add PEB-WLBT-05 overlay Date: Mon, 7 Jul 2025 08:11:00 +0200 Message-Id: <20250707061101.1194618-4-primoz.fiser@norik.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250707061101.1194618-1-primoz.fiser@norik.com> References: <20250707061101.1194618-1-primoz.fiser@norik.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - cpanel.siel.si X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - norik.com X-Get-Message-Sender-Via: cpanel.siel.si: authenticated_id: primoz.fiser@norik.com X-Authenticated-Sender: cpanel.siel.si: primoz.fiser@norik.com X-Source: X-Source-Args: X-Source-Dir: Content-Type: text/plain; charset="utf-8" Add support for PEB-WLBT-05 WLAN/BT adapter on phyBOARD-Segin-i.MX93. The PEB-WLBT-05 is equipped with a Sterling-LWB radio module, which is capable of Wi-Fi 802.11 b/g/n and Bluetooth 4.2. Signed-off-by: Primoz Fiser Reviewed-by: Peng Fan --- Changes in v2: - no changes=20 arch/arm64/boot/dts/freescale/Makefile | 2 + .../imx93-phyboard-segin-peb-wlbt-05.dtso | 93 +++++++++++++++++++ 2 files changed, 95 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx93-phyboard-segin-peb-= wlbt-05.dtso diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/f= reescale/Makefile index 011b2d58e4f7..3166684ab558 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -326,8 +326,10 @@ dtb-$(CONFIG_ARCH_MXC) +=3D imx93-phyboard-nash.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx93-phyboard-segin.dtb =20 imx93-phyboard-segin-peb-eval-01-dtbs +=3D imx93-phyboard-segin.dtb imx93-= phyboard-segin-peb-eval-01.dtbo +imx93-phyboard-segin-peb-wlbt-05-dtbs +=3D imx93-phyboard-segin.dtb imx93-= phyboard-segin-peb-wlbt-05.dtbo imx93-phycore-rpmsg-dtbs +=3D imx93-phyboard-nash.dtb imx93-phyboard-segin= .dtb imx93-phycore-rpmsg.dtbo dtb-$(CONFIG_ARCH_MXC) +=3D imx93-phyboard-segin-peb-eval-01.dtb +dtb-$(CONFIG_ARCH_MXC) +=3D imx93-phyboard-segin-peb-wlbt-05.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx93-phycore-rpmsg.dtb =20 dtb-$(CONFIG_ARCH_MXC) +=3D imx93-tqma9352-mba91xxca.dtb diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin-peb-wlbt-05= .dtso b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin-peb-wlbt-05.dtso new file mode 100644 index 000000000000..fba1362ced72 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin-peb-wlbt-05.dtso @@ -0,0 +1,93 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2025 PHYTEC Messtechnik GmbH + * Author: Andrej Picej + */ + +/dts-v1/; +/plugin/; + +#include +#include "imx93-pinfunc.h" + +&{/} { + usdhc3_pwrseq: usdhc3-pwrseq { + compatible =3D "mmc-pwrseq-simple"; + post-power-on-delay-ms =3D <100>; + power-off-delay-us =3D <60>; + reset-gpios =3D <&gpio4 7 GPIO_ACTIVE_LOW>; + }; +}; + +&lpuart5 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_uart5>; + status =3D "okay"; + + bluetooth { + compatible =3D "brcm,bcm43438-bt"; + shutdown-gpios =3D <&gpio4 13 GPIO_ACTIVE_HIGH>; + host-wakeup-gpios =3D <&gpio1 0 GPIO_ACTIVE_HIGH>; + max-speed =3D <2000000>; + }; +}; + +&usdhc3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + pinctrl-names =3D "default", "sleep"; + pinctrl-0 =3D <&pinctrl_usdhc3>, <&pinctrl_wlbt>; + pinctrl-1 =3D <&pinctrl_usdhc3_sleep>, <&pinctrl_wlbt>; + mmc-pwrseq =3D <&usdhc3_pwrseq>; + bus-width =3D <4>; + non-removable; + no-1-8-v; + status =3D "okay"; + + brmcf: wifi@1 { + compatible =3D "brcm,bcm4329-fmac"; + reg =3D <1>; + }; +}; + +&iomuxc { + pinctrl_uart5: uart5grp { + fsl,pins =3D < + MX93_PAD_DAP_TDO_TRACESWO__LPUART5_TX 0x31e + MX93_PAD_DAP_TDI__LPUART5_RX 0x31e + MX93_PAD_DAP_TCLK_SWCLK__LPUART5_CTS_B 0x31e + MX93_PAD_DAP_TMS_SWDIO__LPUART5_RTS_B 0x31e + >; + }; + + /* need to config the SION for data and cmd pad, refer to ERR052021 */ + pinctrl_usdhc3: usdhc3grp { + fsl,pins =3D < + MX93_PAD_GPIO_IO22__USDHC3_CLK 0x179e + MX93_PAD_GPIO_IO23__USDHC3_CMD 0x4000139e + MX93_PAD_GPIO_IO24__USDHC3_DATA0 0x4000139e + MX93_PAD_GPIO_IO25__USDHC3_DATA1 0x4000139e + MX93_PAD_GPIO_IO26__USDHC3_DATA2 0x4000139e + MX93_PAD_GPIO_IO27__USDHC3_DATA3 0x4000139e + >; + }; + + pinctrl_usdhc3_sleep: usdhc3sleepgrp { + fsl,pins =3D < + MX93_PAD_GPIO_IO22__USDHC3_CLK 0x31e + MX93_PAD_GPIO_IO23__USDHC3_CMD 0x31e + MX93_PAD_GPIO_IO24__USDHC3_DATA0 0x31e + MX93_PAD_GPIO_IO25__USDHC3_DATA1 0x31e + MX93_PAD_GPIO_IO26__USDHC3_DATA2 0x31e + MX93_PAD_GPIO_IO27__USDHC3_DATA3 0x31e + >; + }; + + pinctrl_wlbt: wlbtgrp { + fsl,pins =3D < + MX93_PAD_ENET1_RD3__GPIO4_IO13 0x31e /* BT ENABLE */ + MX93_PAD_ENET1_TXC__GPIO4_IO07 0x31e /* WLAN ENABLE */ + MX93_PAD_I2C1_SCL__GPIO1_IO00 0x31e /* HOST WAKEUP */ + >; + }; +}; --=20 2.34.1 From nobody Tue Oct 7 20:01:39 2025 Received: from cpanel.siel.si (cpanel.siel.si [46.19.9.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 89FF9274FD7; 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dmarc=none (p=none dis=none) header.from=norik.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=norik.com Received: from [89.212.21.243] (port=56226 helo=localhost.localdomain) by cpanel.siel.si with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96.2) (envelope-from ) id 1uYf4B-00DKr8-1U; Mon, 07 Jul 2025 08:11:02 +0200 From: Primoz Fiser To: Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, upstream@lists.phytec.de Subject: [PATCH v2 4/4] arm64: dts: imx93-phyboard-nash: Add PEB-WLBT-07 overlay Date: Mon, 7 Jul 2025 08:11:01 +0200 Message-Id: <20250707061101.1194618-5-primoz.fiser@norik.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250707061101.1194618-1-primoz.fiser@norik.com> References: <20250707061101.1194618-1-primoz.fiser@norik.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - cpanel.siel.si X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - norik.com X-Get-Message-Sender-Via: cpanel.siel.si: authenticated_id: primoz.fiser@norik.com X-Authenticated-Sender: cpanel.siel.si: primoz.fiser@norik.com X-Source: X-Source-Args: X-Source-Dir: Content-Type: text/plain; charset="utf-8" Add overlay to support PHYTEC PEB-WLBT-07 WiFi/Bluetooth evaluation adapter on phyBOARD-Nash-i.MX93 board. Adapter uses the u-blox MAYA-W2 module (IW612 chipset) which is capable of Wi-Fi 6 and Bluetooth 5.4 LE. Signed-off-by: Primoz Fiser Reviewed-by: Peng Fan --- Changes in v2: - no changes=20 arch/arm64/boot/dts/freescale/Makefile | 2 + .../imx93-phyboard-nash-peb-wlbt-07.dtso | 88 +++++++++++++++++++ 2 files changed, 90 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx93-phyboard-nash-peb-w= lbt-07.dtso diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/f= reescale/Makefile index 3166684ab558..699c3b1d80b2 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -325,9 +325,11 @@ dtb-$(CONFIG_ARCH_MXC) +=3D imx93-kontron-bl-osm-s.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx93-phyboard-nash.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx93-phyboard-segin.dtb =20 +imx93-phyboard-nash-peb-wlbt-07-dtbs +=3D imx93-phyboard-nash.dtb imx93-ph= yboard-nash-peb-wlbt-07.dtbo imx93-phyboard-segin-peb-eval-01-dtbs +=3D imx93-phyboard-segin.dtb imx93-= phyboard-segin-peb-eval-01.dtbo imx93-phyboard-segin-peb-wlbt-05-dtbs +=3D imx93-phyboard-segin.dtb imx93-= phyboard-segin-peb-wlbt-05.dtbo imx93-phycore-rpmsg-dtbs +=3D imx93-phyboard-nash.dtb imx93-phyboard-segin= .dtb imx93-phycore-rpmsg.dtbo +dtb-$(CONFIG_ARCH_MXC) +=3D imx93-phyboard-nash-peb-wlbt-07.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx93-phyboard-segin-peb-eval-01.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx93-phyboard-segin-peb-wlbt-05.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx93-phycore-rpmsg.dtb diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-nash-peb-wlbt-07.= dtso b/arch/arm64/boot/dts/freescale/imx93-phyboard-nash-peb-wlbt-07.dtso new file mode 100644 index 000000000000..c7553e39e763 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-nash-peb-wlbt-07.dtso @@ -0,0 +1,88 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2025 PHYTEC Messtechnik GmbH + * Author: Primoz Fiser + */ + +/dts-v1/; +/plugin/; + +#include +#include "imx93-pinfunc.h" + +&{/} { + usdhc3_pwrseq: usdhc3-pwrseq { + compatible =3D "mmc-pwrseq-simple"; + reset-gpios =3D <&gpio4 29 GPIO_ACTIVE_LOW>; + }; +}; + +&lpuart5 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_uart5>; + status =3D "okay"; + + bluetooth { + compatible =3D "nxp,88w8987-bt"; + }; +}; + +/* + * NOTE: When uSDHC3 port is multiplexed on GPIO_IO[27:22] pads, it only + * supports 50 MHz mode, due to introduction of potential variations in + * trace impedance, drive strength, and timing skew. Refer to i.MX 93 + * Application Processors Data Sheet, Rev. 3, page 60 for more details. + */ +&usdhc3 { + pinctrl-names =3D "default", "sleep"; + pinctrl-0 =3D <&pinctrl_usdhc3>, <&pinctrl_wlbt>; + pinctrl-1 =3D <&pinctrl_usdhc3_sleep>, <&pinctrl_wlbt>; + mmc-pwrseq =3D <&usdhc3_pwrseq>; + bus-width =3D <4>; + keep-power-in-suspend; + non-removable; + wakeup-source; + status =3D "okay"; +}; + +&iomuxc { + pinctrl_uart5: uart5grp { + fsl,pins =3D < + MX93_PAD_DAP_TDO_TRACESWO__LPUART5_TX 0x31e + MX93_PAD_DAP_TDI__LPUART5_RX 0x31e + MX93_PAD_DAP_TCLK_SWCLK__LPUART5_CTS_B 0x31e + MX93_PAD_DAP_TMS_SWDIO__LPUART5_RTS_B 0x31e + >; + }; + + /* need to config the SION for data and cmd pad, refer to ERR052021 */ + pinctrl_usdhc3: usdhc3grp { + fsl,pins =3D < + MX93_PAD_GPIO_IO22__USDHC3_CLK 0x179e + MX93_PAD_SD3_CMD__USDHC3_CMD 0x4000178e + MX93_PAD_SD3_DATA0__USDHC3_DATA0 0x4000138e + MX93_PAD_SD3_DATA1__USDHC3_DATA1 0x4000138e + MX93_PAD_SD3_DATA2__USDHC3_DATA2 0x4000138e + MX93_PAD_SD3_DATA3__USDHC3_DATA3 0x4000138e + >; + }; + + pinctrl_usdhc3_sleep: usdhc3sleepgrp { + fsl,pins =3D < + MX93_PAD_GPIO_IO22__USDHC3_CLK 0x31e + MX93_PAD_SD3_CMD__USDHC3_CMD 0x31e + MX93_PAD_SD3_DATA0__USDHC3_DATA0 0x31e + MX93_PAD_SD3_DATA1__USDHC3_DATA1 0x31e + MX93_PAD_SD3_DATA2__USDHC3_DATA2 0x31e + MX93_PAD_SD3_DATA3__USDHC3_DATA3 0x31e + >; + }; + + pinctrl_wlbt: wlbtgrp { + fsl,pins =3D < + MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x31e /* WAKE_DEV */ + MX93_PAD_CCM_CLKO3__GPIO4_IO28 0x31e /* WAKE_HOST */ + MX93_PAD_CCM_CLKO4__GPIO4_IO29 0x31e /* PDn */ + >; + }; +}; --=20 2.34.1