From nobody Tue Oct 7 18:25:18 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9C47C2877E3; Mon, 7 Jul 2025 21:37:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751924246; cv=none; b=DhOkIhhqVtr7TSuzBvlwHS24akiIEu4wO/3sVHyufcScjVuew1OO3weQ7q/aSdlscT/Sv+EIENBrelLYozK2hDSelpygnoqMrp2ff8HcVGl618GUwH0aY87kK6lmwohnCWfONAP05pCLvOLBM/Q7dA9uLh5RIlj/iovB2ashCR8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751924246; c=relaxed/simple; bh=4WhOw5Pc8bV38NNBKDq+M7SXVLk0DorgEecTG6vPvq8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=BBQhlWTlpIPNcCGtYY5UmKcErlo92FYgdxiPHIgOBm5x04PfV+l+19TbzM4i8f2LtcT+BlfHLvctlL7WOFVbBbOlKGezfEm267YNMMwaELyaaEfgVwB/2kA6sS5UcKjNYWBcHPZGRfSwWAQIjqK79WJnWnndcPbP+TyZTrVp6k4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=NLOKtWJZ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="NLOKtWJZ" Received: by smtp.kernel.org (Postfix) with ESMTPS id 5C41FC4CEF5; Mon, 7 Jul 2025 21:37:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1751924246; bh=4WhOw5Pc8bV38NNBKDq+M7SXVLk0DorgEecTG6vPvq8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=NLOKtWJZuGKu2+5bdPAnSUhsDftWh53GkMUJmcd6ksHf7E5sB4OtSY3CuwlstG9hE 1Yrj552WmX8rU1GUukJVuHtddonHbcatTMs31LDeuy1d0EYmMbJUX4/5EirBTbpQrs UKYdIsHTjNjEFPHs29g2IEXCij2/FNOGPKI/1JrH7PYzrj97QCwdaDi/O42OC/ucLy e7T4lORI+cOn4AqId6Jy2WSifTR/Aaw0Y1ZIxnwCGQNj0JEhQh5heRi+zp2Wdh9mID KOAyt+b4RMQ816rDVlGx0uI9HlaA/8ABYGMtM+va7r1Hr+01FiqhoCkqHpAUmMtzg3 jJWSjE8xieUrQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4A3D7C83030; Mon, 7 Jul 2025 21:37:26 +0000 (UTC) From: Samuel Kayode via B4 Relay Date: Mon, 07 Jul 2025 17:37:20 -0400 Subject: [PATCH v8 1/6] dt-bindings: mfd: add pf1550 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250707-pf1550-v8-1-6b6eb67c03a0@savoirfairelinux.com> References: <20250707-pf1550-v8-0-6b6eb67c03a0@savoirfairelinux.com> In-Reply-To: <20250707-pf1550-v8-0-6b6eb67c03a0@savoirfairelinux.com> To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Liam Girdwood , Mark Brown , Dmitry Torokhov , Sebastian Reichel , Frank Li Cc: imx@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-input@vger.kernel.org, linux-pm@vger.kernel.org, Abel Vesa , Abel Vesa , Robin Gong , Robin Gong , Enric Balletbo i Serra , Samuel Kayode , Abel Vesa , Krzysztof Kozlowski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1751924244; l=5930; i=samuel.kayode@savoirfairelinux.com; s=20250527; h=from:subject:message-id; bh=r8SVeBRmGib5X/fCH5StS6pFWPmPVyMn+NWDHww3thQ=; b=mT2EAkMmiI//ohtjwZCKgPA5OowIQCCeuOPEV+HJ3RCozs8dKYlKHBPh8JtAqojZv+OHi/ezW +TA/b82KhiLAyM+l+Bb4G+aLwPTuSdBdmvduZ9KWJ0wX9ziXWgwMDBQ X-Developer-Key: i=samuel.kayode@savoirfairelinux.com; a=ed25519; pk=TPSQGQ5kywnnPyGs0EQqLajLFbdDu17ahXz8/gxMfio= X-Endpoint-Received: by B4 Relay for samuel.kayode@savoirfairelinux.com/20250527 with auth_id=412 X-Original-From: Samuel Kayode Reply-To: samuel.kayode@savoirfairelinux.com From: Samuel Kayode Add a DT binding document for pf1550 PMIC. This describes the core mfd device along with its children: regulators, charger and onkey. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Samuel Kayode --- v5: - Address Krzystof's feedback: - Drop monitored battery ref already included in power supply schema - Move `additionalProperties` close to `type` for regulator - Drop unneccessary | - Change `additionalProperties` to `unevaluatedProperties` for the PMIC v4: - Address Krzystof's feedback: - Filename changed to nxp,pf1550.yaml - Replace Freescale with NXP - Define include before battery-cell - Drop operating-range-celsius in example since nxp,thermal-regulation-celsisus already exists - Not sure if there is similar binding to thermal-regulation... for regulating temperature on thermal-zones? @Sebastian and @Krzysztof v3: - Address Krzysztof's feedback: - Fold charger and onkey objects - Drop compatible for sub-devices: onkey, charger and regulator. - Drop constant voltage property already included in monitored-battery - Fix whitespace warnings - Fix license v2: - Add yamls for the PMIC and the sub-devices --- .../devicetree/bindings/mfd/nxp,pf1550.yaml | 137 +++++++++++++++++= ++++ 1 file changed, 137 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/nxp,pf1550.yaml b/Docume= ntation/devicetree/bindings/mfd/nxp,pf1550.yaml new file mode 100644 index 0000000000000000000000000000000000000000..a0b412c3468a3d8972e5c129387= c5417933c78e3 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/nxp,pf1550.yaml @@ -0,0 +1,137 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/nxp,pf1550.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP PF1550 Power Management IC + +maintainers: + - Samuel Kayode + +description: + PF1550 PMIC provides battery charging and power supply for low power IoT= and + wearable applications. This device consists of an i2c controlled MFD that + includes regulators, battery charging and an onkey/power button. + +$ref: /schemas/power/supply/power-supply.yaml + +properties: + compatible: + const: nxp,pf1550 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + wakeup-source: true + + regulators: + type: object + additionalProperties: false + + patternProperties: + "^(ldo[1-3]|sw[1-3]|vrefddr)$": + type: object + $ref: /schemas/regulator/regulator.yaml + description: + regulator configuration for ldo1-3, buck converters(sw1-3) + and DDR termination reference voltage (vrefddr) + unevaluatedProperties: false + + monitored-battery: + description: | + A phandle to a monitored battery node that contains a valid value + for: + constant-charge-voltage-max-microvolt. + + nxp,thermal-regulation-celsius: + description: + Temperature threshold for thermal regulation of charger in celsius. + enum: [ 60, 75, 90, 105 ] + + nxp,min-system-microvolt: + description: + System specific lower limit voltage. + enum: [ 3500000, 3700000, 4300000 ] + +required: + - compatible + - reg + - interrupts + +unevaluatedProperties: false + +examples: + - | + #include + #include + + battery: battery-cell { + compatible =3D "simple-battery"; + constant-charge-voltage-max-microvolt =3D <4400000>; + }; + + i2c { + #address-cells =3D <1>; + #size-cells =3D <0>; + + pmic@8 { + compatible =3D "nxp,pf1550"; + reg =3D <0x8>; + + interrupt-parent =3D <&gpio1>; + interrupts =3D <2 IRQ_TYPE_LEVEL_LOW>; + wakeup-source; + monitored-battery =3D <&battery>; + nxp,min-system-microvolt =3D <4300000>; + nxp,thermal-regulation-celsius =3D <75>; + + regulators { + sw1_reg: sw1 { + regulator-name =3D "sw1"; + regulator-min-microvolt =3D <600000>; + regulator-max-microvolt =3D <1387500>; + regulator-always-on; + regulator-ramp-delay =3D <6250>; + }; + + sw2_reg: sw2 { + regulator-name =3D "sw2"; + regulator-min-microvolt =3D <600000>; + regulator-max-microvolt =3D <1387500>; + regulator-always-on; + }; + + sw3_reg: sw3 { + regulator-name =3D "sw3"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + regulator-always-on; + }; + + vldo1_reg: ldo1 { + regulator-name =3D "ldo1"; + regulator-min-microvolt =3D <750000>; + regulator-max-microvolt =3D <3300000>; + regulator-always-on; + }; + + vldo2_reg: ldo2 { + regulator-name =3D "ldo2"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + regulator-always-on; + }; + + vldo3_reg: ldo3 { + regulator-name =3D "ldo3"; + regulator-min-microvolt =3D <750000>; + regulator-max-microvolt =3D <3300000>; + regulator-always-on; + }; + }; + }; + }; --=20 2.49.0 From nobody Tue Oct 7 18:25:18 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D27272877FE; Mon, 7 Jul 2025 21:37:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751924247; cv=none; b=blYi5YbDWR2/5gnNIXJ0zdBvaOWXsBXU97kzNo0M+dTsxHv6L9J3u9UDYpon0igTDH9f4yrbv00PDm9x/jKoZtiIcEYgMcUWVpKHlEfOjoB7fKhkGELPhKaIyM/yevP8D3CRElRqHNJRM+Quo1hJhoVUxT+CZpNzfFa52wV/pug= ARC-Message-Signature: i=1; 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b=EYin146NXpb4t60qISHxko/wd1xSkxRKbSKSLyfh5tSk0fXJ3EuDSA/g6umhOOZ0e SDYKOemqFnvV0IGh1mXkN2PqkRk0KokvnlQ8sZu3H/gbhKOVAyX6mULmnQXK3k5Kqu omv/fqixtXzgkOny8v4PcjKPlHEzHMnuuSAViQwKGmHPYUolVtcyM4RBEXUqOW3fTd x1EGh3sYxubXWiVPDBlLNqJ37hnJ7LKqDZgEg0muNclzBnNXS5+PftvT4SQUIKXs3m jzCxxsjl6T0E5F3oT73wiW75Z/pvI1zJs13oNpragst8hCB/FfMDx/nDXY0aY8IGlD lMyalx9+UDUJw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5D3ACC83F0A; Mon, 7 Jul 2025 21:37:26 +0000 (UTC) From: Samuel Kayode via B4 Relay Date: Mon, 07 Jul 2025 17:37:21 -0400 Subject: [PATCH v8 2/6] mfd: pf1550: add core driver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250707-pf1550-v8-2-6b6eb67c03a0@savoirfairelinux.com> References: <20250707-pf1550-v8-0-6b6eb67c03a0@savoirfairelinux.com> In-Reply-To: <20250707-pf1550-v8-0-6b6eb67c03a0@savoirfairelinux.com> To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Liam Girdwood , Mark Brown , Dmitry Torokhov , Sebastian Reichel , Frank Li Cc: imx@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-input@vger.kernel.org, linux-pm@vger.kernel.org, Abel Vesa , Abel Vesa , Robin Gong , Robin Gong , Enric Balletbo i Serra , Samuel Kayode , Abel Vesa , Frank Li X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1751924244; l=25173; i=samuel.kayode@savoirfairelinux.com; s=20250527; h=from:subject:message-id; bh=OMwEy2xv/A8gst+9qgItH+nLXrgG8gPz1GsKIniCWhg=; b=pdAd/fUc9Iyd0PFcQ0vJU9JeIlA0JbvvRRbUj8ZBrAYpRdlUp4PU7bXsIffvKtLCe1oFJZLrO P5Xu5GeBvezC7DUVs6iD6saw3qlbmSbAEz5NtOL1NVvm310zDhrgn3/ X-Developer-Key: i=samuel.kayode@savoirfairelinux.com; a=ed25519; pk=TPSQGQ5kywnnPyGs0EQqLajLFbdDu17ahXz8/gxMfio= X-Endpoint-Received: by B4 Relay for samuel.kayode@savoirfairelinux.com/20250527 with auth_id=412 X-Original-From: Samuel Kayode Reply-To: samuel.kayode@savoirfairelinux.com From: Samuel Kayode Add the core driver for pf1550 PMIC. There are 3 subdevices for which the drivers will be added in subsequent patches. Reviewed-by: Frank Li Signed-off-by: Samuel Kayode --- v8: - Address Lee's feedback: - Drop `mfd` from driver description and comments - Add module name in Kconfig - Fix license commenting - Drop filenames from comments - Drop unnecessary tabbing - Alphabetical ordering of includes - Remove magic numbers - Add comments for pf1550_read_otp function - Fix log error message in pf1550_read_otp - Drop pf1550_add_child_device function - Start comments with upper case - Rename pf1550_dev to pf1550_ddata - Drop i2c member in struct pf1550_ddata/pf1550_dev - Use more helpful log message when device id not recognized - Fix dvs_enb: when bit is set the DVS is disabled and when bit is clear= the DVS is enabled - Verified the PM_OPS suspend and resume do act as expected v7: - Address Frank's feedback: - Ensure reverse christmas tree order for local variable definitions - Drop unnecessary driver data definition in id table v6: - Address Frank's feedback: - Ensure lowercase when defining register addresses - Use GENMASK macro for masking - Hardcode IRQ flags in pf1550_add_child_device - Add dvs_enb variable for SW2 regulator - Drop chip type variable v5: - Use top level interrupt to manage interrupts for the sub-drivers as recommended by Mark Brown. The regmap_irq_sub_irq_map would have been us= ed if not for the irregular charger irq address. For all children, the mask register is directly after the irq register (i.e., 0x08, 0x09) except for the charger: 0x80, 0x82. Meaning .mask_base would be applicable for all but the charger - Fix bad offset for temperature interrupts of regulator v4: - Use struct resource to define irq so platform_get_irq can be used in children as suggested by Dmitry - Let mfd_add_devices create the mappings for the interrupts - ack_base and init_ack_masked defined for charger and regulator irq chips - No need to define driver_data in table id v3: - Address Dmitry's feedback: - Place Table IDs next to each other - Drop of_match_ptr - Replace dev_err with dev_err_probe in probe method - Drop useless log in probe - Map all irqs instead of doing it in the sub-devices as recommended by Dmitry. v2: - Address feedback from Enric Balletbo Serra --- drivers/mfd/Kconfig | 16 ++ drivers/mfd/Makefile | 2 + drivers/mfd/pf1550.c | 365 +++++++++++++++++++++++++++++++++++++++++= ++++ include/linux/mfd/pf1550.h | 266 +++++++++++++++++++++++++++++++++ 4 files changed, 649 insertions(+) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 96992af22565205716d72db0494c7bf2567b045e..4ac91a556713ba7a867c1d4430c= 6c0d8bb05d0d7 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -558,6 +558,22 @@ config MFD_MX25_TSADC i.MX25 processors. They consist of a conversion queue for general purpose ADC and a queue for Touchscreens. =20 +config MFD_PF1550 + tristate "NXP PF1550 PMIC Support" + depends on I2C=3Dy && OF + select MFD_CORE + select REGMAP_I2C + select REGMAP_IRQ + help + Say yes here to add support for NXP PF1550. This is a companion Power + Management IC with regulators, onkey, and charger control on chip. + This driver provides common support for accessing the device; + additional drivers must be enabled in order to use the functionality + of the device. + + This driver can also be built as a module and if so will be called + pf1550. + config MFD_HI6421_PMIC tristate "HiSilicon Hi6421 PMU/Codec IC" depends on OF diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 5e5cc279af6036a6b3ea1f1f0feeddf45b85f15c..7391d1b81d1ee499507b4ac24ff= 00eb2e344d60b 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -120,6 +120,8 @@ obj-$(CONFIG_MFD_MC13XXX) +=3D mc13xxx-core.o obj-$(CONFIG_MFD_MC13XXX_SPI) +=3D mc13xxx-spi.o obj-$(CONFIG_MFD_MC13XXX_I2C) +=3D mc13xxx-i2c.o =20 +obj-$(CONFIG_MFD_PF1550) +=3D pf1550.o + obj-$(CONFIG_MFD_CORE) +=3D mfd-core.o =20 ocelot-soc-objs :=3D ocelot-core.o ocelot-spi.o diff --git a/drivers/mfd/pf1550.c b/drivers/mfd/pf1550.c new file mode 100644 index 0000000000000000000000000000000000000000..a477c32ee15f7acecc3d18a4275= c0f93860670f2 --- /dev/null +++ b/drivers/mfd/pf1550.c @@ -0,0 +1,365 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * core driver for the PF1550 + * + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Robin Gong + * + * Portions Copyright (c) 2025 Savoir-faire Linux Inc. + * Samuel Kayode + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +static const struct regmap_config pf1550_regmap_config =3D { + .reg_bits =3D 8, + .val_bits =3D 8, + .max_register =3D PF1550_PMIC_REG_END, +}; + +static const struct regmap_irq pf1550_irqs[] =3D { + REGMAP_IRQ_REG(PF1550_IRQ_CHG, 0, IRQ_CHG), + REGMAP_IRQ_REG(PF1550_IRQ_REGULATOR, 0, IRQ_REGULATOR), + REGMAP_IRQ_REG(PF1550_IRQ_ONKEY, 0, IRQ_ONKEY), +}; + +static const struct regmap_irq_chip pf1550_irq_chip =3D { + .name =3D "pf1550", + .status_base =3D PF1550_PMIC_REG_INT_CATEGORY, + .init_ack_masked =3D 1, + .num_regs =3D 1, + .irqs =3D pf1550_irqs, + .num_irqs =3D ARRAY_SIZE(pf1550_irqs), +}; + +static const struct regmap_irq pf1550_regulator_irqs[] =3D { + REGMAP_IRQ_REG(PF1550_PMIC_IRQ_SW1_LS, 0, PMIC_IRQ_SW1_LS), + REGMAP_IRQ_REG(PF1550_PMIC_IRQ_SW2_LS, 0, PMIC_IRQ_SW2_LS), + REGMAP_IRQ_REG(PF1550_PMIC_IRQ_SW3_LS, 0, PMIC_IRQ_SW3_LS), + REGMAP_IRQ_REG(PF1550_PMIC_IRQ_SW1_HS, 3, PMIC_IRQ_SW1_HS), + REGMAP_IRQ_REG(PF1550_PMIC_IRQ_SW2_HS, 3, PMIC_IRQ_SW2_HS), + REGMAP_IRQ_REG(PF1550_PMIC_IRQ_SW3_HS, 3, PMIC_IRQ_SW3_HS), + REGMAP_IRQ_REG(PF1550_PMIC_IRQ_LDO1_FAULT, 16, PMIC_IRQ_LDO1_FAULT), + REGMAP_IRQ_REG(PF1550_PMIC_IRQ_LDO2_FAULT, 16, PMIC_IRQ_LDO2_FAULT), + REGMAP_IRQ_REG(PF1550_PMIC_IRQ_LDO3_FAULT, 16, PMIC_IRQ_LDO3_FAULT), + REGMAP_IRQ_REG(PF1550_PMIC_IRQ_TEMP_110, 24, PMIC_IRQ_TEMP_110), + REGMAP_IRQ_REG(PF1550_PMIC_IRQ_TEMP_125, 24, PMIC_IRQ_TEMP_125), +}; + +static const struct regmap_irq_chip pf1550_regulator_irq_chip =3D { + .name =3D "pf1550-regulator", + .status_base =3D PF1550_PMIC_REG_SW_INT_STAT0, + .ack_base =3D PF1550_PMIC_REG_SW_INT_STAT0, + .mask_base =3D PF1550_PMIC_REG_SW_INT_MASK0, + .use_ack =3D 1, + .init_ack_masked =3D 1, + .num_regs =3D 25, + .irqs =3D pf1550_regulator_irqs, + .num_irqs =3D ARRAY_SIZE(pf1550_regulator_irqs), +}; + +static const struct resource regulator_resources[] =3D { + DEFINE_RES_IRQ(PF1550_PMIC_IRQ_SW1_LS), + DEFINE_RES_IRQ(PF1550_PMIC_IRQ_SW2_LS), + DEFINE_RES_IRQ(PF1550_PMIC_IRQ_SW3_LS), + DEFINE_RES_IRQ(PF1550_PMIC_IRQ_SW1_HS), + DEFINE_RES_IRQ(PF1550_PMIC_IRQ_SW2_HS), + DEFINE_RES_IRQ(PF1550_PMIC_IRQ_SW3_HS), + DEFINE_RES_IRQ(PF1550_PMIC_IRQ_LDO1_FAULT), + DEFINE_RES_IRQ(PF1550_PMIC_IRQ_LDO2_FAULT), + DEFINE_RES_IRQ(PF1550_PMIC_IRQ_LDO3_FAULT), + DEFINE_RES_IRQ(PF1550_PMIC_IRQ_TEMP_110), + DEFINE_RES_IRQ(PF1550_PMIC_IRQ_TEMP_125), +}; + +static const struct regmap_irq pf1550_onkey_irqs[] =3D { + REGMAP_IRQ_REG(PF1550_ONKEY_IRQ_PUSHI, 0, ONKEY_IRQ_PUSHI), + REGMAP_IRQ_REG(PF1550_ONKEY_IRQ_1SI, 0, ONKEY_IRQ_1SI), + REGMAP_IRQ_REG(PF1550_ONKEY_IRQ_2SI, 0, ONKEY_IRQ_2SI), + REGMAP_IRQ_REG(PF1550_ONKEY_IRQ_3SI, 0, ONKEY_IRQ_3SI), + REGMAP_IRQ_REG(PF1550_ONKEY_IRQ_4SI, 0, ONKEY_IRQ_4SI), + REGMAP_IRQ_REG(PF1550_ONKEY_IRQ_8SI, 0, ONKEY_IRQ_8SI), +}; + +static const struct regmap_irq_chip pf1550_onkey_irq_chip =3D { + .name =3D "pf1550-onkey", + .status_base =3D PF1550_PMIC_REG_ONKEY_INT_STAT0, + .ack_base =3D PF1550_PMIC_REG_ONKEY_INT_STAT0, + .mask_base =3D PF1550_PMIC_REG_ONKEY_INT_MASK0, + .use_ack =3D 1, + .init_ack_masked =3D 1, + .num_regs =3D 1, + .irqs =3D pf1550_onkey_irqs, + .num_irqs =3D ARRAY_SIZE(pf1550_onkey_irqs), +}; + +static const struct resource onkey_resources[] =3D { + DEFINE_RES_IRQ(PF1550_ONKEY_IRQ_PUSHI), + DEFINE_RES_IRQ(PF1550_ONKEY_IRQ_1SI), + DEFINE_RES_IRQ(PF1550_ONKEY_IRQ_2SI), + DEFINE_RES_IRQ(PF1550_ONKEY_IRQ_3SI), + DEFINE_RES_IRQ(PF1550_ONKEY_IRQ_4SI), + DEFINE_RES_IRQ(PF1550_ONKEY_IRQ_8SI), +}; + +static const struct regmap_irq pf1550_charger_irqs[] =3D { + REGMAP_IRQ_REG(PF1550_CHARG_IRQ_BAT2SOCI, 0, CHARG_IRQ_BAT2SOCI), + REGMAP_IRQ_REG(PF1550_CHARG_IRQ_BATI, 0, CHARG_IRQ_BATI), + REGMAP_IRQ_REG(PF1550_CHARG_IRQ_CHGI, 0, CHARG_IRQ_CHGI), + REGMAP_IRQ_REG(PF1550_CHARG_IRQ_VBUSI, 0, CHARG_IRQ_VBUSI), + REGMAP_IRQ_REG(PF1550_CHARG_IRQ_THMI, 0, CHARG_IRQ_THMI), +}; + +static const struct regmap_irq_chip pf1550_charger_irq_chip =3D { + .name =3D "pf1550-charger", + .status_base =3D PF1550_CHARG_REG_CHG_INT, + .ack_base =3D PF1550_CHARG_REG_CHG_INT, + .mask_base =3D PF1550_CHARG_REG_CHG_INT_MASK, + .use_ack =3D 1, + .init_ack_masked =3D 1, + .num_regs =3D 1, + .irqs =3D pf1550_charger_irqs, + .num_irqs =3D ARRAY_SIZE(pf1550_charger_irqs), +}; + +static const struct resource charger_resources[] =3D { + DEFINE_RES_IRQ(PF1550_CHARG_IRQ_BAT2SOCI), + DEFINE_RES_IRQ(PF1550_CHARG_IRQ_BATI), + DEFINE_RES_IRQ(PF1550_CHARG_IRQ_CHGI), + DEFINE_RES_IRQ(PF1550_CHARG_IRQ_VBUSI), + DEFINE_RES_IRQ(PF1550_CHARG_IRQ_THMI), +}; + +static const struct mfd_cell pf1550_regulator_cell =3D { + .name =3D "pf1550-regulator", + .num_resources =3D ARRAY_SIZE(regulator_resources), + .resources =3D regulator_resources, +}; + +static const struct mfd_cell pf1550_onkey_cell =3D { + .name =3D "pf1550-onkey", + .num_resources =3D ARRAY_SIZE(onkey_resources), + .resources =3D onkey_resources, +}; + +static const struct mfd_cell pf1550_charger_cell =3D { + .name =3D "pf1550-charger", + .num_resources =3D ARRAY_SIZE(charger_resources), + .resources =3D charger_resources, +}; + +/* The PF1550 is shipped in variants of A0, A1,...A9. Each variant defines= a + * standard configuration of the PMIC in a One-Time Programmable (OTP) mem= ory. + * This memory is accessed indirectly by writing valid keys to specific + * registers of the PMIC. To read the OTP memory after writing the valid k= eys, + * the OTP register address to be read is written to pf1550 register 0xc4 = and + * its value read from pf1550 register 0xc5. + */ +static int pf1550_read_otp(const struct pf1550_ddata *pf1550, unsigned int= index, + unsigned int *val) +{ + int ret =3D 0; + + ret =3D regmap_write(pf1550->regmap, PF1550_PMIC_REG_KEY, + PF1550_OTP_PMIC_KEY); + if (ret) + goto read_err; + ret =3D regmap_write(pf1550->regmap, PF1550_CHARG_REG_CHGR_KEY2, + PF1550_OTP_CHGR_KEY); + if (ret) + goto read_err; + ret =3D regmap_write(pf1550->regmap, PF1550_TEST_REG_KEY3, + PF1550_OTP_TEST_KEY); + if (ret) + goto read_err; + ret =3D regmap_write(pf1550->regmap, PF1550_TEST_REG_FMRADDR, index); + if (ret) + goto read_err; + ret =3D regmap_read(pf1550->regmap, PF1550_TEST_REG_FMRDATA, val); + if (ret) + goto read_err; + + return 0; + +read_err: + return dev_err_probe(pf1550->dev, ret, "read otp reg %x not found!\n", + index); +} + +static int pf1550_i2c_probe(struct i2c_client *i2c) +{ + const struct mfd_cell *regulator =3D &pf1550_regulator_cell; + const struct mfd_cell *charger =3D &pf1550_charger_cell; + const struct mfd_cell *onkey =3D &pf1550_onkey_cell; + unsigned int reg_data =3D 0, otp_data =3D 0; + struct pf1550_ddata *pf1550; + struct irq_domain *domain; + int irq, ret =3D 0; + + pf1550 =3D devm_kzalloc(&i2c->dev, sizeof(*pf1550), GFP_KERNEL); + if (!pf1550) + return -ENOMEM; + + i2c_set_clientdata(i2c, pf1550); + pf1550->dev =3D &i2c->dev; + pf1550->irq =3D i2c->irq; + + pf1550->regmap =3D devm_regmap_init_i2c(i2c, &pf1550_regmap_config); + if (IS_ERR(pf1550->regmap)) + return dev_err_probe(pf1550->dev, PTR_ERR(pf1550->regmap), + "failed to allocate register map\n"); + + ret =3D regmap_read(pf1550->regmap, PF1550_PMIC_REG_DEVICE_ID, ®_data); + if (ret < 0) + return dev_err_probe(pf1550->dev, ret, "cannot read chip ID\n"); + if (reg_data !=3D PF1550_DEVICE_ID) + return dev_err_probe(pf1550->dev, -ENODEV, + "invalid device ID: 0x%02x\n", reg_data); + + /* Regulator DVS */ + ret =3D pf1550_read_otp(pf1550, PF1550_OTP_SW2_SW3, &otp_data); + if (ret) + return ret; + + /* When clear, DVS should be enabled */ + if (!(otp_data & OTP_DVS_ENB)) + pf1550->dvs_enb =3D true; + + /* Add top level interrupts */ + ret =3D devm_regmap_add_irq_chip(pf1550->dev, pf1550->regmap, pf1550->irq, + IRQF_ONESHOT | IRQF_SHARED | + IRQF_TRIGGER_FALLING, + 0, &pf1550_irq_chip, + &pf1550->irq_data); + if (ret) + return ret; + + /* Add regulator */ + irq =3D regmap_irq_get_virq(pf1550->irq_data, PF1550_IRQ_REGULATOR); + if (irq < 0) + return dev_err_probe(pf1550->dev, irq, + "Failed to get parent vIRQ(%d) for chip %s\n", + PF1550_IRQ_REGULATOR, pf1550_irq_chip.name); + + ret =3D devm_regmap_add_irq_chip(pf1550->dev, pf1550->regmap, irq, + IRQF_ONESHOT | IRQF_SHARED | + IRQF_TRIGGER_FALLING, 0, + &pf1550_regulator_irq_chip, + &pf1550->irq_data_regulator); + if (ret) + return dev_err_probe(pf1550->dev, ret, + "Failed to add %s IRQ chip\n", + pf1550_regulator_irq_chip.name); + + domain =3D regmap_irq_get_domain(pf1550->irq_data_regulator); + + ret =3D devm_mfd_add_devices(pf1550->dev, PLATFORM_DEVID_NONE, regulator, + 1, NULL, 0, domain); + if (ret) + return ret; + + /* Add onkey */ + irq =3D regmap_irq_get_virq(pf1550->irq_data, PF1550_IRQ_ONKEY); + if (irq < 0) + return dev_err_probe(pf1550->dev, irq, + "Failed to get parent vIRQ(%d) for chip %s\n", + PF1550_IRQ_ONKEY, pf1550_irq_chip.name); + + ret =3D devm_regmap_add_irq_chip(pf1550->dev, pf1550->regmap, irq, + IRQF_ONESHOT | IRQF_SHARED | + IRQF_TRIGGER_FALLING, 0, + &pf1550_onkey_irq_chip, + &pf1550->irq_data_onkey); + if (ret) + return dev_err_probe(pf1550->dev, ret, + "Failed to add %s IRQ chip\n", + pf1550_onkey_irq_chip.name); + + domain =3D regmap_irq_get_domain(pf1550->irq_data_onkey); + + ret =3D devm_mfd_add_devices(pf1550->dev, PLATFORM_DEVID_NONE, onkey, 1, + NULL, 0, domain); + if (ret) + return ret; + + /* Add battery charger */ + irq =3D regmap_irq_get_virq(pf1550->irq_data, PF1550_IRQ_CHG); + if (irq < 0) + return dev_err_probe(pf1550->dev, irq, + "Failed to get parent vIRQ(%d) for chip %s\n", + PF1550_IRQ_CHG, pf1550_irq_chip.name); + + ret =3D devm_regmap_add_irq_chip(pf1550->dev, pf1550->regmap, irq, + IRQF_ONESHOT | IRQF_SHARED | + IRQF_TRIGGER_FALLING, 0, + &pf1550_charger_irq_chip, + &pf1550->irq_data_charger); + if (ret) + return dev_err_probe(pf1550->dev, ret, + "Failed to add %s IRQ chip\n", + pf1550_charger_irq_chip.name); + + domain =3D regmap_irq_get_domain(pf1550->irq_data_charger); + + return devm_mfd_add_devices(pf1550->dev, PLATFORM_DEVID_NONE, charger, + 1, NULL, 0, domain); +} + +static int pf1550_suspend(struct device *dev) +{ + struct pf1550_ddata *pf1550 =3D dev_get_drvdata(dev); + + if (device_may_wakeup(dev)) { + enable_irq_wake(pf1550->irq); + disable_irq(pf1550->irq); + } + + return 0; +} + +static int pf1550_resume(struct device *dev) +{ + struct pf1550_ddata *pf1550 =3D dev_get_drvdata(dev); + + if (device_may_wakeup(dev)) { + disable_irq_wake(pf1550->irq); + enable_irq(pf1550->irq); + } + + return 0; +} +static DEFINE_SIMPLE_DEV_PM_OPS(pf1550_pm, pf1550_suspend, pf1550_resume); + +static const struct i2c_device_id pf1550_i2c_id[] =3D { + { "pf1550" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(i2c, pf1550_i2c_id); + +static const struct of_device_id pf1550_dt_match[] =3D { + { .compatible =3D "nxp,pf1550" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, pf1550_dt_match); + +static struct i2c_driver pf1550_i2c_driver =3D { + .driver =3D { + .name =3D "pf1550", + .pm =3D pm_sleep_ptr(&pf1550_pm), + .of_match_table =3D pf1550_dt_match, + }, + .probe =3D pf1550_i2c_probe, + .id_table =3D pf1550_i2c_id, +}; +module_i2c_driver(pf1550_i2c_driver); + +MODULE_DESCRIPTION("NXP PF1550 core driver"); +MODULE_AUTHOR("Robin Gong "); +MODULE_LICENSE("GPL"); diff --git a/include/linux/mfd/pf1550.h b/include/linux/mfd/pf1550.h new file mode 100644 index 0000000000000000000000000000000000000000..dafadae04a8a50c9b93d7ea36d1= 986271ad7ff0e --- /dev/null +++ b/include/linux/mfd/pf1550.h @@ -0,0 +1,266 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * declarations for the PF1550 PMIC + * + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Robin Gong + * + * Portions Copyright (c) 2025 Savoir-faire Linux Inc. + * Samuel Kayode + */ + +#ifndef __LINUX_MFD_PF1550_H +#define __LINUX_MFD_PF1550_H + +#include +#include + +enum pf1550_pmic_reg { + /* PMIC regulator part */ + PF1550_PMIC_REG_DEVICE_ID =3D 0x00, + PF1550_PMIC_REG_OTP_FLAVOR =3D 0x01, + PF1550_PMIC_REG_SILICON_REV =3D 0x02, + + PF1550_PMIC_REG_INT_CATEGORY =3D 0x06, + PF1550_PMIC_REG_SW_INT_STAT0 =3D 0x08, + PF1550_PMIC_REG_SW_INT_MASK0 =3D 0x09, + PF1550_PMIC_REG_SW_INT_SENSE0 =3D 0x0a, + PF1550_PMIC_REG_SW_INT_STAT1 =3D 0x0b, + PF1550_PMIC_REG_SW_INT_MASK1 =3D 0x0c, + PF1550_PMIC_REG_SW_INT_SENSE1 =3D 0x0d, + PF1550_PMIC_REG_SW_INT_STAT2 =3D 0x0e, + PF1550_PMIC_REG_SW_INT_MASK2 =3D 0x0f, + PF1550_PMIC_REG_SW_INT_SENSE2 =3D 0x10, + PF1550_PMIC_REG_LDO_INT_STAT0 =3D 0x18, + PF1550_PMIC_REG_LDO_INT_MASK0 =3D 0x19, + PF1550_PMIC_REG_LDO_INT_SENSE0 =3D 0x1a, + PF1550_PMIC_REG_TEMP_INT_STAT0 =3D 0x20, + PF1550_PMIC_REG_TEMP_INT_MASK0 =3D 0x21, + PF1550_PMIC_REG_TEMP_INT_SENSE0 =3D 0x22, + PF1550_PMIC_REG_ONKEY_INT_STAT0 =3D 0x24, + PF1550_PMIC_REG_ONKEY_INT_MASK0 =3D 0x25, + PF1550_PMIC_REG_ONKEY_INT_SENSE0 =3D 0x26, + PF1550_PMIC_REG_MISC_INT_STAT0 =3D 0x28, + PF1550_PMIC_REG_MISC_INT_MASK0 =3D 0x29, + PF1550_PMIC_REG_MISC_INT_SENSE0 =3D 0x2a, + + PF1550_PMIC_REG_COINCELL_CONTROL =3D 0x30, + + PF1550_PMIC_REG_SW1_VOLT =3D 0x32, + PF1550_PMIC_REG_SW1_STBY_VOLT =3D 0x33, + PF1550_PMIC_REG_SW1_SLP_VOLT =3D 0x34, + PF1550_PMIC_REG_SW1_CTRL =3D 0x35, + PF1550_PMIC_REG_SW1_CTRL1 =3D 0x36, + PF1550_PMIC_REG_SW2_VOLT =3D 0x38, + PF1550_PMIC_REG_SW2_STBY_VOLT =3D 0x39, + PF1550_PMIC_REG_SW2_SLP_VOLT =3D 0x3a, + PF1550_PMIC_REG_SW2_CTRL =3D 0x3b, + PF1550_PMIC_REG_SW2_CTRL1 =3D 0x3c, + PF1550_PMIC_REG_SW3_VOLT =3D 0x3e, + PF1550_PMIC_REG_SW3_STBY_VOLT =3D 0x3f, + PF1550_PMIC_REG_SW3_SLP_VOLT =3D 0x40, + PF1550_PMIC_REG_SW3_CTRL =3D 0x41, + PF1550_PMIC_REG_SW3_CTRL1 =3D 0x42, + PF1550_PMIC_REG_VSNVS_CTRL =3D 0x48, + PF1550_PMIC_REG_VREFDDR_CTRL =3D 0x4a, + PF1550_PMIC_REG_LDO1_VOLT =3D 0x4c, + PF1550_PMIC_REG_LDO1_CTRL =3D 0x4d, + PF1550_PMIC_REG_LDO2_VOLT =3D 0x4f, + PF1550_PMIC_REG_LDO2_CTRL =3D 0x50, + PF1550_PMIC_REG_LDO3_VOLT =3D 0x52, + PF1550_PMIC_REG_LDO3_CTRL =3D 0x53, + PF1550_PMIC_REG_PWRCTRL0 =3D 0x58, + PF1550_PMIC_REG_PWRCTRL1 =3D 0x59, + PF1550_PMIC_REG_PWRCTRL2 =3D 0x5a, + PF1550_PMIC_REG_PWRCTRL3 =3D 0x5b, + PF1550_PMIC_REG_SW1_PWRDN_SEQ =3D 0x5f, + PF1550_PMIC_REG_SW2_PWRDN_SEQ =3D 0x60, + PF1550_PMIC_REG_SW3_PWRDN_SEQ =3D 0x61, + PF1550_PMIC_REG_LDO1_PWRDN_SEQ =3D 0x62, + PF1550_PMIC_REG_LDO2_PWRDN_SEQ =3D 0x63, + PF1550_PMIC_REG_LDO3_PWRDN_SEQ =3D 0x64, + PF1550_PMIC_REG_VREFDDR_PWRDN_SEQ =3D 0x65, + + PF1550_PMIC_REG_STATE_INFO =3D 0x67, + PF1550_PMIC_REG_I2C_ADDR =3D 0x68, + PF1550_PMIC_REG_IO_DRV0 =3D 0x69, + PF1550_PMIC_REG_IO_DRV1 =3D 0x6a, + PF1550_PMIC_REG_RC_16MHZ =3D 0x6b, + PF1550_PMIC_REG_KEY =3D 0x6f, + + /* Charger part */ + PF1550_CHARG_REG_CHG_INT =3D 0x80, + PF1550_CHARG_REG_CHG_INT_MASK =3D 0x82, + PF1550_CHARG_REG_CHG_INT_OK =3D 0x84, + PF1550_CHARG_REG_VBUS_SNS =3D 0x86, + PF1550_CHARG_REG_CHG_SNS =3D 0x87, + PF1550_CHARG_REG_BATT_SNS =3D 0x88, + PF1550_CHARG_REG_CHG_OPER =3D 0x89, + PF1550_CHARG_REG_CHG_TMR =3D 0x8a, + PF1550_CHARG_REG_CHG_EOC_CNFG =3D 0x8d, + PF1550_CHARG_REG_CHG_CURR_CNFG =3D 0x8e, + PF1550_CHARG_REG_BATT_REG =3D 0x8f, + PF1550_CHARG_REG_BATFET_CNFG =3D 0x91, + PF1550_CHARG_REG_THM_REG_CNFG =3D 0x92, + PF1550_CHARG_REG_VBUS_INLIM_CNFG =3D 0x94, + PF1550_CHARG_REG_VBUS_LIN_DPM =3D 0x95, + PF1550_CHARG_REG_USB_PHY_LDO_CNFG =3D 0x96, + PF1550_CHARG_REG_DBNC_DELAY_TIME =3D 0x98, + PF1550_CHARG_REG_CHG_INT_CNFG =3D 0x99, + PF1550_CHARG_REG_THM_ADJ_SETTING =3D 0x9a, + PF1550_CHARG_REG_VBUS2SYS_CNFG =3D 0x9b, + PF1550_CHARG_REG_LED_PWM =3D 0x9c, + PF1550_CHARG_REG_FAULT_BATFET_CNFG =3D 0x9d, + PF1550_CHARG_REG_LED_CNFG =3D 0x9e, + PF1550_CHARG_REG_CHGR_KEY2 =3D 0x9f, + + PF1550_TEST_REG_FMRADDR =3D 0xc4, + PF1550_TEST_REG_FMRDATA =3D 0xc5, + PF1550_TEST_REG_KEY3 =3D 0xdf, + + PF1550_PMIC_REG_END =3D 0xff, +}; + +/* One-Time Programmable(OTP) memory */ +enum pf1550_otp_reg { + PF1550_OTP_SW2_SW3 =3D 0x1f, +}; + +#define PF1550_DEVICE_ID 0x7c + +/* Keys for reading OTP */ +#define PF1550_OTP_PMIC_KEY 0x15 +#define PF1550_OTP_CHGR_KEY 0x50 +#define PF1550_OTP_TEST_KEY 0xab + +#define PF1550_CHG_TURNON 0x2 + +#define PF1550_CHG_PRECHARGE 0 +#define PF1550_CHG_CONSTANT_CURRENT 1 +#define PF1550_CHG_CONSTANT_VOL 2 +#define PF1550_CHG_EOC 3 +#define PF1550_CHG_DONE 4 +#define PF1550_CHG_TIMER_FAULT 6 +#define PF1550_CHG_SUSPEND 7 +#define PF1550_CHG_OFF_INV 8 +#define PF1550_CHG_BAT_OVER 9 +#define PF1550_CHG_OFF_TEMP 10 +#define PF1550_CHG_LINEAR_ONLY 12 +#define PF1550_CHG_SNS_MASK 0xf +#define PF1550_CHG_INT_MASK 0x51 + +#define PF1550_BAT_NO_VBUS 0 +#define PF1550_BAT_LOW_THAN_PRECHARG 1 +#define PF1550_BAT_CHARG_FAIL 2 +#define PF1550_BAT_HIGH_THAN_PRECHARG 4 +#define PF1550_BAT_OVER_VOL 5 +#define PF1550_BAT_NO_DETECT 6 +#define PF1550_BAT_SNS_MASK 0x7 + +#define PF1550_VBUS_UVLO BIT(2) +#define PF1550_VBUS_IN2SYS BIT(3) +#define PF1550_VBUS_OVLO BIT(4) +#define PF1550_VBUS_VALID BIT(5) + +#define PF1550_CHARG_REG_BATT_REG_CHGCV_MASK 0x3f +#define PF1550_CHARG_REG_BATT_REG_VMINSYS_SHIFT 6 +#define PF1550_CHARG_REG_BATT_REG_VMINSYS_MASK GENMASK(7, 6) +#define PF1550_CHARG_REG_THM_REG_CNFG_REGTEMP_SHIFT 2 +#define PF1550_CHARG_REG_THM_REG_CNFG_REGTEMP_MASK GENMASK(3, 2) + +/* DVS ENABLE MASK */ +#define OTP_DVS_ENB BIT(3) + +/* Top level interrupt masks */ +#define IRQ_REGULATOR (BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(6)) +#define IRQ_ONKEY BIT(5) +#define IRQ_CHG BIT(0) + +/* Regulator interrupt masks */ +#define PMIC_IRQ_SW1_LS BIT(0) +#define PMIC_IRQ_SW2_LS BIT(1) +#define PMIC_IRQ_SW3_LS BIT(2) +#define PMIC_IRQ_SW1_HS BIT(0) +#define PMIC_IRQ_SW2_HS BIT(1) +#define PMIC_IRQ_SW3_HS BIT(2) +#define PMIC_IRQ_LDO1_FAULT BIT(0) +#define PMIC_IRQ_LDO2_FAULT BIT(1) +#define PMIC_IRQ_LDO3_FAULT BIT(2) +#define PMIC_IRQ_TEMP_110 BIT(0) +#define PMIC_IRQ_TEMP_125 BIT(1) + +/* Onkey interrupt masks */ +#define ONKEY_IRQ_PUSHI BIT(0) +#define ONKEY_IRQ_1SI BIT(1) +#define ONKEY_IRQ_2SI BIT(2) +#define ONKEY_IRQ_3SI BIT(3) +#define ONKEY_IRQ_4SI BIT(4) +#define ONKEY_IRQ_8SI BIT(5) + +/* Charger interrupt masks */ +#define CHARG_IRQ_BAT2SOCI BIT(1) +#define CHARG_IRQ_BATI BIT(2) +#define CHARG_IRQ_CHGI BIT(3) +#define CHARG_IRQ_VBUSI BIT(5) +#define CHARG_IRQ_DPMI BIT(6) +#define CHARG_IRQ_THMI BIT(7) + +enum pf1550_irq { + PF1550_IRQ_CHG, + PF1550_IRQ_REGULATOR, + PF1550_IRQ_ONKEY, +}; + +enum pf1550_pmic_irq { + PF1550_PMIC_IRQ_SW1_LS, + PF1550_PMIC_IRQ_SW2_LS, + PF1550_PMIC_IRQ_SW3_LS, + PF1550_PMIC_IRQ_SW1_HS, + PF1550_PMIC_IRQ_SW2_HS, + PF1550_PMIC_IRQ_SW3_HS, + PF1550_PMIC_IRQ_LDO1_FAULT, + PF1550_PMIC_IRQ_LDO2_FAULT, + PF1550_PMIC_IRQ_LDO3_FAULT, + PF1550_PMIC_IRQ_TEMP_110, + PF1550_PMIC_IRQ_TEMP_125, +}; + +enum pf1550_onkey_irq { + PF1550_ONKEY_IRQ_PUSHI, + PF1550_ONKEY_IRQ_1SI, + PF1550_ONKEY_IRQ_2SI, + PF1550_ONKEY_IRQ_3SI, + PF1550_ONKEY_IRQ_4SI, + PF1550_ONKEY_IRQ_8SI, +}; + +enum pf1550_charg_irq { + PF1550_CHARG_IRQ_BAT2SOCI, + PF1550_CHARG_IRQ_BATI, + PF1550_CHARG_IRQ_CHGI, + PF1550_CHARG_IRQ_VBUSI, + PF1550_CHARG_IRQ_THMI, +}; + +enum pf1550_regulators { + PF1550_SW1, + PF1550_SW2, + PF1550_SW3, + PF1550_VREFDDR, + PF1550_LDO1, + PF1550_LDO2, + PF1550_LDO3, +}; + +struct pf1550_ddata { + bool dvs_enb; + struct device *dev; + struct regmap *regmap; + struct regmap_irq_chip_data *irq_data_regulator; + struct regmap_irq_chip_data *irq_data_onkey; + struct regmap_irq_chip_data *irq_data_charger; + struct regmap_irq_chip_data *irq_data; + int irq; +}; + +#endif /* __LINUX_MFD_PF1550_H */ --=20 2.49.0 From nobody Tue Oct 7 18:25:18 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0C41A28853C; Mon, 7 Jul 2025 21:37:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751924247; cv=none; b=E/W/eJUFvJxWKeR/bSJQXkSQqOCGXe4sGDHIjkdVrz310YeQApfptP0vC2DqWLall6WN2xn5t59HRu+i7746QOJ2m1YDXn4oZfm8JIrVYF4TNGV/vbwKCMsdUqf+oZrqXa3t3lLYHrJHpRaGOhox8U3S3yk2cxoz/RGzIP98J/I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751924247; c=relaxed/simple; bh=MhrxqOpR8ICThO4cAErIdy0sqnDRd8Q65fl0mYzDMBU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; 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Mon, 7 Jul 2025 21:37:26 +0000 (UTC) From: Samuel Kayode via B4 Relay Date: Mon, 07 Jul 2025 17:37:22 -0400 Subject: [PATCH v8 3/6] regulator: pf1550: add support for regulator Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250707-pf1550-v8-3-6b6eb67c03a0@savoirfairelinux.com> References: <20250707-pf1550-v8-0-6b6eb67c03a0@savoirfairelinux.com> In-Reply-To: <20250707-pf1550-v8-0-6b6eb67c03a0@savoirfairelinux.com> To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Liam Girdwood , Mark Brown , Dmitry Torokhov , Sebastian Reichel , Frank Li Cc: imx@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-input@vger.kernel.org, linux-pm@vger.kernel.org, Abel Vesa , Abel Vesa , Robin Gong , Robin Gong , Enric Balletbo i Serra , Samuel Kayode , Abel Vesa , Frank Li X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1751924244; l=14462; i=samuel.kayode@savoirfairelinux.com; s=20250527; h=from:subject:message-id; bh=r5YvuDh+2Rj+YjW9zvL3SNvO6MXbcwHkFloUkZqm9Rs=; b=BhNnuqQmDJQMDXCm0ad+Q7s9AEdL4w2h9oNnlvVSydCs0BpTqzLD7y16GtChXIqWt2oWA3RSB /U/hWe23aHRBdLfrf1UWQet7f33IthIP6F+akbrmLAiG8/nap4esI6w X-Developer-Key: i=samuel.kayode@savoirfairelinux.com; a=ed25519; pk=TPSQGQ5kywnnPyGs0EQqLajLFbdDu17ahXz8/gxMfio= X-Endpoint-Received: by B4 Relay for samuel.kayode@savoirfairelinux.com/20250527 with auth_id=412 X-Original-From: Samuel Kayode Reply-To: samuel.kayode@savoirfairelinux.com From: Samuel Kayode Add regulator support for the pf1550 PMIC. Reviewed-by: Frank Li Reviewed-by: Mark Brown Signed-off-by: Samuel Kayode --- v7: - Use reverese christmas tree style - Drop unecessary 0 in id table's driver data v6: - Use dvs_enb variable in pf1550_dev as suggested by Frank Li v5: - Address Mark's feedback: - Add comments to clarify difference in interrupts - Issue warn event for _LS(low side) interrupt - Validate maximum ramp_delay v4: - Address Mark's feedback: - Use C++ comments for SPDX license - Add portions copyright to reflect my update - Validate ramp_delay - Report overcurrent and temperature events - Use platform_get_irq v3: - Drop duplicate include - Drop unnecessary includes - Accept lower case regulator names from devicetree - Use virqs mapped in core MFD driver v2: - Add driver for regulator --- drivers/regulator/Kconfig | 9 + drivers/regulator/Makefile | 1 + drivers/regulator/pf1550-regulator.c | 360 +++++++++++++++++++++++++++++++= ++++ 3 files changed, 370 insertions(+) diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index 6d8988387da4599633ca9bde2698b9711e34a245..de455887f9aeeada5546e44b8dc= 9d7ed041618a6 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -1049,6 +1049,15 @@ config REGULATOR_PV88090 Say y here to support the voltage regulators and convertors on PV88090 =20 +config REGULATOR_PF1550 + tristate "NXP PF1550 regulator" + depends on MFD_PF1550 + help + Say y here to select this option to enable the regulators on + the PF1550 PMICs. + This driver controls the PF1550 regulators via I2C bus. + The regulators include three bucks and three ldos. + config REGULATOR_PWM tristate "PWM voltage regulator" depends on PWM diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile index c0bc7a0f4e67098c50ac3cf887ae95f46b2eac44..891174b511fc0653bac662c7165= 9498122e8441f 100644 --- a/drivers/regulator/Makefile +++ b/drivers/regulator/Makefile @@ -125,6 +125,7 @@ obj-$(CONFIG_REGULATOR_QCOM_USB_VBUS) +=3D qcom_usb_vbu= s-regulator.o obj-$(CONFIG_REGULATOR_PALMAS) +=3D palmas-regulator.o obj-$(CONFIG_REGULATOR_PCA9450) +=3D pca9450-regulator.o obj-$(CONFIG_REGULATOR_PF9453) +=3D pf9453-regulator.o +obj-$(CONFIG_REGULATOR_PF1550) +=3D pf1550-regulator.o obj-$(CONFIG_REGULATOR_PF8X00) +=3D pf8x00-regulator.o obj-$(CONFIG_REGULATOR_PFUZE100) +=3D pfuze100-regulator.o obj-$(CONFIG_REGULATOR_PV88060) +=3D pv88060-regulator.o diff --git a/drivers/regulator/pf1550-regulator.c b/drivers/regulator/pf155= 0-regulator.c new file mode 100644 index 0000000000000000000000000000000000000000..fa8c4b17270e750e64fef910747= 27951511d14f3 --- /dev/null +++ b/drivers/regulator/pf1550-regulator.c @@ -0,0 +1,360 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// regulator driver for the PF1550 +// +// Copyright (C) 2016 Freescale Semiconductor, Inc. +// Robin Gong +// +// Portions Copyright (c) 2025 Savoir-faire Linux Inc. +// Samuel Kayode +// + +#include +#include +#include +#include +#include +#include +#include + +#define PF1550_REGULATOR_IRQ_NR 11 +#define PF1550_MAX_REGULATOR 7 + +struct pf1550_desc { + struct regulator_desc desc; + unsigned char stby_reg; + unsigned char stby_mask; +}; + +struct pf1550_regulator_info { + struct device *dev; + const struct pf1550_ddata *pf1550; + struct pf1550_desc regulator_descs[PF1550_MAX_REGULATOR]; + struct regulator_dev *rdevs[PF1550_MAX_REGULATOR]; +}; + +static const int pf1550_sw12_volts[] =3D { + 1100000, 1200000, 1350000, 1500000, 1800000, 2500000, 3000000, 3300000, +}; + +static const int pf1550_ldo13_volts[] =3D { + 750000, 800000, 850000, 900000, 950000, 1000000, 1050000, 1100000, + 1150000, 1200000, 1250000, 1300000, 1350000, 1400000, 1450000, 1500000, + 1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000, + 2600000, 2700000, 2800000, 2900000, 3000000, 3100000, 3200000, 3300000, +}; + +static int pf1550_set_ramp_delay(struct regulator_dev *rdev, int ramp_dela= y) +{ + int id =3D rdev_get_id(rdev); + unsigned int ramp_bits =3D 0; + int ret; + + if (id > PF1550_VREFDDR) + return -EACCES; + + if (ramp_delay < 0 || ramp_delay > 6250) + return -EINVAL; + + ramp_delay =3D 6250 / ramp_delay; + ramp_bits =3D ramp_delay >> 1; + + ret =3D regmap_update_bits(rdev->regmap, rdev->desc->vsel_reg + 4, 0x10, + ramp_bits << 4); + if (ret < 0) + dev_err(&rdev->dev, "ramp failed, err %d\n", ret); + + return ret; +} + +static const struct regulator_ops pf1550_sw1_ops =3D { + .list_voltage =3D regulator_list_voltage_table, + .set_voltage_sel =3D regulator_set_voltage_sel_regmap, + .get_voltage_sel =3D regulator_get_voltage_sel_regmap, + .set_voltage_time_sel =3D regulator_set_voltage_time_sel, + .set_ramp_delay =3D pf1550_set_ramp_delay, +}; + +static const struct regulator_ops pf1550_sw2_ops =3D { + .list_voltage =3D regulator_list_voltage_linear, + .set_voltage_sel =3D regulator_set_voltage_sel_regmap, + .get_voltage_sel =3D regulator_get_voltage_sel_regmap, + .set_voltage_time_sel =3D regulator_set_voltage_time_sel, + .set_ramp_delay =3D pf1550_set_ramp_delay, +}; + +static const struct regulator_ops pf1550_ldo1_ops =3D { + .enable =3D regulator_enable_regmap, + .disable =3D regulator_disable_regmap, + .is_enabled =3D regulator_is_enabled_regmap, + .list_voltage =3D regulator_list_voltage_table, + .map_voltage =3D regulator_map_voltage_ascend, + .set_voltage_sel =3D regulator_set_voltage_sel_regmap, + .get_voltage_sel =3D regulator_get_voltage_sel_regmap, +}; + +static const struct regulator_ops pf1550_ldo2_ops =3D { + .enable =3D regulator_enable_regmap, + .disable =3D regulator_disable_regmap, + .is_enabled =3D regulator_is_enabled_regmap, + .list_voltage =3D regulator_list_voltage_linear, + .set_voltage_sel =3D regulator_set_voltage_sel_regmap, + .get_voltage_sel =3D regulator_get_voltage_sel_regmap, +}; + +static const struct regulator_ops pf1550_fixed_ops =3D { + .enable =3D regulator_enable_regmap, + .disable =3D regulator_disable_regmap, + .is_enabled =3D regulator_is_enabled_regmap, + .list_voltage =3D regulator_list_voltage_linear, +}; + +#define PF_VREF(_chip, match, _name, voltage) { \ + .desc =3D { \ + .name =3D #_name, \ + .of_match =3D of_match_ptr(match), \ + .regulators_node =3D of_match_ptr("regulators"), \ + .n_voltages =3D 1, \ + .ops =3D &pf1550_fixed_ops, \ + .type =3D REGULATOR_VOLTAGE, \ + .id =3D _chip ## _ ## _name, \ + .owner =3D THIS_MODULE, \ + .min_uV =3D (voltage), \ + .enable_reg =3D _chip ## _PMIC_REG_ ## _name ## _CTRL, \ + .enable_mask =3D 0x1, \ + }, \ + .stby_reg =3D _chip ## _PMIC_REG_ ## _name ## _CTRL, \ + .stby_mask =3D 0x2, \ +} + +#define PF_SW1(_chip, match, _name, mask, voltages) { \ + .desc =3D { \ + .name =3D #_name, \ + .of_match =3D of_match_ptr(match), \ + .regulators_node =3D of_match_ptr("regulators"), \ + .n_voltages =3D ARRAY_SIZE(voltages), \ + .ops =3D &pf1550_sw1_ops, \ + .type =3D REGULATOR_VOLTAGE, \ + .id =3D _chip ## _ ## _name, \ + .owner =3D THIS_MODULE, \ + .volt_table =3D voltages, \ + .vsel_reg =3D _chip ## _PMIC_REG_ ## _name ## _VOLT, \ + .vsel_mask =3D (mask), \ + }, \ + .stby_reg =3D _chip ## _PMIC_REG_ ## _name ## _STBY_VOLT, \ + .stby_mask =3D (mask), \ +} + +#define PF_SW3(_chip, match, _name, min, max, mask, step) { \ + .desc =3D { \ + .name =3D #_name, \ + .of_match =3D of_match_ptr(match), \ + .regulators_node =3D of_match_ptr("regulators"), \ + .n_voltages =3D ((max) - (min)) / (step) + 1, \ + .ops =3D &pf1550_sw2_ops, \ + .type =3D REGULATOR_VOLTAGE, \ + .id =3D _chip ## _ ## _name, \ + .owner =3D THIS_MODULE, \ + .min_uV =3D (min), \ + .uV_step =3D (step), \ + .vsel_reg =3D _chip ## _PMIC_REG_ ## _name ## _VOLT, \ + .vsel_mask =3D (mask), \ + }, \ + .stby_reg =3D _chip ## _PMIC_REG_ ## _name ## _STBY_VOLT, \ + .stby_mask =3D (mask), \ +} + +#define PF_LDO1(_chip, match, _name, mask, voltages) { \ + .desc =3D { \ + .name =3D #_name, \ + .of_match =3D of_match_ptr(match), \ + .regulators_node =3D of_match_ptr("regulators"), \ + .n_voltages =3D ARRAY_SIZE(voltages), \ + .ops =3D &pf1550_ldo1_ops, \ + .type =3D REGULATOR_VOLTAGE, \ + .id =3D _chip ## _ ## _name, \ + .owner =3D THIS_MODULE, \ + .volt_table =3D voltages, \ + .vsel_reg =3D _chip ## _PMIC_REG_ ## _name ## _VOLT, \ + .vsel_mask =3D (mask), \ + .enable_reg =3D _chip ## _PMIC_REG_ ## _name ## _CTRL, \ + .enable_mask =3D 0x1, \ + }, \ + .stby_reg =3D _chip ## _PMIC_REG_ ## _name ## _CTRL, \ + .stby_mask =3D 0x2, \ +} + +#define PF_LDO2(_chip, match, _name, mask, min, max, step) { \ + .desc =3D { \ + .name =3D #_name, \ + .of_match =3D of_match_ptr(match), \ + .regulators_node =3D of_match_ptr("regulators"), \ + .n_voltages =3D ((max) - (min)) / (step) + 1, \ + .ops =3D &pf1550_ldo2_ops, \ + .type =3D REGULATOR_VOLTAGE, \ + .id =3D _chip ## _ ## _name, \ + .owner =3D THIS_MODULE, \ + .min_uV =3D (min), \ + .uV_step =3D (step), \ + .vsel_reg =3D _chip ## _PMIC_REG_ ## _name ## _VOLT, \ + .vsel_mask =3D (mask), \ + .enable_reg =3D _chip ## _PMIC_REG_ ## _name ## _CTRL, \ + .enable_mask =3D 0x1, \ + }, \ + .stby_reg =3D _chip ## _PMIC_REG_ ## _name ## _CTRL, \ + .stby_mask =3D 0x2, \ +} + +static struct pf1550_desc pf1550_regulators[] =3D { + PF_SW3(PF1550, "sw1", SW1, 600000, 1387500, 0x3f, 12500), + PF_SW3(PF1550, "sw2", SW2, 600000, 1387500, 0x3f, 12500), + PF_SW3(PF1550, "sw3", SW3, 1800000, 3300000, 0xf, 100000), + PF_VREF(PF1550, "vrefddr", VREFDDR, 1200000), + PF_LDO1(PF1550, "ldo1", LDO1, 0x1f, pf1550_ldo13_volts), + PF_LDO2(PF1550, "ldo2", LDO2, 0xf, 1800000, 3300000, 100000), + PF_LDO1(PF1550, "ldo3", LDO3, 0x1f, pf1550_ldo13_volts), +}; + +static irqreturn_t pf1550_regulator_irq_handler(int irq, void *data) +{ + struct pf1550_regulator_info *info =3D data; + struct device *dev =3D info->dev; + struct platform_device *pdev =3D to_platform_device(dev); + int i, irq_type =3D -1; + unsigned int event; + + for (i =3D 0; i < PF1550_REGULATOR_IRQ_NR; i++) + if (irq =3D=3D platform_get_irq(pdev, i)) + irq_type =3D i; + + switch (irq_type) { + /* The _LS interrupts indicate over-current event. The _HS interrupts + * which are more accurate and can detect catastrophic faults, issue + * an error event. The current limit FAULT interrupt is similar to the + * _HS' + */ + case PF1550_PMIC_IRQ_SW1_LS: + case PF1550_PMIC_IRQ_SW2_LS: + case PF1550_PMIC_IRQ_SW3_LS: + event =3D REGULATOR_EVENT_OVER_CURRENT_WARN; + for (i =3D 0; i < PF1550_MAX_REGULATOR; i++) + if (!strcmp(rdev_get_name(info->rdevs[i]), "SW3")) + regulator_notifier_call_chain(info->rdevs[i], + event, NULL); + break; + case PF1550_PMIC_IRQ_SW1_HS: + case PF1550_PMIC_IRQ_SW2_HS: + case PF1550_PMIC_IRQ_SW3_HS: + event =3D REGULATOR_EVENT_OVER_CURRENT; + for (i =3D 0; i < PF1550_MAX_REGULATOR; i++) + if (!strcmp(rdev_get_name(info->rdevs[i]), "SW3")) + regulator_notifier_call_chain(info->rdevs[i], + event, NULL); + break; + case PF1550_PMIC_IRQ_LDO1_FAULT: + case PF1550_PMIC_IRQ_LDO2_FAULT: + case PF1550_PMIC_IRQ_LDO3_FAULT: + event =3D REGULATOR_EVENT_OVER_CURRENT; + for (i =3D 0; i < PF1550_MAX_REGULATOR; i++) + if (!strcmp(rdev_get_name(info->rdevs[i]), "LDO3")) + regulator_notifier_call_chain(info->rdevs[i], + event, NULL); + break; + case PF1550_PMIC_IRQ_TEMP_110: + case PF1550_PMIC_IRQ_TEMP_125: + event =3D REGULATOR_EVENT_OVER_TEMP; + for (i =3D 0; i < PF1550_MAX_REGULATOR; i++) + regulator_notifier_call_chain(info->rdevs[i], + event, NULL); + break; + default: + dev_err(dev, "regulator interrupt: irq %d occurred\n", + irq_type); + } + + return IRQ_HANDLED; +} + +static int pf1550_regulator_probe(struct platform_device *pdev) +{ + const struct pf1550_ddata *pf1550 =3D dev_get_drvdata(pdev->dev.parent); + struct regulator_config config =3D { }; + struct pf1550_regulator_info *info; + int i, irq =3D -1, ret =3D 0; + + info =3D devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); + if (!info) + return -ENOMEM; + + config.regmap =3D dev_get_regmap(pf1550->dev, NULL); + if (!config.regmap) + return dev_err_probe(&pdev->dev, -ENODEV, + "failed to get parent regmap\n"); + + config.dev =3D pf1550->dev; + config.regmap =3D pf1550->regmap; + info->dev =3D &pdev->dev; + info->pf1550 =3D pf1550; + + memcpy(info->regulator_descs, pf1550_regulators, + sizeof(info->regulator_descs)); + + for (i =3D 0; i < ARRAY_SIZE(pf1550_regulators); i++) { + struct regulator_desc *desc; + + desc =3D &info->regulator_descs[i].desc; + + if (desc->id =3D=3D PF1550_SW2 && pf1550->dvs_enb) { + /* OTP_SW2_DVS_ENB =3D=3D 1? */ + desc->volt_table =3D pf1550_sw12_volts; + desc->n_voltages =3D ARRAY_SIZE(pf1550_sw12_volts); + desc->ops =3D &pf1550_sw1_ops; + } + + info->rdevs[i] =3D devm_regulator_register(&pdev->dev, desc, + &config); + if (IS_ERR(info->rdevs[i])) + return dev_err_probe(&pdev->dev, + PTR_ERR(info->rdevs[i]), + "failed to initialize regulator-%d\n", + i); + } + + platform_set_drvdata(pdev, info); + + for (i =3D 0; i < PF1550_REGULATOR_IRQ_NR; i++) { + irq =3D platform_get_irq(pdev, i); + if (irq < 0) + return irq; + + ret =3D devm_request_threaded_irq(&pdev->dev, irq, NULL, + pf1550_regulator_irq_handler, + IRQF_NO_SUSPEND, + "pf1550-regulator", info); + if (ret) + return dev_err_probe(&pdev->dev, ret, + "failed: irq request (IRQ: %d)\n", + i); + } + + return 0; +} + +static const struct platform_device_id pf1550_regulator_id[] =3D { + { "pf1550-regulator", }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(platform, pf1550_regulator_id); + +static struct platform_driver pf1550_regulator_driver =3D { + .driver =3D { + .name =3D "pf1550-regulator", + }, + .probe =3D pf1550_regulator_probe, + .id_table =3D pf1550_regulator_id, +}; +module_platform_driver(pf1550_regulator_driver); + +MODULE_DESCRIPTION("NXP PF1550 regulator driver"); +MODULE_AUTHOR("Robin Gong "); +MODULE_LICENSE("GPL"); --=20 2.49.0 From nobody Tue Oct 7 18:25:18 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3683A28980E; Mon, 7 Jul 2025 21:37:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751924247; cv=none; b=oZLXMYV66ThdMoZiTbEPWM55YBy6pS1LM1FR/f43Dw20HLGOS0Rg25dm4Jl2TTbsFnaHuxWQnyNF1BU8fhQJbh8mARVT4Sgy1hlG+/3jlF/0ofw3FEIbFdHjniAJ/ERFO+ag2KNkw/b4EXn6ABTj9BM+HmA72PtaTxyJzxBYY9k= ARC-Message-Signature: i=1; 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b=jOky/1E3qVCb2aeniflVyGT3bBfUPpi2ExaEO8ffVhjVfrU/K4c17Kj2VkeYHJfLI 2PBEE7pvOuOW2XSOkO0gZLyBnprtfZuicLevoUSIvAm0Ucu2tN8OSafMY9zTfGcOFS epBTn+JJxFJ4EBvMNopfYZyx47Iesvhw5AyXEoWSQP4/U4tRfSCWwtzAxpARf6ArGL hKJRWbiIlRpBcUBwBWpjZDOhOekzWwDXF7TUjUt9jemqD+Co86/xmas3GNeWQZEL+k LWUGRH01ThqmYuiJ1WE3pG7c7dyAmyijTF2HU4A6ns8fmJey6nEkthxYtdrIM2SbOw NOV7hN1Mn3YvA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7DE4FC8303C; Mon, 7 Jul 2025 21:37:26 +0000 (UTC) From: Samuel Kayode via B4 Relay Date: Mon, 07 Jul 2025 17:37:23 -0400 Subject: [PATCH v8 4/6] input: pf1550: add onkey support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250707-pf1550-v8-4-6b6eb67c03a0@savoirfairelinux.com> References: <20250707-pf1550-v8-0-6b6eb67c03a0@savoirfairelinux.com> In-Reply-To: <20250707-pf1550-v8-0-6b6eb67c03a0@savoirfairelinux.com> To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Liam Girdwood , Mark Brown , Dmitry Torokhov , Sebastian Reichel , Frank Li Cc: imx@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-input@vger.kernel.org, linux-pm@vger.kernel.org, Abel Vesa , Abel Vesa , Robin Gong , Robin Gong , Enric Balletbo i Serra , Samuel Kayode , Abel Vesa , Frank Li X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1751924244; l=8350; i=samuel.kayode@savoirfairelinux.com; s=20250527; h=from:subject:message-id; bh=wzG1heI+J7Kwk9+5Abo1Xg5LWxdNqy6PsbH1ITXEmJk=; b=ijNWJZINJUJO5QjfmX93+KUdqABxjSo/1qb7Eg50taBPjP10bjK0hXcSuwXh8Se6WBTT6EuK+ os8F+mDit5wDcmoYIcMsFfELQPW8smB6xqr2sBsd6/kvIpMaSWK6U/l X-Developer-Key: i=samuel.kayode@savoirfairelinux.com; a=ed25519; pk=TPSQGQ5kywnnPyGs0EQqLajLFbdDu17ahXz8/gxMfio= X-Endpoint-Received: by B4 Relay for samuel.kayode@savoirfairelinux.com/20250527 with auth_id=412 X-Original-From: Samuel Kayode Reply-To: samuel.kayode@savoirfairelinux.com From: Samuel Kayode Add support for the onkey of the pf1550 PMIC. Acked-by: Dmitry Torokhov Reviewed-by: Frank Li Signed-off-by: Samuel Kayode --- v8: - Pick up `Acked-by` tag from Dmitry - Use C++ for SPDX license header comment and C type for rest of license comment v7: - Use reverese christmas tree style - Drop unecessary 0 in id table's driver data v4: - Address Dmitry's feedback - Drop irq variable in onkey_drv_data - Drop keycode variable in onkey_drv_data - Define wakeup as type bool - Use platform_get_irq - Use type const for struct pf1550_dev in onkey_drv_data - Replace (error < 0) with (error) in if statement when applicable - No need to define driver_data in table id - Define driver.pm with pm_sleep_ptr v3: - Address Dmitry's feedback - Drop compatible string - Remove dependency on OF - Use generic device properties - Drop unnecessary includes - Drop unnecessary initializations in probe - Always use the KEY_POWER property for onkey->keycode - Do mapping of irqs in MFD driver - Define onkey->input before interrupts are active - Drop unnecessary input_free_device since devm - Manage onkey irqs instead of the main interrupt line. - Fix integer overflow when unmasking onkey irqs in onkey_resume. v2: - Add driver for onkey --- drivers/input/misc/Kconfig | 11 +++ drivers/input/misc/Makefile | 1 + drivers/input/misc/pf1550-onkey.c | 183 ++++++++++++++++++++++++++++++++++= ++++ 3 files changed, 195 insertions(+) diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig index f5496ca0c0d2bfcb7968503ccd1844ff43bbc1c0..47b3c43ff0550f14d6199099797= 6366436411adc 100644 --- a/drivers/input/misc/Kconfig +++ b/drivers/input/misc/Kconfig @@ -179,6 +179,17 @@ config INPUT_PCSPKR To compile this driver as a module, choose M here: the module will be called pcspkr. =20 +config INPUT_PF1550_ONKEY + tristate "NXP PF1550 Onkey support" + depends on MFD_PF1550 + help + Say Y here if you want support for PF1550 PMIC. Onkey can trigger + release and 1s(push hold), 2s, 3s, 4s, 8s interrupt for long press + detect. + + To compile this driver as a module, choose M here. The module will be + called pf1550-onkey. + config INPUT_PM8941_PWRKEY tristate "Qualcomm PM8941 power key support" depends on MFD_SPMI_PMIC diff --git a/drivers/input/misc/Makefile b/drivers/input/misc/Makefile index 6d91804d0a6f761a094e6c380f878f74c3054d63..c652337de464c1eeaf1515d0bc8= 4d10de0cb3a74 100644 --- a/drivers/input/misc/Makefile +++ b/drivers/input/misc/Makefile @@ -62,6 +62,7 @@ obj-$(CONFIG_INPUT_PCAP) +=3D pcap_keys.o obj-$(CONFIG_INPUT_PCF50633_PMU) +=3D pcf50633-input.o obj-$(CONFIG_INPUT_PCF8574) +=3D pcf8574_keypad.o obj-$(CONFIG_INPUT_PCSPKR) +=3D pcspkr.o +obj-$(CONFIG_INPUT_PF1550_ONKEY) +=3D pf1550-onkey.o obj-$(CONFIG_INPUT_PM8941_PWRKEY) +=3D pm8941-pwrkey.o obj-$(CONFIG_INPUT_PM8XXX_VIBRATOR) +=3D pm8xxx-vibrator.o obj-$(CONFIG_INPUT_PMIC8XXX_PWRKEY) +=3D pmic8xxx-pwrkey.o diff --git a/drivers/input/misc/pf1550-onkey.c b/drivers/input/misc/pf1550-= onkey.c new file mode 100644 index 0000000000000000000000000000000000000000..eb9878b90268bddbf6802454a03= 0a74e017ca1e3 --- /dev/null +++ b/drivers/input/misc/pf1550-onkey.c @@ -0,0 +1,183 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Driver for the PF1550 ONKEY + * Copyright (C) 2016 Freescale Semiconductor, Inc. All Rights Reserved. + * + * Portions Copyright (c) 2025 Savoir-faire Linux Inc. + * Samuel Kayode + */ + +#include +#include +#include +#include +#include +#include +#include + +#define PF1550_ONKEY_IRQ_NR 6 + +struct onkey_drv_data { + struct device *dev; + const struct pf1550_ddata *pf1550; + bool wakeup; + struct input_dev *input; +}; + +static irqreturn_t pf1550_onkey_irq_handler(int irq, void *data) +{ + struct onkey_drv_data *onkey =3D data; + struct platform_device *pdev =3D to_platform_device(onkey->dev); + int i, state, irq_type =3D -1; + + for (i =3D 0; i < PF1550_ONKEY_IRQ_NR; i++) + if (irq =3D=3D platform_get_irq(pdev, i)) + irq_type =3D i; + + switch (irq_type) { + case PF1550_ONKEY_IRQ_PUSHI: + state =3D 0; + break; + case PF1550_ONKEY_IRQ_1SI: + case PF1550_ONKEY_IRQ_2SI: + case PF1550_ONKEY_IRQ_3SI: + case PF1550_ONKEY_IRQ_4SI: + case PF1550_ONKEY_IRQ_8SI: + state =3D 1; + break; + default: + dev_err(onkey->dev, "onkey interrupt: irq %d occurred\n", + irq_type); + return IRQ_HANDLED; + } + + input_event(onkey->input, EV_KEY, KEY_POWER, state); + input_sync(onkey->input); + + return IRQ_HANDLED; +} + +static int pf1550_onkey_probe(struct platform_device *pdev) +{ + struct onkey_drv_data *onkey; + struct input_dev *input; + int i, irq, error; + + onkey =3D devm_kzalloc(&pdev->dev, sizeof(*onkey), GFP_KERNEL); + if (!onkey) + return -ENOMEM; + + onkey->dev =3D &pdev->dev; + + onkey->pf1550 =3D dev_get_drvdata(pdev->dev.parent); + if (!onkey->pf1550->regmap) + return dev_err_probe(&pdev->dev, -ENODEV, + "failed to get regmap\n"); + + onkey->wakeup =3D device_property_read_bool(pdev->dev.parent, + "wakeup-source"); + + input =3D devm_input_allocate_device(&pdev->dev); + if (!input) + return dev_err_probe(&pdev->dev, -ENOMEM, + "failed to allocate the input device\n"); + + input->name =3D pdev->name; + input->phys =3D "pf1550-onkey/input0"; + input->id.bustype =3D BUS_HOST; + + input_set_capability(input, EV_KEY, KEY_POWER); + + onkey->input =3D input; + platform_set_drvdata(pdev, onkey); + + for (i =3D 0; i < PF1550_ONKEY_IRQ_NR; i++) { + irq =3D platform_get_irq(pdev, i); + if (irq < 0) + return irq; + + error =3D devm_request_threaded_irq(&pdev->dev, irq, NULL, + pf1550_onkey_irq_handler, + IRQF_NO_SUSPEND, + "pf1550-onkey", onkey); + if (error) + return dev_err_probe(&pdev->dev, error, + "failed: irq request (IRQ: %d)\n", + i); + } + + error =3D input_register_device(input); + if (error) + return dev_err_probe(&pdev->dev, error, + "failed to register input device\n"); + + device_init_wakeup(&pdev->dev, onkey->wakeup); + + return 0; +} + +static int pf1550_onkey_suspend(struct device *dev) +{ + struct platform_device *pdev =3D to_platform_device(dev); + struct onkey_drv_data *onkey =3D platform_get_drvdata(pdev); + int i, irq; + + if (!device_may_wakeup(&pdev->dev)) + regmap_write(onkey->pf1550->regmap, + PF1550_PMIC_REG_ONKEY_INT_MASK0, + ONKEY_IRQ_PUSHI | ONKEY_IRQ_1SI | ONKEY_IRQ_2SI | + ONKEY_IRQ_3SI | ONKEY_IRQ_4SI | ONKEY_IRQ_8SI); + else + for (i =3D 0; i < PF1550_ONKEY_IRQ_NR; i++) { + irq =3D platform_get_irq(pdev, i); + if (irq > 0) + enable_irq_wake(irq); + } + + return 0; +} + +static int pf1550_onkey_resume(struct device *dev) +{ + struct platform_device *pdev =3D to_platform_device(dev); + struct onkey_drv_data *onkey =3D platform_get_drvdata(pdev); + int i, irq; + + if (!device_may_wakeup(&pdev->dev)) + regmap_write(onkey->pf1550->regmap, + PF1550_PMIC_REG_ONKEY_INT_MASK0, + ~((u8)(ONKEY_IRQ_PUSHI | ONKEY_IRQ_1SI | + ONKEY_IRQ_2SI | ONKEY_IRQ_3SI | ONKEY_IRQ_4SI | + ONKEY_IRQ_8SI))); + else + for (i =3D 0; i < PF1550_ONKEY_IRQ_NR; i++) { + irq =3D platform_get_irq(pdev, i); + if (irq > 0) + disable_irq_wake(irq); + } + + return 0; +} + +static SIMPLE_DEV_PM_OPS(pf1550_onkey_pm_ops, pf1550_onkey_suspend, + pf1550_onkey_resume); + +static const struct platform_device_id pf1550_onkey_id[] =3D { + { "pf1550-onkey", }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(platform, pf1550_onkey_id); + +static struct platform_driver pf1550_onkey_driver =3D { + .driver =3D { + .name =3D "pf1550-onkey", + .pm =3D pm_sleep_ptr(&pf1550_onkey_pm_ops), + }, + .probe =3D pf1550_onkey_probe, + .id_table =3D pf1550_onkey_id, +}; +module_platform_driver(pf1550_onkey_driver); + +MODULE_AUTHOR("Freescale Semiconductor"); +MODULE_DESCRIPTION("PF1550 onkey Driver"); +MODULE_LICENSE("GPL"); --=20 2.49.0 From nobody Tue Oct 7 18:25:18 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4015C289E2C; Mon, 7 Jul 2025 21:37:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751924247; cv=none; b=E57LScqxdHByG+HCOHm+CfZlrcQWASWIOOtPfoodgXbMoM9oISFw00sSivcs9bFj9y7thR7+XaN5IGeW6wdKWD14i27xwuFsFf3Wyh7PY4AJ4IWOW5m6qXFtGLZEkkQxURqrlV+bD8NJrBBfdJvEkPwA6VyqNy6wp0D26gcDESw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751924247; c=relaxed/simple; bh=p8AYys+szvAjkfgSFbEADoYCmg2FCOnAAeN6GxIn5Ow=; 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Mon, 7 Jul 2025 21:37:26 +0000 (UTC) From: Samuel Kayode via B4 Relay Date: Mon, 07 Jul 2025 17:37:24 -0400 Subject: [PATCH v8 5/6] power: supply: pf1550: add battery charger support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250707-pf1550-v8-5-6b6eb67c03a0@savoirfairelinux.com> References: <20250707-pf1550-v8-0-6b6eb67c03a0@savoirfairelinux.com> In-Reply-To: <20250707-pf1550-v8-0-6b6eb67c03a0@savoirfairelinux.com> To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Liam Girdwood , Mark Brown , Dmitry Torokhov , Sebastian Reichel , Frank Li Cc: imx@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-input@vger.kernel.org, linux-pm@vger.kernel.org, Abel Vesa , Abel Vesa , Robin Gong , Robin Gong , Enric Balletbo i Serra , Samuel Kayode , Abel Vesa X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1751924244; l=20460; i=samuel.kayode@savoirfairelinux.com; s=20250527; h=from:subject:message-id; bh=ACW+5KnfhlmrSI4B409KueUxyqy1x0dKXhDEdTdeaOo=; b=sA5ekhuFVV75XZii00PtLf75c2G7v45hfH7ilLuC+S24R07jCNEaOvX/54pnYJTHzDekXs1Z3 GmGw/x23P/qC945yZ+vrxoZ0fx/pSr4O8qN0g/VbHjCdqDe93+7r+3j X-Developer-Key: i=samuel.kayode@savoirfairelinux.com; a=ed25519; pk=TPSQGQ5kywnnPyGs0EQqLajLFbdDu17ahXz8/gxMfio= X-Endpoint-Received: by B4 Relay for samuel.kayode@savoirfairelinux.com/20250527 with auth_id=412 X-Original-From: Samuel Kayode Reply-To: samuel.kayode@savoirfairelinux.com From: Samuel Kayode Add support for the battery charger for pf1550 PMIC. Signed-off-by: Samuel Kayode --- v8: - Drop PF1550_CHARGER_NAME - Drop unnecessary POWER_SUPPLY_STATUS_CHARGING s - Replace POWER_SUPPLY_HEALTH_DEAD with POWER_SUPPLY_HEALTH_NO_BATTERY - Drop check for charger in delayed_work s - Use dev_warn when battery is over-voltage - Define two power supplies: charger and battery - Use devm_delayed_work_autocancel to automate cleanup and fix race condition v7: - Use reverse christmas tree order - Drop unecessary 0 in id table's driver data field - Store virqs to avoid reinvoking platform_get_irq in the interrupt service routine - Drop manufacturer and model global variables v6: - Drop lock entirely - Reverse christmas tree order for variables defined in probe as suggested by Frank - return pf1550_reg_init v5: - Drop lock for battery and charger delayed_work - More conservative locking in vbus delayed_work - Apply lock when setting power supply type during register initialization v4: - Finish handling of some interrupts in threaded irq handler - Use platform_get_irq v3: - Use struct power_supply_get_battery_info to get constant charge voltage if specified - Use virqs mapped in MFD driver v2: - Address feedback from Enric Balletbo Serra --- drivers/power/supply/Kconfig | 11 + drivers/power/supply/Makefile | 1 + drivers/power/supply/pf1550-charger.c | 632 ++++++++++++++++++++++++++++++= ++++ 3 files changed, 644 insertions(+) diff --git a/drivers/power/supply/Kconfig b/drivers/power/supply/Kconfig index 79ddb006e2dad6bf96b71ed570a37c006b5f9433..6d0c872edac1f45da314632e671= af1aeda4c87b8 100644 --- a/drivers/power/supply/Kconfig +++ b/drivers/power/supply/Kconfig @@ -471,6 +471,17 @@ config CHARGER_88PM860X help Say Y here to enable charger for Marvell 88PM860x chip. =20 +config CHARGER_PF1550 + tristate "NXP PF1550 battery charger driver" + depends on MFD_PF1550 + help + Say Y to enable support for the NXP PF1550 battery charger. + The device is a single cell Li-Ion/Li-Polymer battery charger for + portable application. + + This driver can also be built as a module. If so, the module will be + called pf1550-charger. + config BATTERY_RX51 tristate "Nokia RX-51 (N900) battery driver" depends on TWL4030_MADC diff --git a/drivers/power/supply/Makefile b/drivers/power/supply/Makefile index 4f5f8e3507f80da02812f0d08c2d81ddff0a272f..7f68380099c59dab71b73120150= 612a23e16a745 100644 --- a/drivers/power/supply/Makefile +++ b/drivers/power/supply/Makefile @@ -64,6 +64,7 @@ obj-$(CONFIG_CHARGER_RT9467) +=3D rt9467-charger.o obj-$(CONFIG_CHARGER_RT9471) +=3D rt9471.o obj-$(CONFIG_BATTERY_TWL4030_MADC) +=3D twl4030_madc_battery.o obj-$(CONFIG_CHARGER_88PM860X) +=3D 88pm860x_charger.o +obj-$(CONFIG_CHARGER_PF1550) +=3D pf1550-charger.o obj-$(CONFIG_BATTERY_RX51) +=3D rx51_battery.o obj-$(CONFIG_AB8500_BM) +=3D ab8500_bmdata.o ab8500_charger.o ab8500_fg.o= ab8500_btemp.o ab8500_chargalg.o obj-$(CONFIG_CHARGER_CPCAP) +=3D cpcap-charger.o diff --git a/drivers/power/supply/pf1550-charger.c b/drivers/power/supply/p= f1550-charger.c new file mode 100644 index 0000000000000000000000000000000000000000..7a6bd9c30d60280f1e1c50d4e1d= daf0a4998b9f0 --- /dev/null +++ b/drivers/power/supply/pf1550-charger.c @@ -0,0 +1,632 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * charger driver for the PF1550 + * + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Robin Gong + * + * Portions Copyright (c) 2025 Savoir-faire Linux Inc. + * Samuel Kayode + */ + +#include +#include +#include +#include +#include +#include + +#define PF1550_DEFAULT_CONSTANT_VOLT 4200000 +#define PF1550_DEFAULT_MIN_SYSTEM_VOLT 3500000 +#define PF1550_DEFAULT_THERMAL_TEMP 75 +#define PF1550_CHARGER_IRQ_NR 5 + +struct pf1550_charger { + struct device *dev; + const struct pf1550_ddata *pf1550; + struct power_supply *charger; + struct power_supply *battery; + struct delayed_work vbus_sense_work; + struct delayed_work chg_sense_work; + struct delayed_work bat_sense_work; + int virqs[PF1550_CHARGER_IRQ_NR]; + + u32 constant_volt; + u32 min_system_volt; + u32 thermal_regulation_temp; +}; + +static int pf1550_get_charger_state(struct regmap *regmap, int *val) +{ + unsigned int data; + int ret; + + ret =3D regmap_read(regmap, PF1550_CHARG_REG_CHG_SNS, &data); + if (ret < 0) + return ret; + + data &=3D PF1550_CHG_SNS_MASK; + + switch (data) { + case PF1550_CHG_PRECHARGE: + case PF1550_CHG_CONSTANT_CURRENT: + case PF1550_CHG_CONSTANT_VOL: + case PF1550_CHG_EOC: + *val =3D POWER_SUPPLY_STATUS_CHARGING; + break; + case PF1550_CHG_DONE: + *val =3D POWER_SUPPLY_STATUS_FULL; + break; + case PF1550_CHG_TIMER_FAULT: + case PF1550_CHG_SUSPEND: + *val =3D POWER_SUPPLY_STATUS_NOT_CHARGING; + break; + case PF1550_CHG_OFF_INV: + case PF1550_CHG_OFF_TEMP: + case PF1550_CHG_LINEAR_ONLY: + *val =3D POWER_SUPPLY_STATUS_DISCHARGING; + break; + default: + *val =3D POWER_SUPPLY_STATUS_UNKNOWN; + } + + return 0; +} + +static int pf1550_get_charge_type(struct regmap *regmap, int *val) +{ + unsigned int data; + int ret; + + ret =3D regmap_read(regmap, PF1550_CHARG_REG_CHG_SNS, &data); + if (ret < 0) + return ret; + + data &=3D PF1550_CHG_SNS_MASK; + + switch (data) { + case PF1550_CHG_SNS_MASK: + *val =3D POWER_SUPPLY_CHARGE_TYPE_TRICKLE; + break; + case PF1550_CHG_CONSTANT_CURRENT: + case PF1550_CHG_CONSTANT_VOL: + case PF1550_CHG_EOC: + *val =3D POWER_SUPPLY_CHARGE_TYPE_FAST; + break; + case PF1550_CHG_DONE: + case PF1550_CHG_TIMER_FAULT: + case PF1550_CHG_SUSPEND: + case PF1550_CHG_OFF_INV: + case PF1550_CHG_BAT_OVER: + case PF1550_CHG_OFF_TEMP: + case PF1550_CHG_LINEAR_ONLY: + *val =3D POWER_SUPPLY_CHARGE_TYPE_NONE; + break; + default: + *val =3D POWER_SUPPLY_CHARGE_TYPE_UNKNOWN; + } + + return 0; +} + +/* + * Supported health statuses: + * - POWER_SUPPLY_HEALTH_DEAD + * - POWER_SUPPLY_HEALTH_GOOD + * - POWER_SUPPLY_HEALTH_OVERVOLTAGE + * - POWER_SUPPLY_HEALTH_UNKNOWN + */ +static int pf1550_get_battery_health(struct regmap *regmap, int *val) +{ + unsigned int data; + int ret; + + ret =3D regmap_read(regmap, PF1550_CHARG_REG_BATT_SNS, &data); + if (ret < 0) + return ret; + + data &=3D PF1550_BAT_SNS_MASK; + + switch (data) { + case PF1550_BAT_NO_DETECT: + *val =3D POWER_SUPPLY_HEALTH_NO_BATTERY; + break; + case PF1550_BAT_NO_VBUS: + case PF1550_BAT_LOW_THAN_PRECHARG: + case PF1550_BAT_CHARG_FAIL: + case PF1550_BAT_HIGH_THAN_PRECHARG: + *val =3D POWER_SUPPLY_HEALTH_GOOD; + break; + case PF1550_BAT_OVER_VOL: + *val =3D POWER_SUPPLY_HEALTH_OVERVOLTAGE; + break; + default: + *val =3D POWER_SUPPLY_HEALTH_UNKNOWN; + break; + } + + return 0; +} + +static int pf1550_get_present(struct regmap *regmap, int *val) +{ + unsigned int data; + int ret; + + ret =3D regmap_read(regmap, PF1550_CHARG_REG_BATT_SNS, &data); + if (ret < 0) + return ret; + + data &=3D PF1550_BAT_SNS_MASK; + *val =3D (data =3D=3D PF1550_BAT_NO_DETECT) ? 0 : 1; + + return 0; +} + +static int pf1550_get_online(struct regmap *regmap, int *val) +{ + unsigned int data; + int ret; + + ret =3D regmap_read(regmap, PF1550_CHARG_REG_VBUS_SNS, &data); + if (ret < 0) + return ret; + + *val =3D (data & PF1550_VBUS_VALID) ? 1 : 0; + + return 0; +} + +static void pf1550_chg_bat_work(struct work_struct *work) +{ + struct pf1550_charger *chg =3D container_of(to_delayed_work(work), + struct pf1550_charger, + bat_sense_work); + unsigned int data; + + if (regmap_read(chg->pf1550->regmap, PF1550_CHARG_REG_BATT_SNS, &data)) { + dev_err(chg->dev, "Read BATT_SNS error.\n"); + return; + } + + switch (data & PF1550_BAT_SNS_MASK) { + case PF1550_BAT_NO_VBUS: + dev_dbg(chg->dev, "No valid VBUS input.\n"); + break; + case PF1550_BAT_LOW_THAN_PRECHARG: + dev_dbg(chg->dev, "VBAT < VPRECHG.LB.\n"); + break; + case PF1550_BAT_CHARG_FAIL: + dev_dbg(chg->dev, "Battery charging failed.\n"); + break; + case PF1550_BAT_HIGH_THAN_PRECHARG: + dev_dbg(chg->dev, "VBAT > VPRECHG.LB.\n"); + break; + case PF1550_BAT_OVER_VOL: + dev_dbg(chg->dev, "VBAT > VBATOV.\n"); + break; + case PF1550_BAT_NO_DETECT: + dev_dbg(chg->dev, "Battery not detected.\n"); + break; + default: + dev_err(chg->dev, "Unknown value read:%x\n", + data & PF1550_CHG_SNS_MASK); + } +} + +static void pf1550_chg_chg_work(struct work_struct *work) +{ + struct pf1550_charger *chg =3D container_of(to_delayed_work(work), + struct pf1550_charger, + chg_sense_work); + unsigned int data; + + if (regmap_read(chg->pf1550->regmap, PF1550_CHARG_REG_CHG_SNS, &data)) { + dev_err(chg->dev, "Read CHG_SNS error.\n"); + return; + } + + switch (data & PF1550_CHG_SNS_MASK) { + case PF1550_CHG_PRECHARGE: + dev_dbg(chg->dev, "In pre-charger mode.\n"); + break; + case PF1550_CHG_CONSTANT_CURRENT: + dev_dbg(chg->dev, "In fast-charge constant current mode.\n"); + break; + case PF1550_CHG_CONSTANT_VOL: + dev_dbg(chg->dev, "In fast-charge constant voltage mode.\n"); + break; + case PF1550_CHG_EOC: + dev_dbg(chg->dev, "In EOC mode.\n"); + break; + case PF1550_CHG_DONE: + dev_dbg(chg->dev, "In DONE mode.\n"); + break; + case PF1550_CHG_TIMER_FAULT: + dev_info(chg->dev, "In timer fault mode.\n"); + break; + case PF1550_CHG_SUSPEND: + dev_info(chg->dev, "In thermistor suspend mode.\n"); + break; + case PF1550_CHG_OFF_INV: + dev_info(chg->dev, "Input invalid, charger off.\n"); + break; + case PF1550_CHG_BAT_OVER: + dev_warn(chg->dev, "Battery over-voltage.\n"); + break; + case PF1550_CHG_OFF_TEMP: + dev_info(chg->dev, "Temp high, charger off.\n"); + break; + case PF1550_CHG_LINEAR_ONLY: + dev_dbg(chg->dev, "In Linear mode, not charging.\n"); + break; + default: + dev_err(chg->dev, "Unknown value read:%x\n", + data & PF1550_CHG_SNS_MASK); + } +} + +static void pf1550_chg_vbus_work(struct work_struct *work) +{ + struct pf1550_charger *chg =3D container_of(to_delayed_work(work), + struct pf1550_charger, + vbus_sense_work); + unsigned int data; + + if (regmap_read(chg->pf1550->regmap, PF1550_CHARG_REG_VBUS_SNS, &data)) { + dev_err(chg->dev, "Read VBUS_SNS error.\n"); + return; + } + + if (data & PF1550_VBUS_UVLO) { + dev_dbg(chg->dev, "VBUS detached.\n"); + power_supply_changed(chg->battery); + } + if (data & PF1550_VBUS_IN2SYS) + dev_dbg(chg->dev, "VBUS_IN2SYS_SNS.\n"); + if (data & PF1550_VBUS_OVLO) + dev_dbg(chg->dev, "VBUS_OVLO_SNS.\n"); + if (data & PF1550_VBUS_VALID) { + dev_dbg(chg->dev, "VBUS attached.\n"); + power_supply_changed(chg->charger); + } +} + +static irqreturn_t pf1550_charger_irq_handler(int irq, void *data) +{ + struct pf1550_charger *chg =3D data; + struct device *dev =3D chg->dev; + int i, irq_type =3D -1; + + for (i =3D 0; i < PF1550_CHARGER_IRQ_NR; i++) + if (irq =3D=3D chg->virqs[i]) + irq_type =3D i; + + switch (irq_type) { + case PF1550_CHARG_IRQ_BAT2SOCI: + dev_info(dev, "BAT to SYS Overcurrent interrupt.\n"); + break; + case PF1550_CHARG_IRQ_BATI: + schedule_delayed_work(&chg->bat_sense_work, + msecs_to_jiffies(10)); + break; + case PF1550_CHARG_IRQ_CHGI: + schedule_delayed_work(&chg->chg_sense_work, + msecs_to_jiffies(10)); + break; + case PF1550_CHARG_IRQ_VBUSI: + schedule_delayed_work(&chg->vbus_sense_work, + msecs_to_jiffies(10)); + break; + case PF1550_CHARG_IRQ_THMI: + dev_info(dev, "Thermal interrupt.\n"); + break; + default: + dev_err(dev, "unknown interrupt occurred.\n"); + } + + return IRQ_HANDLED; +} + +static enum power_supply_property pf1550_charger_props[] =3D { + POWER_SUPPLY_PROP_STATUS, + POWER_SUPPLY_PROP_CHARGE_TYPE, + POWER_SUPPLY_PROP_HEALTH, + POWER_SUPPLY_PROP_PRESENT, + POWER_SUPPLY_PROP_ONLINE, + POWER_SUPPLY_PROP_MODEL_NAME, + POWER_SUPPLY_PROP_MANUFACTURER, +}; + +static int pf1550_charger_get_property(struct power_supply *psy, + enum power_supply_property psp, + union power_supply_propval *val) +{ + struct pf1550_charger *chg =3D power_supply_get_drvdata(psy); + struct regmap *regmap =3D chg->pf1550->regmap; + int ret =3D 0; + + switch (psp) { + case POWER_SUPPLY_PROP_STATUS: + ret =3D pf1550_get_charger_state(regmap, &val->intval); + break; + case POWER_SUPPLY_PROP_CHARGE_TYPE: + ret =3D pf1550_get_charge_type(regmap, &val->intval); + break; + case POWER_SUPPLY_PROP_HEALTH: + ret =3D pf1550_get_battery_health(regmap, &val->intval); + break; + case POWER_SUPPLY_PROP_PRESENT: + ret =3D pf1550_get_present(regmap, &val->intval); + break; + case POWER_SUPPLY_PROP_ONLINE: + ret =3D pf1550_get_online(regmap, &val->intval); + break; + case POWER_SUPPLY_PROP_MODEL_NAME: + val->strval =3D "PF1550"; + break; + case POWER_SUPPLY_PROP_MANUFACTURER: + val->strval =3D "NXP"; + break; + default: + return -EINVAL; + } + + return ret; +} + +static const struct power_supply_desc pf1550_charger_desc =3D { + .name =3D "pf1550-charger", + .type =3D POWER_SUPPLY_TYPE_MAINS, + .properties =3D pf1550_charger_props, + .num_properties =3D ARRAY_SIZE(pf1550_charger_props), + .get_property =3D pf1550_charger_get_property, +}; + +static const struct power_supply_desc pf1550_battery_desc =3D { + .name =3D "pf1550-battery", + .type =3D POWER_SUPPLY_TYPE_BATTERY, + .properties =3D pf1550_charger_props, + .num_properties =3D ARRAY_SIZE(pf1550_charger_props), + .get_property =3D pf1550_charger_get_property, +}; + +static int pf1550_set_constant_volt(struct pf1550_charger *chg, + unsigned int uvolt) +{ + unsigned int data; + + if (uvolt >=3D 3500000 && uvolt <=3D 4440000) + data =3D 8 + (uvolt - 3500000) / 20000; + else + return dev_err_probe(chg->dev, -EINVAL, + "Wrong value for constant voltage\n"); + + dev_dbg(chg->dev, "Charging constant voltage: %u (0x%x)\n", uvolt, + data); + + return regmap_update_bits(chg->pf1550->regmap, + PF1550_CHARG_REG_BATT_REG, + PF1550_CHARG_REG_BATT_REG_CHGCV_MASK, data); +} + +static int pf1550_set_min_system_volt(struct pf1550_charger *chg, + unsigned int uvolt) +{ + unsigned int data; + + switch (uvolt) { + case 3500000: + data =3D 0x0; + break; + case 3700000: + data =3D 0x1; + break; + case 4300000: + data =3D 0x2; + break; + default: + return dev_err_probe(chg->dev, -EINVAL, + "Wrong value for minimum system voltage\n"); + } + + data <<=3D PF1550_CHARG_REG_BATT_REG_VMINSYS_SHIFT; + + dev_dbg(chg->dev, "Minimum system regulation voltage: %u (0x%x)\n", + uvolt, data); + + return regmap_update_bits(chg->pf1550->regmap, + PF1550_CHARG_REG_BATT_REG, + PF1550_CHARG_REG_BATT_REG_VMINSYS_MASK, data); +} + +static int pf1550_set_thermal_regulation_temp(struct pf1550_charger *chg, + unsigned int cells) +{ + unsigned int data; + + switch (cells) { + case 60: + data =3D 0x0; + break; + case 75: + data =3D 0x1; + break; + case 90: + data =3D 0x2; + break; + case 105: + data =3D 0x3; + break; + default: + return dev_err_probe(chg->dev, -EINVAL, + "Wrong value for thermal temperature\n"); + } + + data <<=3D PF1550_CHARG_REG_THM_REG_CNFG_REGTEMP_SHIFT; + + dev_dbg(chg->dev, "Thermal regulation loop temperature: %u (0x%x)\n", + cells, data); + + return regmap_update_bits(chg->pf1550->regmap, + PF1550_CHARG_REG_THM_REG_CNFG, + PF1550_CHARG_REG_THM_REG_CNFG_REGTEMP_MASK, + data); +} + +/* + * Sets charger registers to proper and safe default values. + */ +static int pf1550_reg_init(struct pf1550_charger *chg) +{ + struct device *dev =3D chg->dev; + unsigned int data; + int ret; + + /* Unmask charger interrupt, mask DPMI and reserved bit */ + ret =3D regmap_write(chg->pf1550->regmap, PF1550_CHARG_REG_CHG_INT_MASK, + PF1550_CHG_INT_MASK); + if (ret) + return dev_err_probe(dev, ret, + "Error unmask charger interrupt\n"); + + ret =3D regmap_read(chg->pf1550->regmap, PF1550_CHARG_REG_VBUS_SNS, + &data); + if (ret) + return dev_err_probe(dev, ret, "Read charg vbus_sns error\n"); + + ret =3D pf1550_set_constant_volt(chg, chg->constant_volt); + if (ret) + return ret; + + ret =3D pf1550_set_min_system_volt(chg, chg->min_system_volt); + if (ret) + return ret; + + ret =3D pf1550_set_thermal_regulation_temp(chg, + chg->thermal_regulation_temp); + if (ret) + return ret; + + /* Turn on charger */ + ret =3D regmap_write(chg->pf1550->regmap, PF1550_CHARG_REG_CHG_OPER, + PF1550_CHG_TURNON); + if (ret) + return dev_err_probe(dev, ret, "Error turn on charger\n"); + + return 0; +} + +static void pf1550_dt_parse_dev_info(struct pf1550_charger *chg) +{ + struct power_supply_battery_info *info; + struct device *dev =3D chg->dev; + + if (device_property_read_u32(dev->parent, "nxp,min-system-microvolt", + &chg->min_system_volt)) + chg->min_system_volt =3D PF1550_DEFAULT_MIN_SYSTEM_VOLT; + + if (device_property_read_u32(dev->parent, + "nxp,thermal-regulation-celsius", + &chg->thermal_regulation_temp)) + chg->thermal_regulation_temp =3D PF1550_DEFAULT_THERMAL_TEMP; + + if (power_supply_get_battery_info(chg->charger, &info)) + chg->constant_volt =3D PF1550_DEFAULT_CONSTANT_VOLT; + else + chg->constant_volt =3D info->constant_charge_voltage_max_uv; +} + +static int pf1550_charger_probe(struct platform_device *pdev) +{ + const struct pf1550_ddata *pf1550 =3D dev_get_drvdata(pdev->dev.parent); + struct power_supply_config psy_cfg =3D {}; + struct pf1550_charger *chg; + int i, irq, ret; + + chg =3D devm_kzalloc(&pdev->dev, sizeof(*chg), GFP_KERNEL); + if (!chg) + return -ENOMEM; + + chg->dev =3D &pdev->dev; + chg->pf1550 =3D pf1550; + + if (!chg->pf1550->regmap) + return dev_err_probe(&pdev->dev, -ENODEV, + "failed to get regmap\n"); + + platform_set_drvdata(pdev, chg); + + ret =3D devm_delayed_work_autocancel(chg->dev, &chg->vbus_sense_work, + pf1550_chg_vbus_work); + if (ret) + return dev_err_probe(chg->dev, ret, + "failed to add vbus sense work\n"); + + ret =3D devm_delayed_work_autocancel(chg->dev, &chg->chg_sense_work, + pf1550_chg_chg_work); + if (ret) + return dev_err_probe(chg->dev, ret, + "failed to add charger sense work\n"); + + ret =3D devm_delayed_work_autocancel(chg->dev, &chg->bat_sense_work, + pf1550_chg_bat_work); + if (ret) + return dev_err_probe(chg->dev, ret, + "failed to add battery sense work\n"); + + for (i =3D 0; i < PF1550_CHARGER_IRQ_NR; i++) { + irq =3D platform_get_irq(pdev, i); + if (irq < 0) + return irq; + + chg->virqs[i] =3D irq; + + ret =3D devm_request_threaded_irq(&pdev->dev, irq, NULL, + pf1550_charger_irq_handler, + IRQF_NO_SUSPEND, + "pf1550-charger", chg); + if (ret) + return dev_err_probe(&pdev->dev, ret, + "failed irq request\n"); + } + + psy_cfg.drv_data =3D chg; + + chg->charger =3D devm_power_supply_register(&pdev->dev, + &pf1550_charger_desc, + &psy_cfg); + if (IS_ERR(chg->charger)) + return dev_err_probe(&pdev->dev, PTR_ERR(chg->charger), + "failed: power supply register\n"); + + chg->battery =3D devm_power_supply_register(&pdev->dev, + &pf1550_battery_desc, + &psy_cfg); + if (IS_ERR(chg->battery)) + return dev_err_probe(&pdev->dev, PTR_ERR(chg->battery), + "failed: power supply register\n"); + + pf1550_dt_parse_dev_info(chg); + + return pf1550_reg_init(chg); +} + +static const struct platform_device_id pf1550_charger_id[] =3D { + { "pf1550-charger", }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(platform, pf1550_charger_id); + +static struct platform_driver pf1550_charger_driver =3D { + .driver =3D { + .name =3D "pf1550-charger", + }, + .probe =3D pf1550_charger_probe, + .id_table =3D pf1550_charger_id, +}; +module_platform_driver(pf1550_charger_driver); + +MODULE_AUTHOR("Robin Gong "); +MODULE_DESCRIPTION("PF1550 charger driver"); +MODULE_LICENSE("GPL"); --=20 2.49.0 From nobody Tue Oct 7 18:25:18 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3DF3D289E0F; Mon, 7 Jul 2025 21:37:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250707-pf1550-v8-6-6b6eb67c03a0@savoirfairelinux.com> References: <20250707-pf1550-v8-0-6b6eb67c03a0@savoirfairelinux.com> In-Reply-To: <20250707-pf1550-v8-0-6b6eb67c03a0@savoirfairelinux.com> To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Liam Girdwood , Mark Brown , Dmitry Torokhov , Sebastian Reichel , Frank Li Cc: imx@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-input@vger.kernel.org, linux-pm@vger.kernel.org, Abel Vesa , Abel Vesa , Robin Gong , Robin Gong , Enric Balletbo i Serra , Samuel Kayode , Abel Vesa , Krzysztof Kozlowski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1751924244; l=1098; i=samuel.kayode@savoirfairelinux.com; s=20250527; h=from:subject:message-id; bh=A2g1QBfQcrzU9z5M8QRFE0Nrt7Jq7rU2GZY3TiYW/3Y=; b=iB96E+EO5wF7wnhnGl63GsQ2Qrp4+CZpn+wMRX4+BmXD5B7C4ewGXAfVX2kNxNKcqCuHOvXRp 6TyRbOmwG2NCmY5MLimE/JgpCu4nsyVQD4RrKmKKjA33mIb19WQxnVY X-Developer-Key: i=samuel.kayode@savoirfairelinux.com; a=ed25519; pk=TPSQGQ5kywnnPyGs0EQqLajLFbdDu17ahXz8/gxMfio= X-Endpoint-Received: by B4 Relay for samuel.kayode@savoirfairelinux.com/20250527 with auth_id=412 X-Original-From: Samuel Kayode Reply-To: samuel.kayode@savoirfairelinux.com From: Samuel Kayode Add MAINTAINERS entry for pf1550 PMIC. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Samuel Kayode --- v6: - Add imx mailing list --- MAINTAINERS | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 98201e1f4ab5908ff49d32d19275e123cedb4b66..5547fdafa7e1bb11903d5d5bef2= 46c2e1a20fbca 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -17853,6 +17853,17 @@ F: Documentation/devicetree/bindings/clock/imx* F: drivers/clk/imx/ F: include/dt-bindings/clock/imx* =20 +NXP PF1550 PMIC MFD DRIVER +M: Samuel Kayode +L: imx@lists.linux.dev +S: Maintained +F: Documentation/devicetree/bindings/mfd/nxp,pf1550.yaml +F: drivers/input/misc/pf1550-onkey.c +F: drivers/mfd/pf1550.c +F: drivers/power/supply/pf1550-charger.c +F: drivers/regulator/pf1550-regulator.c +F: include/linux/mfd/pfd1550.h + NXP PF8100/PF8121A/PF8200 PMIC REGULATOR DEVICE DRIVER M: Jagan Teki S: Maintained --=20 2.49.0