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(unknown []) by gzga-smtp-mtada-g0-0 (Coremail) with SMTP id _____wB37yQ4YGpo5RCCCw--.60201S2; Sun, 06 Jul 2025 19:38:36 +0800 (CST) From: Andy Yan To: heiko@sntech.de Cc: conor+dt@kernel.org, didi.debian@cknow.org, krzk+dt@kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Andy Yan Subject: [PATCH] arm64: dts: rockchip: Enable mipi dsi on rk3568-evb1-v10 Date: Sun, 6 Jul 2025 19:38:24 +0800 Message-ID: <20250706113831.330799-1-andyshrk@163.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: _____wB37yQ4YGpo5RCCCw--.60201S2 X-Coremail-Antispam: 1Uf129KBjvJXoWxAr4rCr43tr1fKr48XF1kKrg_yoW5Xr17pr nrCw4Sgw4xurW2qw15tr1kJrn5Gan5AFWxGF17uFyIyrsFqa4vg34IqF98tFyUtF18Z3yY qrnxAFy29anFgaUanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x07j8txfUUUUU= X-CM-SenderInfo: 5dqg52xkunqiywtou0bp/xtbBEgmCXmhqWtxqyAAAsh Content-Type: text/plain; charset="utf-8" From: Andy Yan Enable the w552793baa 1080x1920 dsi panel on rk3568 evb1. Signed-off-by: Andy Yan --- .../boot/dts/rockchip/rk3568-evb1-v10.dts | 66 ++++++++++++++++++- 1 file changed, 64 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts b/arch/arm64/= boot/dts/rockchip/rk3568-evb1-v10.dts index b073a4d03e4fb..a28bb90b85bed 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts @@ -22,6 +22,15 @@ aliases { mmc1 =3D &sdhci; }; =20 + backlight: backlight { + compatible =3D "pwm-backlight"; + pwms =3D <&pwm4 0 25000 0>; + brightness-levels =3D <20 220>; + num-interpolated-steps =3D <200>; + default-brightness-level =3D <100>; + power-supply =3D <&vcc3v3_sys>; + }; + chosen: chosen { stdout-path =3D "serial2:1500000n8"; }; @@ -184,6 +193,47 @@ &cpu3 { cpu-supply =3D <&vdd_cpu>; }; =20 +&dsi0 { + status =3D "okay"; + clock-master; + #address-cells =3D <1>; + #size-cells =3D <0>; + + panel@0 { + compatible =3D "wanchanglong,w552793baa", "raydium,rm67200"; + reg =3D <0>; + backlight =3D <&backlight>; + vdd-supply =3D <&vcc3v3_lcd0_n>; + iovcc-supply =3D <&vcc3v3_lcd0_n>; + vsp-supply =3D <&vcc5v0_sys>; + vsn-supply =3D <&vcc5v0_sys>; + reset-gpios =3D <&gpio3 RK_PB5 GPIO_ACTIVE_LOW>; + + port { + panel_in_dsi: endpoint { + remote-endpoint =3D <&dsi0_out_panel>; + }; + }; + }; + +}; + +&dsi0_in { + dsi0_in_vp1: endpoint { + remote-endpoint =3D <&vp1_out_dsi0>; + }; +}; + +&dsi0_out { + dsi0_out_panel: endpoint { + remote-endpoint =3D <&panel_in_dsi>; + }; +}; + +&dsi_dphy0 { + status =3D "okay"; +}; + &gmac0 { assigned-clocks =3D <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; assigned-clock-parents =3D <&cru SCLK_GMAC0_RGMII_SPEED>; @@ -581,6 +631,10 @@ &pmu_io_domains { status =3D "okay"; }; =20 +&pwm4 { + status =3D "okay"; +}; + &saradc { vref-supply =3D <&vcca_1v8>; status =3D "okay"; @@ -672,8 +726,9 @@ &usb2phy1_otg { }; =20 &vop { - assigned-clocks =3D <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; - assigned-clock-parents =3D <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; + assigned-clocks =3D <&cru DCLK_VOP0>, <&cru PLL_VPLL>, <&cru DCLK_VOP1>; + assigned-clock-parents =3D <&pmucru PLL_HPLL>, <&xin24m>, <&cru PLL_VPLL>; + assigned-clock-rates =3D <0>, <132000000>, <132000000>; status =3D "okay"; }; =20 @@ -687,3 +742,10 @@ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { remote-endpoint =3D <&hdmi_in_vp0>; }; }; + +&vp1 { + vp1_out_dsi0: endpoint@ROCKCHIP_VOP2_EP_MIPI0 { + reg =3D ; + remote-endpoint =3D <&dsi0_in_vp1>; + }; +}; --=20 2.43.0