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[2001:14ba:a0c3:3a00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-556384c0558sm526274e87.209.2025.07.05.03.02.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 05 Jul 2025 03:02:31 -0700 (PDT) From: Dmitry Baryshkov Date: Sat, 05 Jul 2025 13:02:26 +0300 Subject: [PATCH v4 01/10] drm/msm: move wq handling to KMS code Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250705-msm-gpu-split-v4-1-fb470c481131@oss.qualcomm.com> References: <20250705-msm-gpu-split-v4-0-fb470c481131@oss.qualcomm.com> In-Reply-To: <20250705-msm-gpu-split-v4-0-fb470c481131@oss.qualcomm.com> To: Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=7299; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=BlPzvety+GReSb5ljsBIzhJtL2i+9ttmfQU5dRgJaXM=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBoaPgzHuOQATM2sXKXLoo1JJqXX4FG29PDSjVg5 /7l6d0HDWGJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCaGj4MwAKCRCLPIo+Aiko 1TYkB/wL94YGKmC+l+nvVDramZxf1vgXqJIEqFNHI2UNNiH3A4n+2rHYDJqz7d7pniEC/WkS6ao jkhi+kNKJTS3ZHshb0283AIUka8ZK88syYytcrsagud8pvsS3XBpO9Q4UR5lGt6zr2jRWPCpYSR wxudm8oah5WwNeAkGf16d9Y569OBjxpERYcRL+yM/zKCIDmCfrfqHDPpEcODw0UJNbzcoDT1mBx XbCQ9beycTskjWmxXT+h1B0YxVEtoID0RLROaxTJ82WG04LnyCPq8M1a2qNNVgZkIsZ0AwP7oMg AcMytt6BjC9V4vkhpnicKLLZLnfr2HjBUbPcYzYYJ932KZ22 X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Authority-Analysis: v=2.4 cv=GdQXnRXL c=1 sm=1 tr=0 ts=6868f83b cx=c_pps a=HLyN3IcIa5EE8TELMZ618Q==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=Wb1JkmetP80A:10 a=EUspDBNiAAAA:8 a=T1fEnJx6pJBI0EFA4NgA:9 a=QEXdDO2ut3YA:10 a=bTQJ7kPSJx9SKPbeHEYW:22 X-Proofpoint-GUID: 43LR18i-CWw-0ZSARq5mzD1GGs21m6G_ X-Proofpoint-ORIG-GUID: 43LR18i-CWw-0ZSARq5mzD1GGs21m6G_ X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzA1MDA2NCBTYWx0ZWRfX2AIMIinM9BSg uqZBdHXMoVtBeBUy2qXZpZRWLh0jiHbBaz5oUUUrS8F4vdrFmzLZlftwjj9K9TGos+hG8wvUWHq HmnNXYu9MUgAB+ZoA/HhVSGOD+Hk85dRTblbdafNd4OLs6daJZ9TVWMyNQmigLzTM59jhxJ789S VZx8BxsWRIJXuDBTAMdaRpUgtO6l7H4iNYlrT+Kks2Tkk+iqdy7gte2wcMyin/dHW2d36WdoZGb W2Xdp8ocLLYwaUNx9a2O42CDOR85J1+YyIWJ7ZDE3+1eJ5alrtHi0PmRRLMWrXn+aTPF+wu9vuh yZ+pV5C1LOnqWNUN0jskEUPngLfxQ+04s1qdDoE+0qo5RKtxoUTHE4mXXCPGTR2frZfoxD4kJXj G5eYsOrnhgAQhFc/Y4PuIh+kaPGngbimbh54IBCehWOybceRshPOCPuFOmgEm35vlZgpizUg X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.7,FMLib:17.12.80.40 definitions=2025-07-04_07,2025-07-04_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 phishscore=0 adultscore=0 bulkscore=0 clxscore=1015 spamscore=0 suspectscore=0 mlxlogscore=999 priorityscore=1501 impostorscore=0 malwarescore=0 mlxscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507050064 The global workqueue is only used for vblanks inside KMS code. Move allocation / flushing / deallcation of it to msm_kms.c Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 +- drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c | 2 +- drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c | 2 +- drivers/gpu/drm/msm/msm_drv.c | 21 ++------------------- drivers/gpu/drm/msm/msm_drv.h | 2 -- drivers/gpu/drm/msm/msm_kms.c | 11 +++++++++-- drivers/gpu/drm/msm/msm_kms.h | 8 ++++++++ 7 files changed, 22 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/= msm/disp/dpu1/dpu_encoder.c index 078d3674ff411cf07614ae68889d8d0147453d10..f7abe8ba73ef0899ff1985ebf26= 571b7c459a52f 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -980,7 +980,7 @@ static int dpu_encoder_resource_control(struct drm_enco= der *drm_enc, return 0; } =20 - queue_delayed_work(priv->wq, &dpu_enc->delayed_off_work, + queue_delayed_work(priv->kms->wq, &dpu_enc->delayed_off_work, msecs_to_jiffies(dpu_enc->idle_timeout)); =20 trace_dpu_enc_rc(DRMID(drm_enc), sw_event, diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c b/drivers/gpu/drm/ms= m/disp/mdp4/mdp4_crtc.c index 0133c0c01a0bcd619089a5565719d764d88b63f8..2ee03ce2fd398be4f5b101be09c= 6dfb495324128 100644 --- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c +++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c @@ -511,7 +511,7 @@ static void mdp4_crtc_vblank_irq(struct mdp_irq *irq, u= int32_t irqstatus) =20 if (pending & PENDING_CURSOR) { update_cursor(crtc); - drm_flip_work_commit(&mdp4_crtc->unref_cursor_work, priv->wq); + drm_flip_work_commit(&mdp4_crtc->unref_cursor_work, priv->kms->wq); } } =20 diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c b/drivers/gpu/drm/ms= m/disp/mdp5/mdp5_crtc.c index 298861f373b04cb4f7a37c42d0648a1c40d2aad1..4c4900a7beda8f7bd3184230a1c= 1b5f7ebd0c588 100644 --- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c +++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c @@ -1196,7 +1196,7 @@ static void mdp5_crtc_vblank_irq(struct mdp_irq *irq,= uint32_t irqstatus) } =20 if (pending & PENDING_CURSOR) - drm_flip_work_commit(&mdp5_crtc->unref_cursor_work, priv->wq); + drm_flip_work_commit(&mdp5_crtc->unref_cursor_work, priv->kms->wq); } =20 static void mdp5_crtc_err_irq(struct mdp_irq *irq, uint32_t irqstatus) diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c index 2283a377cda14fc08aaab71e093b71f8e3954eec..8f79f5b9a61eb39dbd63b4ff225= b96e63ee9a5dd 100644 --- a/drivers/gpu/drm/msm/msm_drv.c +++ b/drivers/gpu/drm/msm/msm_drv.c @@ -77,13 +77,6 @@ static int msm_drm_uninit(struct device *dev) drm_atomic_helper_shutdown(ddev); } =20 - /* We must cancel and cleanup any pending vblank enable/disable - * work before msm_irq_uninstall() to avoid work re-enabling an - * irq after uninstall has disabled it. - */ - - flush_workqueue(priv->wq); - msm_gem_shrinker_cleanup(ddev); =20 msm_perf_debugfs_cleanup(priv); @@ -97,8 +90,6 @@ static int msm_drm_uninit(struct device *dev) ddev->dev_private =3D NULL; drm_dev_put(ddev); =20 - destroy_workqueue(priv->wq); - return 0; } =20 @@ -119,12 +110,6 @@ static int msm_drm_init(struct device *dev, const stru= ct drm_driver *drv) ddev->dev_private =3D priv; priv->dev =3D ddev; =20 - priv->wq =3D alloc_ordered_workqueue("msm", 0); - if (!priv->wq) { - ret =3D -ENOMEM; - goto err_put_dev; - } - INIT_LIST_HEAD(&priv->objects); mutex_init(&priv->obj_lock); =20 @@ -149,7 +134,7 @@ static int msm_drm_init(struct device *dev, const struc= t drm_driver *drv) if (priv->kms_init) { ret =3D drmm_mode_config_init(ddev); if (ret) - goto err_destroy_wq; + goto err_put_dev; } =20 dma_set_max_seg_size(dev, UINT_MAX); @@ -157,7 +142,7 @@ static int msm_drm_init(struct device *dev, const struc= t drm_driver *drv) /* Bind all our sub-components: */ ret =3D component_bind_all(dev, ddev); if (ret) - goto err_destroy_wq; + goto err_put_dev; =20 ret =3D msm_gem_shrinker_init(ddev); if (ret) @@ -194,8 +179,6 @@ static int msm_drm_init(struct device *dev, const struc= t drm_driver *drv) =20 return ret; =20 -err_destroy_wq: - destroy_workqueue(priv->wq); err_put_dev: drm_dev_put(ddev); =20 diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index 2b49c4b800eef039bb49907058c426b152e0f7f1..33d668a18ff3613b40341df540d= 504ffff65b2a7 100644 --- a/drivers/gpu/drm/msm/msm_drv.h +++ b/drivers/gpu/drm/msm/msm_drv.h @@ -175,8 +175,6 @@ struct msm_drm_private { struct mutex lock; } lru; =20 - struct workqueue_struct *wq; - unsigned int num_crtcs; =20 struct msm_drm_thread event_thread[MAX_CRTCS]; diff --git a/drivers/gpu/drm/msm/msm_kms.c b/drivers/gpu/drm/msm/msm_kms.c index e82b8569a46846fbd212c987f9f0d3e7939e12a2..c6c4d3a89ba829e161b060b52c9= 1f5323cb5a806 100644 --- a/drivers/gpu/drm/msm/msm_kms.c +++ b/drivers/gpu/drm/msm/msm_kms.c @@ -137,7 +137,7 @@ static int vblank_ctrl_queue_work(struct msm_drm_privat= e *priv, vbl_work->enable =3D enable; vbl_work->priv =3D priv; =20 - queue_work(priv->wq, &vbl_work->work); + queue_work(priv->kms->wq, &vbl_work->work); =20 return 0; } @@ -227,6 +227,13 @@ void msm_drm_kms_uninit(struct device *dev) =20 BUG_ON(!kms); =20 + /* We must cancel and cleanup any pending vblank enable/disable + * work before msm_irq_uninstall() to avoid work re-enabling an + * irq after uninstall has disabled it. + */ + + flush_workqueue(kms->wq); + /* clean up event worker threads */ for (i =3D 0; i < priv->num_crtcs; i++) { if (priv->event_thread[i].worker) @@ -261,7 +268,7 @@ int msm_drm_kms_init(struct device *dev, const struct d= rm_driver *drv) ret =3D priv->kms_init(ddev); if (ret) { DRM_DEV_ERROR(dev, "failed to load kms\n"); - return ret; + goto err_msm_uninit; } =20 /* Enable normalization of plane zpos */ diff --git a/drivers/gpu/drm/msm/msm_kms.h b/drivers/gpu/drm/msm/msm_kms.h index 7cdb2eb6770035a8bbed548de3dcbebf94188fff..e48529c0a1554e8b9bf477dd71f= 59286b388de73 100644 --- a/drivers/gpu/drm/msm/msm_kms.h +++ b/drivers/gpu/drm/msm/msm_kms.h @@ -153,6 +153,8 @@ struct msm_kms { struct mutex commit_lock[MAX_CRTCS]; unsigned pending_crtc_mask; struct msm_pending_timer pending_timers[MAX_CRTCS]; + + struct workqueue_struct *wq; }; =20 static inline int msm_kms_init(struct msm_kms *kms, @@ -165,6 +167,10 @@ static inline int msm_kms_init(struct msm_kms *kms, =20 kms->funcs =3D funcs; =20 + kms->wq =3D alloc_ordered_workqueue("msm", 0); + if (!kms->wq) + return -ENOMEM; + for (i =3D 0; i < ARRAY_SIZE(kms->pending_timers); i++) { ret =3D msm_atomic_init_pending_timer(&kms->pending_timers[i], kms, i); if (ret) { @@ -181,6 +187,8 @@ static inline void msm_kms_destroy(struct msm_kms *kms) =20 for (i =3D 0; i < ARRAY_SIZE(kms->pending_timers); i++) msm_atomic_destroy_pending_timer(&kms->pending_timers[i]); + + destroy_workqueue(kms->wq); } =20 #define for_each_crtc_mask(dev, crtc, crtc_mask) \ --=20 2.39.5