From nobody Wed Oct 8 00:04:33 2025 Received: from leonov.paulk.fr (leonov.paulk.fr [185.233.101.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C8A2230E857; Fri, 4 Jul 2025 15:59:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.233.101.22 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751644762; cv=none; b=BeDaIzhvge9krRON1mOnwKsbhHlKAc1zRp2MYQL1l2UjjwU2SXw6YVA7gSN94i3t8Q5sQajEFgkNNFxx5EK9eoRjyReV6dgbwGLVnMWChx/GkVxkwf9QfVGMEM2x5XCmqokwLxBlQlPQdAD6mHP29gjVnxzS3FxJJ0bnw1CPK1s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751644762; c=relaxed/simple; bh=We8FZlBDtvXYSptcWE/Xb8miHHoFn0yAQv5dy+DzD2w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=stXwFMwNhH5xg+AlVftwx2xASTNXbPlzaH6V1BwQhL86/GIv3ZYExd4F+QGvC7TLBvLsC4TKvLJS2Fz+iRuXIuyZwERm9BpJ5fqNnoJY9CV+Rn/w0vgliTIC7ZYigWXj+XsioDHsyyf9vGzGKmMSiD3T+Xu+HxCciASOykpQaEY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io; spf=pass smtp.mailfrom=sys-base.io; arc=none smtp.client-ip=185.233.101.22 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sys-base.io Received: from laika.paulk.fr (12.234.24.109.rev.sfr.net [109.24.234.12]) by leonov.paulk.fr (Postfix) with ESMTPS id 9C8DD1F0006E; Fri, 4 Jul 2025 15:59:01 +0000 (UTC) Received: by laika.paulk.fr (Postfix, from userid 65534) id 65CC3ACA65D; Fri, 4 Jul 2025 15:52:37 +0000 (UTC) X-Spam-Level: * Received: from localhost.localdomain (unknown [192.168.1.64]) by laika.paulk.fr (Postfix) with ESMTP id AD114ACA65D; Fri, 4 Jul 2025 15:46:45 +0000 (UTC) From: Paul Kocialkowski To: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Cc: Yong Deng , Paul Kocialkowski , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Maxime Ripard , Paul Kocialkowski Subject: [PATCH v8 8/9] ARM: dts: sun8i-a83t: Add BananaPi M3 OV5640 camera overlay Date: Fri, 4 Jul 2025 17:46:25 +0200 Message-ID: <20250704154628.3468793-9-paulk@sys-base.io> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250704154628.3468793-1-paulk@sys-base.io> References: <20250704154628.3468793-1-paulk@sys-base.io> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Paul Kocialkowski Add an overlay supporting the OV5640 from the BananaPi Camera v3 peripheral board. The board has two sensors (OV5640 and OV8865) which cannot be supported in parallel as they share the same reset pin and the kernel currently has no support for this case. Signed-off-by: Paul Kocialkowski --- arch/arm/boot/dts/allwinner/Makefile | 1 + .../sun8i-a83t-bananapi-m3-camera-ov5640.dtso | 117 ++++++++++++++++++ 2 files changed, 118 insertions(+) create mode 100644 arch/arm/boot/dts/allwinner/sun8i-a83t-bananapi-m3-came= ra-ov5640.dtso diff --git a/arch/arm/boot/dts/allwinner/Makefile b/arch/arm/boot/dts/allwi= nner/Makefile index 7318ce6d7fa3..de13da013732 100644 --- a/arch/arm/boot/dts/allwinner/Makefile +++ b/arch/arm/boot/dts/allwinner/Makefile @@ -219,6 +219,7 @@ dtb-$(CONFIG_MACH_SUN8I) +=3D \ sun8i-a33-vstar.dtb \ sun8i-a83t-allwinner-h8homlet-v2.dtb \ sun8i-a83t-bananapi-m3.dtb \ + sun8i-a83t-bananapi-m3-camera-ov5640.dtbo \ sun8i-a83t-cubietruck-plus.dtb \ sun8i-a83t-tbs-a711.dtb \ sun8i-h2-plus-bananapi-m2-zero.dtb \ diff --git a/arch/arm/boot/dts/allwinner/sun8i-a83t-bananapi-m3-camera-ov56= 40.dtso b/arch/arm/boot/dts/allwinner/sun8i-a83t-bananapi-m3-camera-ov5640.= dtso new file mode 100644 index 000000000000..469faf8cd2c4 --- /dev/null +++ b/arch/arm/boot/dts/allwinner/sun8i-a83t-bananapi-m3-camera-ov5640.dtso @@ -0,0 +1,117 @@ +// SPDX-License-Identifier: GPL-2.0 OR X11 +/* + * Copyright 2022 Bootlin + * Author: Paul Kocialkowski + */ + +/dts-v1/; +/plugin/; + +#include +#include + +&{/} { + compatible =3D "sinovoip,bpi-m3"; + + /* + * These regulators actually have DLDO4 tied to their EN pin, which is + * described as input supply here for lack of a better representation. + * Their actual supply is PS, which is always-on. + */ + + ov5640_avdd: ov5640-avdd { + compatible =3D "regulator-fixed"; + regulator-name =3D "ov5640-avdd"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + vin-supply =3D <®_dldo4>; + }; + + ov5640_dovdd: ov5640-dovdd { + compatible =3D "regulator-fixed"; + regulator-name =3D "ov5640-dovdd"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + vin-supply =3D <®_dldo4>; + }; + + ov5640_dvdd: ov5640-dvdd { + compatible =3D "regulator-fixed"; + regulator-name =3D "ov5640-dvdd"; + regulator-min-microvolt =3D <1500000>; + regulator-max-microvolt =3D <1500000>; + vin-supply =3D <®_dldo4>; + }; +}; + +&csi { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&csi_8bit_parallel_pins>; + status =3D "okay"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + csi_in_ov5640: endpoint { + remote-endpoint =3D <&ov5640_out_csi>; + bus-width =3D <8>; + data-shift =3D <2>; + hsync-active =3D <1>; + vsync-active =3D <1>; + pclk-sample =3D <1>; + }; + }; + }; +}; + +&i2c2 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c2_pe_pins>; + status =3D "okay"; + + #address-cells =3D <1>; + #size-cells =3D <0>; + + ov5640: camera@3c { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&csi_mclk_pin>; + + compatible =3D "ovti,ov5640"; + reg =3D <0x3c>; + + clocks =3D <&ccu CLK_CSI_MCLK>; + clock-names =3D "xclk"; + assigned-clocks =3D <&ccu CLK_CSI_MCLK>; + assigned-clock-parents =3D <&osc24M>; + assigned-clock-rates =3D <24000000>; + + AVDD-supply =3D <&ov5640_avdd>; + DOVDD-supply =3D <&ov5640_dovdd>; + DVDD-supply =3D <&ov5640_dvdd>; + + powerdown-gpios =3D <&pio 3 15 GPIO_ACTIVE_HIGH>; /* PD15 */ + reset-gpios =3D <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */ + + rotation =3D <180>; + + port { + ov5640_out_csi: endpoint { + remote-endpoint =3D <&csi_in_ov5640>; + bus-width =3D <8>; + data-shift =3D <2>; + hsync-active =3D <1>;=20 + vsync-active =3D <1>; + pclk-sample =3D <1>; + }; + }; + }; +}; + +®_dldo4 { + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; +}; --=20 2.49.0