From nobody Tue Oct 7 22:24:59 2025 Received: from leonov.paulk.fr (leonov.paulk.fr [185.233.101.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 15EEC315514; Fri, 4 Jul 2025 15:54:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.233.101.22 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751644448; cv=none; b=RHd84wGwlO/J1PCqPLJxyJLRGt4O36VOznHjTrbO6k9e62GfXCcZuvJKy1n5JIVt39t4jcxKmAesfYstX3JgXwMp/mkUFuyO408AfMWEm++tkcigbET0I3OqAC0zy8WyjDVWhSzfVYy8DCozqFivdHXH5DWWbZkp9p3Ry6WPCzI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751644448; c=relaxed/simple; bh=AN4d4CJv843ynBMIVI+NxgktoUoM3QNIdyWFWQgxNtA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=JllveIkPyU+qTs1op3cvX0qRj1A4wqG1Btism3Os5gq6yL1mbSaTV4xg2GBDsB9hF9MlxunNpOFs9Hy6yIKtEFCyxz5JgXFdK5Q1HEEOaKUViMyVqqRM0az+xA+VbNRqJQJviG5qi9XctSPmSBZfi6UNJSo7aDrcOK6frtk3vC4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io; spf=pass smtp.mailfrom=sys-base.io; arc=none smtp.client-ip=185.233.101.22 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sys-base.io Received: from laika.paulk.fr (12.234.24.109.rev.sfr.net [109.24.234.12]) by leonov.paulk.fr (Postfix) with ESMTPS id D9D1B1F0003D; Fri, 4 Jul 2025 15:53:55 +0000 (UTC) Received: by laika.paulk.fr (Postfix, from userid 65534) id 1649FACA66C; Fri, 4 Jul 2025 15:48:02 +0000 (UTC) X-Spam-Level: * Received: from localhost.localdomain (unknown [192.168.1.64]) by laika.paulk.fr (Postfix) with ESMTP id 1912BACA64F; Fri, 4 Jul 2025 15:46:34 +0000 (UTC) From: Paul Kocialkowski To: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Cc: Yong Deng , Paul Kocialkowski , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Maxime Ripard Subject: [PATCH v8 1/9] dt-bindings: media: sun6i-a31-csi: Add optional interconnect properties Date: Fri, 4 Jul 2025 17:46:18 +0200 Message-ID: <20250704154628.3468793-2-paulk@sys-base.io> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250704154628.3468793-1-paulk@sys-base.io> References: <20250704154628.3468793-1-paulk@sys-base.io> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" An interconnect can be attached to the sun6i-a31-csi device, which is useful to attach the dma memory offset. Add related properties. Signed-off-by: Paul Kocialkowski Acked-by: Rob Herring (Arm) --- .../devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-cs= i.yaml b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.ya= ml index 1aa5775ba2bc..978ef2dc0ae7 100644 --- a/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml +++ b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml @@ -40,6 +40,12 @@ properties: resets: maxItems: 1 =20 + interconnects: + maxItems: 1 + + interconnect-names: + const: dma-mem + port: $ref: /schemas/graph.yaml#/$defs/port-base description: Parallel input port, connect to a parallel sensor --=20 2.49.0 From nobody Tue Oct 7 22:24:59 2025 Received: from leonov.paulk.fr (leonov.paulk.fr [185.233.101.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D53E21E3772; Fri, 4 Jul 2025 15:53:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.233.101.22 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751644436; cv=none; b=uIhFGTISxJPkSecViGEjfBvBnvKDr2iYTXgIf6k0kDlCGLYg732cUMXrU2Q8jj6JIRBea0H/CBgMI9ZGUH84XVWzOyBouIlpW7Ta/SDgWrwg0z9+XDkXsf6n7lhQm5BSJzE8uvmrpv/ApxOuJODcSp781QCG9gDfO1xxkIx7O7A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751644436; c=relaxed/simple; bh=0ntha8xfUpHF2jHsuenBQgWYSUELO8vbmsaXkYuPhpM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=WLEeJbsF5lxUVPA7v2sE9tIQE7bzRP2OmAr1AneaGz+5iAzPPB4lgZmSe1YALtJmnDJRWFiYFL9yB2EsW0hM12btecLxImqFiyRDlcZwdmSh6RO+DmwcRU/hFZxaEd8ozZsYfDigpjYrwDNdmh4aKMgrKGfZmHWwipBebrBnANA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io; spf=pass smtp.mailfrom=sys-base.io; arc=none smtp.client-ip=185.233.101.22 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sys-base.io Received: from laika.paulk.fr (12.234.24.109.rev.sfr.net [109.24.234.12]) by leonov.paulk.fr (Postfix) with ESMTPS id E695D1F00047; Fri, 4 Jul 2025 15:53:52 +0000 (UTC) Received: by laika.paulk.fr (Postfix, from userid 65534) id 7B821ACA67D; Fri, 4 Jul 2025 15:48:35 +0000 (UTC) X-Spam-Level: * Received: from localhost.localdomain (unknown [192.168.1.64]) by laika.paulk.fr (Postfix) with ESMTP id 82FF0ACA650; Fri, 4 Jul 2025 15:46:34 +0000 (UTC) From: Paul Kocialkowski To: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Cc: Yong Deng , Paul Kocialkowski , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Maxime Ripard Subject: [PATCH v8 2/9] dt-bindings: media: sun6i-a31-isp: Add optional interconnect properties Date: Fri, 4 Jul 2025 17:46:19 +0200 Message-ID: <20250704154628.3468793-3-paulk@sys-base.io> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250704154628.3468793-1-paulk@sys-base.io> References: <20250704154628.3468793-1-paulk@sys-base.io> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" An interconnect can be attached to the sun6i-a31-csi device, which is useful to attach the dma memory offset. Add related properties. Signed-off-by: Paul Kocialkowski Acked-by: Rob Herring (Arm) --- .../devicetree/bindings/media/allwinner,sun6i-a31-isp.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-is= p.yaml b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-isp.ya= ml index 3ea4a4290f23..c0d7accc7bbe 100644 --- a/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-isp.yaml +++ b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-isp.yaml @@ -36,6 +36,12 @@ properties: resets: maxItems: 1 =20 + interconnects: + maxItems: 1 + + interconnect-names: + const: dma-mem + ports: $ref: /schemas/graph.yaml#/properties/ports =20 --=20 2.49.0 From nobody Tue Oct 7 22:24:59 2025 Received: from leonov.paulk.fr (leonov.paulk.fr [185.233.101.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1D7282BE02B; Fri, 4 Jul 2025 15:59:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.233.101.22 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751644768; cv=none; b=kMqevB3GFiZrAxOetlUIdtKM+yvOCPizt1cXPfMbKijEYYfYbQNb1HhzOFUjYimSa7BPGubX1QTtV2sTzX1C43O5Ns0zvpo6ou0ZHVmDfsHDHm7SCL5L3k4nWZ/ZxOfxX4pqvQqEtu3yjjw1b36RsYhGdmVwNMtFXvU6sau39YQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751644768; c=relaxed/simple; bh=QVSeZ6PtbaeDbrhk8YqxchSiZQ1NssifHK0pZD4PtYc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=F+mXKwil7rL5HFci+/M2sbRrhe8PheM6YscoTYVzuflA/wCABjf3XZeGUk3SZQw7RsOhEmTeeCCYWgQNgA+3NL+MbLo5cbs5hdesiV3HvRvzpbnV8wCH/D5/9ObVr8WyQ8J6YqM+7U2nQ/R8cTu/kN2r+FTesVIUvutkcjQrMb8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io; spf=pass smtp.mailfrom=sys-base.io; arc=none smtp.client-ip=185.233.101.22 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sys-base.io Received: from laika.paulk.fr (12.234.24.109.rev.sfr.net [109.24.234.12]) by leonov.paulk.fr (Postfix) with ESMTPS id C62DA1F00056; Fri, 4 Jul 2025 15:59:03 +0000 (UTC) Received: by laika.paulk.fr (Postfix, from userid 65534) id B9533ACA685; Fri, 4 Jul 2025 15:49:18 +0000 (UTC) X-Spam-Level: * Received: from localhost.localdomain (unknown [192.168.1.64]) by laika.paulk.fr (Postfix) with ESMTP id F11FBACA655; Fri, 4 Jul 2025 15:46:34 +0000 (UTC) From: Paul Kocialkowski To: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Cc: Yong Deng , Paul Kocialkowski , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Maxime Ripard , Paul Kocialkowski Subject: [PATCH v8 3/9] clk: sunxi-ng: v3s: Export MBUS and DRAM clocks to the public header Date: Fri, 4 Jul 2025 17:46:20 +0200 Message-ID: <20250704154628.3468793-4-paulk@sys-base.io> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250704154628.3468793-1-paulk@sys-base.io> References: <20250704154628.3468793-1-paulk@sys-base.io> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Paul Kocialkowski In order to declare a mbus node for the v3s, expose its associated clocks to the public header. Signed-off-by: Paul Kocialkowski Reviewed-by: Samuel Holland Acked-by: Rob Herring --- drivers/clk/sunxi-ng/ccu-sun8i-v3s.h | 4 ---- include/dt-bindings/clock/sun8i-v3s-ccu.h | 4 ++-- 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.h b/drivers/clk/sunxi-ng/cc= u-sun8i-v3s.h index 345cdbbab362..c933ef016570 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.h +++ b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.h @@ -39,14 +39,10 @@ =20 /* The first bunch of module clocks are exported */ =20 -#define CLK_DRAM 58 - /* All the DRAM gates are exported */ =20 /* Some more module clocks are exported */ =20 -#define CLK_MBUS 72 - /* And the GPU module clock is exported */ =20 #define CLK_PLL_DDR1 74 diff --git a/include/dt-bindings/clock/sun8i-v3s-ccu.h b/include/dt-binding= s/clock/sun8i-v3s-ccu.h index c4055629c9f9..d635bffd6914 100644 --- a/include/dt-bindings/clock/sun8i-v3s-ccu.h +++ b/include/dt-bindings/clock/sun8i-v3s-ccu.h @@ -87,7 +87,7 @@ #define CLK_SPI0 55 #define CLK_USB_PHY0 56 #define CLK_USB_OHCI0 57 - +#define CLK_DRAM 58 #define CLK_DRAM_VE 59 #define CLK_DRAM_CSI 60 #define CLK_DRAM_EHCI 61 @@ -101,7 +101,7 @@ #define CLK_VE 69 #define CLK_AC_DIG 70 #define CLK_AVS 71 - +#define CLK_MBUS 72 #define CLK_MIPI_CSI 73 =20 /* Clocks not available on V3s */ --=20 2.49.0 From nobody Tue Oct 7 22:24:59 2025 Received: from leonov.paulk.fr (leonov.paulk.fr [185.233.101.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8CD8D3196CA; Fri, 4 Jul 2025 15:59:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.233.101.22 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751644749; cv=none; b=qFsmdteBdAQ+wxnsPAKjxGVMZLza8U8XVSY7O3/YkFo3vyElhXfWRM+SZhVHr5j5RhH4TPs/IprlsZu7e0trXCn5H3WSakq4qmm4G0YI3+R7dEwmw6hnFj4yHPk2Vsg0/tGbsioJxsqtfIvjF8b299hbR8of0Plat9i/aG9pTk4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751644749; c=relaxed/simple; bh=BJu/qu+MScmnB/kg3RgdS3D4V86q3Wnt0q/kJ5vJObs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=OyC44fBfaJIjfD2Xa5TVJRp8ndu2E96r9G5GtuHPKdaYg/9GwhwzNUJdwcHGrWIkSW3VGe5bW7VRsd5k9owDnW5EV8eNJuCJ1FmP2sWcAa840x+m4d83m5wedY9EE7srtBtbI+PPa4JxTH1fG8zOtVOXNs86UJS4d4rxuGHV6EM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io; spf=pass smtp.mailfrom=sys-base.io; arc=none smtp.client-ip=185.233.101.22 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sys-base.io Received: from laika.paulk.fr (12.234.24.109.rev.sfr.net [109.24.234.12]) by leonov.paulk.fr (Postfix) with ESMTPS id AC6601F00059; Fri, 4 Jul 2025 15:58:56 +0000 (UTC) Received: by laika.paulk.fr (Postfix, from userid 65534) id 7F129ACA698; Fri, 4 Jul 2025 15:49:52 +0000 (UTC) X-Spam-Level: * Received: from localhost.localdomain (unknown [192.168.1.64]) by laika.paulk.fr (Postfix) with ESMTP id 7C358ACA656; Fri, 4 Jul 2025 15:46:35 +0000 (UTC) From: Paul Kocialkowski To: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Cc: Yong Deng , Paul Kocialkowski , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Maxime Ripard , Paul Kocialkowski Subject: [PATCH v8 4/9] ARM: dts: sun8i: v3s: Add mbus node to represent the interconnect Date: Fri, 4 Jul 2025 17:46:21 +0200 Message-ID: <20250704154628.3468793-5-paulk@sys-base.io> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250704154628.3468793-1-paulk@sys-base.io> References: <20250704154628.3468793-1-paulk@sys-base.io> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Paul Kocialkowski The V3s uses the mbus interconnect to provide DRAM access for a number of blocks. The SoC can only map 2 GiB of DRAM, which is reflected in the dma-ranges property. Signed-off-by: Paul Kocialkowski Reviewed-by: Samuel Holland --- arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi b/arch/arm/boot/dts= /allwinner/sun8i-v3s.dtsi index fa54510319ac..02d6c62b3874 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi +++ b/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi @@ -629,6 +629,21 @@ int_mii_phy: ethernet-phy@1 { }; }; =20 + mbus: dram-controller@1c62000 { + compatible =3D "allwinner,sun8i-v3s-mbus"; + reg =3D <0x01c62000 0x1000>, + <0x01c63000 0x1000>; + reg-names =3D "mbus", "dram"; + clocks =3D <&ccu CLK_MBUS>, + <&ccu CLK_DRAM>, + <&ccu CLK_BUS_DRAM>; + clock-names =3D "mbus", "dram", "bus"; + #address-cells =3D <1>; + #size-cells =3D <1>; + dma-ranges =3D <0x00000000 0x40000000 0x80000000>; + #interconnect-cells =3D <1>; + }; + spi0: spi@1c68000 { compatible =3D "allwinner,sun8i-h3-spi"; reg =3D <0x01c68000 0x1000>; --=20 2.49.0 From nobody Tue Oct 7 22:24:59 2025 Received: from leonov.paulk.fr (leonov.paulk.fr [185.233.101.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D32A110942; Fri, 4 Jul 2025 15:58:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.233.101.22 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751644737; cv=none; b=Cx5cypBz7BeFBUfJMTnTNYrWIu6kTg4QBgvp1vfFg2wMYeN0UW8PHZopF2ReCtNzPouY+kgFE07za5V1F/b+1m/zr/eVotuhwgUzlaI+hQTQFrKpfdK9Ho6WaNqpRzfdVTLN49hxuAiWJ+jotESOkE2r3wdcK5e76VOE8JCmWOE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751644737; c=relaxed/simple; bh=Nbk7wLUjKq6J0X2SsBVO1EIU0vl1bFOUl6PqsjqzXFk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=dHlPLUyl8Ciy3JsSt2FNg33J4EqZhtQ1uVkV5jvt0UWY8jST/aK8Kme4xPUtJkpb/timnagPnSpDsV9inZ6+dhG4q3/8VJ6+8HxFQgVCmONu0ByxJKk9oaaSXMQQGle9u7bHuPooGcW/7fJVU6XRuAdrb0GERzw+yrJmvhqnlGU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io; spf=pass smtp.mailfrom=sys-base.io; arc=none smtp.client-ip=185.233.101.22 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sys-base.io Received: from laika.paulk.fr (12.234.24.109.rev.sfr.net [109.24.234.12]) by leonov.paulk.fr (Postfix) with ESMTPS id AD8F21F0003D; Fri, 4 Jul 2025 15:58:53 +0000 (UTC) Received: by laika.paulk.fr (Postfix, from userid 65534) id 58433ACA6A1; Fri, 4 Jul 2025 15:50:36 +0000 (UTC) X-Spam-Level: * Received: from localhost.localdomain (unknown [192.168.1.64]) by laika.paulk.fr (Postfix) with ESMTP id E94BAACA657; Fri, 4 Jul 2025 15:46:35 +0000 (UTC) From: Paul Kocialkowski To: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Cc: Yong Deng , Paul Kocialkowski , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Maxime Ripard , Paul Kocialkowski Subject: [PATCH v8 5/9] ARM: dts: sun8i: v3s: Add nodes for MIPI CSI-2 support Date: Fri, 4 Jul 2025 17:46:22 +0200 Message-ID: <20250704154628.3468793-6-paulk@sys-base.io> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250704154628.3468793-1-paulk@sys-base.io> References: <20250704154628.3468793-1-paulk@sys-base.io> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Paul Kocialkowski MIPI CSI-2 is supported on the V3s with an A31-based MIPI CSI-2 bridge controller. The controller uses a separate D-PHY, which is the same that is otherwise used for MIPI DSI, but used in Rx mode. On the V3s, the CSI0 controller is dedicated to MIPI CSI-2 as it does not have access to any parallel interface pins. Add all the necessary nodes (CSI0, MIPI CSI-2 bridge and D-PHY) to support the MIPI CSI-2 interface. Note that a fwnode graph link is created between CSI0 and MIPI CSI-2 even when no sensor is connected. This will result in a probe failure for the controller as long as no sensor is connected but this is fine since no other interface is available. The interconnects property is used to inherit the proper DMA offset. Signed-off-by: Paul Kocialkowski --- arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi | 71 ++++++++++++++++++++++ 1 file changed, 71 insertions(+) diff --git a/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi b/arch/arm/boot/dts= /allwinner/sun8i-v3s.dtsi index 02d6c62b3874..bfe02295f45d 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi +++ b/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi @@ -671,6 +671,77 @@ gic: interrupt-controller@1c81000 { interrupts =3D ; }; =20 + csi0: camera@1cb0000 { + compatible =3D "allwinner,sun8i-v3s-csi"; + reg =3D <0x01cb0000 0x1000>; + interrupts =3D ; + clocks =3D <&ccu CLK_BUS_CSI>, + <&ccu CLK_CSI_SCLK>, + <&ccu CLK_DRAM_CSI>; + clock-names =3D "bus", "mod", "ram"; + resets =3D <&ccu RST_BUS_CSI>; + interconnects =3D <&mbus 5>; + interconnect-names =3D "dma-mem"; + status =3D "disabled"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@1 { + reg =3D <1>; + + csi0_in_mipi_csi2: endpoint { + remote-endpoint =3D <&mipi_csi2_out_csi0>; + }; + }; + }; + }; + + mipi_csi2: csi@1cb1000 { + compatible =3D "allwinner,sun8i-v3s-mipi-csi2", + "allwinner,sun6i-a31-mipi-csi2"; + reg =3D <0x01cb1000 0x1000>; + interrupts =3D ; + clocks =3D <&ccu CLK_BUS_CSI>, + <&ccu CLK_CSI_SCLK>; + clock-names =3D "bus", "mod"; + resets =3D <&ccu RST_BUS_CSI>; + status =3D "disabled"; + + phys =3D <&dphy>; + phy-names =3D "dphy"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + mipi_csi2_in: port@0 { + reg =3D <0>; + }; + + mipi_csi2_out: port@1 { + reg =3D <1>; + + mipi_csi2_out_csi0: endpoint { + remote-endpoint =3D <&csi0_in_mipi_csi2>; + }; + }; + }; + }; + + dphy: d-phy@1cb2000 { + compatible =3D "allwinner,sun6i-a31-mipi-dphy"; + reg =3D <0x01cb2000 0x1000>; + clocks =3D <&ccu CLK_BUS_CSI>, + <&ccu CLK_MIPI_CSI>; + clock-names =3D "bus", "mod"; + resets =3D <&ccu RST_BUS_CSI>; + allwinner,direction =3D "rx"; + status =3D "disabled"; + #phy-cells =3D <0>; + }; + csi1: camera@1cb4000 { compatible =3D "allwinner,sun8i-v3s-csi"; reg =3D <0x01cb4000 0x3000>; --=20 2.49.0 From nobody Tue Oct 7 22:24:59 2025 Received: from leonov.paulk.fr (leonov.paulk.fr [185.233.101.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A540E3271B6; Fri, 4 Jul 2025 15:58:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.233.101.22 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751644741; cv=none; b=S8rIvbH40cAJ2Q05SWGLwxQCjBdMcJWKFTGifvPORfbv/qt3GL7yX0X9dGhe6G/DPjkxgdIbrO5mBaN1t4xT2gfxXHM70HJ7c8MOn1bI59tS3fRHppiuuTX+3ggVRHIyQx4PgVxwVeYNl/Nx8KkbhZ7heooDZbFYFCsRUmcjaQA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751644741; c=relaxed/simple; bh=0LgRCoQI7qyxCqauFlfqpaKjx6CVpwBGKfu0sdnj6Z4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=JBX7T0FsIWeouX5GTQkJdTdD+R5p/3SOoHpFy0Ar2F5WmNEydzSqwnKSj+LC4f81p9mylbaTaa2NVQPUEzGtSDnNdYBsm6L7GNmyouQBOIQrPUy8qGQWT7oIerwtxX8WERVMziQHcT/2UxxS1VEkdDGWAsHHZBaQrqMCOHc3LCI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io; spf=pass smtp.mailfrom=sys-base.io; arc=none smtp.client-ip=185.233.101.22 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sys-base.io Received: from laika.paulk.fr (12.234.24.109.rev.sfr.net [109.24.234.12]) by leonov.paulk.fr (Postfix) with ESMTPS id D740B1F00050; Fri, 4 Jul 2025 15:58:54 +0000 (UTC) Received: by laika.paulk.fr (Postfix, from userid 65534) id 58CE2ACA6AC; Fri, 4 Jul 2025 15:51:19 +0000 (UTC) X-Spam-Level: * Received: from localhost.localdomain (unknown [192.168.1.64]) by laika.paulk.fr (Postfix) with ESMTP id 682FEACA658; Fri, 4 Jul 2025 15:46:40 +0000 (UTC) From: Paul Kocialkowski To: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Cc: Yong Deng , Paul Kocialkowski , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Maxime Ripard , Paul Kocialkowski Subject: [PATCH v8 6/9] ARM: dts: sun8i: v3s: Add support for the ISP Date: Fri, 4 Jul 2025 17:46:23 +0200 Message-ID: <20250704154628.3468793-7-paulk@sys-base.io> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250704154628.3468793-1-paulk@sys-base.io> References: <20250704154628.3468793-1-paulk@sys-base.io> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Paul Kocialkowski The V3s (and related platforms) come with an instance of the A31 ISP. Even though it is very close to the A31 ISP, it is not exactly register-compatible and a dedicated compatible only is used as a result. Just like most other blocks of the camera pipeline, the ISP uses the common CSI bus, module and ram clock as well as reset. A port connection to the ISP is added to CSI0 for convenience since CSI0 serves for MIPI CSI-2 interface support, which is likely to receive raw data that will need to be processed by the ISP to produce a final image. The interconnects property is used to inherit the proper DMA offset. Signed-off-by: Paul Kocialkowski --- arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi b/arch/arm/boot/dts= /allwinner/sun8i-v3s.dtsi index bfe02295f45d..f63534a02706 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi +++ b/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi @@ -695,6 +695,14 @@ csi0_in_mipi_csi2: endpoint { remote-endpoint =3D <&mipi_csi2_out_csi0>; }; }; + + port@2 { + reg =3D <2>; + + csi0_out_isp: endpoint { + remote-endpoint =3D <&isp_in_csi0>; + }; + }; }; }; =20 @@ -753,5 +761,32 @@ csi1: camera@1cb4000 { resets =3D <&ccu RST_BUS_CSI>; status =3D "disabled"; }; + + isp: isp@1cb8000 { + compatible =3D "allwinner,sun8i-v3s-isp"; + reg =3D <0x01cb8000 0x1000>; + interrupts =3D ; + clocks =3D <&ccu CLK_BUS_CSI>, + <&ccu CLK_CSI_SCLK>, + <&ccu CLK_DRAM_CSI>; + clock-names =3D "bus", "mod", "ram"; + resets =3D <&ccu RST_BUS_CSI>; + interconnects =3D <&mbus 5>; + interconnect-names =3D "dma-mem"; + status =3D "disabled"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + isp_in_csi0: endpoint { + remote-endpoint =3D <&csi0_out_isp>; + }; + }; + }; + }; }; }; --=20 2.49.0 From nobody Tue Oct 7 22:24:59 2025 Received: from leonov.paulk.fr (leonov.paulk.fr [185.233.101.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2EE28326228; Fri, 4 Jul 2025 15:59:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.233.101.22 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751644754; cv=none; b=ZXvpXWo/P4WtK5Z2Huukq56IhTRWc8RPu0+0z/oYfL7LA1w1Gs5ZQtzfWyUhgAJ0I2CWt0GFKB2WtqNii+f6a4Gi0YTn/yhE/pTdcWo+m76bPqmElXcQwQrM9bqHFZQTZwW3cVxD/NBpRf+bHrcIbLtz/YFpKbxBM+lf//7o6/I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751644754; c=relaxed/simple; bh=Q78f1QuSFzz5rj+1pXgpOayq9ghe6QXSykrzUaECxnA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=pNwAbVKX6Z9D4e0M3AfoFPWr4d0SQh0PdIWRjR8mFLapn5yra3LTlRL+CqbQKyD5MFx2OiXODb2mLjG7S+qOemgxvCd74Wqnm+Kny5Q9O31VuU6S9B0PpKkTLKH6+aKl00mvGTL4SSC9WIn3OaiJ7+i6Lf1kJ4GS3w5PuIMOBTY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io; spf=pass smtp.mailfrom=sys-base.io; arc=none smtp.client-ip=185.233.101.22 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sys-base.io Received: from laika.paulk.fr (12.234.24.109.rev.sfr.net [109.24.234.12]) by leonov.paulk.fr (Postfix) with ESMTPS id E35AA1F00062; Fri, 4 Jul 2025 15:58:58 +0000 (UTC) Received: by laika.paulk.fr (Postfix, from userid 65534) id 396FEACA6B0; Fri, 4 Jul 2025 15:51:53 +0000 (UTC) X-Spam-Level: * Received: from localhost.localdomain (unknown [192.168.1.64]) by laika.paulk.fr (Postfix) with ESMTP id C5661ACA659; Fri, 4 Jul 2025 15:46:40 +0000 (UTC) From: Paul Kocialkowski To: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Cc: Yong Deng , Paul Kocialkowski , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Maxime Ripard , Paul Kocialkowski Subject: [PATCH v8 7/9] ARM: dts: sun8i: a83t: Add MIPI CSI-2 controller node Date: Fri, 4 Jul 2025 17:46:24 +0200 Message-ID: <20250704154628.3468793-8-paulk@sys-base.io> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250704154628.3468793-1-paulk@sys-base.io> References: <20250704154628.3468793-1-paulk@sys-base.io> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Paul Kocialkowski MIPI CSI-2 is supported on the A83T with a dedicated controller that covers both the protocol and D-PHY. It is connected to the only CSI receiver with a fwnode graph link. Note that the CSI receiver supports both this MIPI CSI-2 source and a parallel source. An empty port with a label for the MIPI CSI-2 sensor input is also defined for convenience. Signed-off-by: Paul Kocialkowski Reviewed-by: Jernej Skrabec --- arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi | 43 +++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi b/arch/arm/boot/dt= s/allwinner/sun8i-a83t.dtsi index 6f88d8764e6a..cc107c6030de 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi @@ -1062,6 +1062,49 @@ csi: camera@1cb0000 { clock-names =3D "bus", "mod", "ram"; resets =3D <&ccu RST_BUS_CSI>; status =3D "disabled"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@1 { + reg =3D <1>; + + csi_in_mipi_csi2: endpoint { + remote-endpoint =3D <&mipi_csi2_out_csi>; + }; + }; + }; + }; + + mipi_csi2: csi@1cb1000 { + compatible =3D "allwinner,sun8i-a83t-mipi-csi2"; + reg =3D <0x01cb1000 0x1000>; + interrupts =3D ; + clocks =3D <&ccu CLK_BUS_CSI>, + <&ccu CLK_CSI_SCLK>, + <&ccu CLK_MIPI_CSI>, + <&ccu CLK_CSI_MISC>; + clock-names =3D "bus", "mod", "mipi", "misc"; + resets =3D <&ccu RST_BUS_CSI>; + status =3D "disabled"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + mipi_csi2_in: port@0 { + reg =3D <0>; + }; + + mipi_csi2_out: port@1 { + reg =3D <1>; + + mipi_csi2_out_csi: endpoint { + remote-endpoint =3D <&csi_in_mipi_csi2>; + }; + }; + }; }; =20 hdmi: hdmi@1ee0000 { --=20 2.49.0 From nobody Tue Oct 7 22:24:59 2025 Received: from leonov.paulk.fr (leonov.paulk.fr [185.233.101.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C8A2230E857; Fri, 4 Jul 2025 15:59:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.233.101.22 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751644762; cv=none; b=BeDaIzhvge9krRON1mOnwKsbhHlKAc1zRp2MYQL1l2UjjwU2SXw6YVA7gSN94i3t8Q5sQajEFgkNNFxx5EK9eoRjyReV6dgbwGLVnMWChx/GkVxkwf9QfVGMEM2x5XCmqokwLxBlQlPQdAD6mHP29gjVnxzS3FxJJ0bnw1CPK1s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751644762; c=relaxed/simple; bh=We8FZlBDtvXYSptcWE/Xb8miHHoFn0yAQv5dy+DzD2w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=stXwFMwNhH5xg+AlVftwx2xASTNXbPlzaH6V1BwQhL86/GIv3ZYExd4F+QGvC7TLBvLsC4TKvLJS2Fz+iRuXIuyZwERm9BpJ5fqNnoJY9CV+Rn/w0vgliTIC7ZYigWXj+XsioDHsyyf9vGzGKmMSiD3T+Xu+HxCciASOykpQaEY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io; spf=pass smtp.mailfrom=sys-base.io; arc=none smtp.client-ip=185.233.101.22 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sys-base.io Received: from laika.paulk.fr (12.234.24.109.rev.sfr.net [109.24.234.12]) by leonov.paulk.fr (Postfix) with ESMTPS id 9C8DD1F0006E; Fri, 4 Jul 2025 15:59:01 +0000 (UTC) Received: by laika.paulk.fr (Postfix, from userid 65534) id 65CC3ACA65D; Fri, 4 Jul 2025 15:52:37 +0000 (UTC) X-Spam-Level: * Received: from localhost.localdomain (unknown [192.168.1.64]) by laika.paulk.fr (Postfix) with ESMTP id AD114ACA65D; Fri, 4 Jul 2025 15:46:45 +0000 (UTC) From: Paul Kocialkowski To: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Cc: Yong Deng , Paul Kocialkowski , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Maxime Ripard , Paul Kocialkowski Subject: [PATCH v8 8/9] ARM: dts: sun8i-a83t: Add BananaPi M3 OV5640 camera overlay Date: Fri, 4 Jul 2025 17:46:25 +0200 Message-ID: <20250704154628.3468793-9-paulk@sys-base.io> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250704154628.3468793-1-paulk@sys-base.io> References: <20250704154628.3468793-1-paulk@sys-base.io> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Paul Kocialkowski Add an overlay supporting the OV5640 from the BananaPi Camera v3 peripheral board. The board has two sensors (OV5640 and OV8865) which cannot be supported in parallel as they share the same reset pin and the kernel currently has no support for this case. Signed-off-by: Paul Kocialkowski --- arch/arm/boot/dts/allwinner/Makefile | 1 + .../sun8i-a83t-bananapi-m3-camera-ov5640.dtso | 117 ++++++++++++++++++ 2 files changed, 118 insertions(+) create mode 100644 arch/arm/boot/dts/allwinner/sun8i-a83t-bananapi-m3-came= ra-ov5640.dtso diff --git a/arch/arm/boot/dts/allwinner/Makefile b/arch/arm/boot/dts/allwi= nner/Makefile index 7318ce6d7fa3..de13da013732 100644 --- a/arch/arm/boot/dts/allwinner/Makefile +++ b/arch/arm/boot/dts/allwinner/Makefile @@ -219,6 +219,7 @@ dtb-$(CONFIG_MACH_SUN8I) +=3D \ sun8i-a33-vstar.dtb \ sun8i-a83t-allwinner-h8homlet-v2.dtb \ sun8i-a83t-bananapi-m3.dtb \ + sun8i-a83t-bananapi-m3-camera-ov5640.dtbo \ sun8i-a83t-cubietruck-plus.dtb \ sun8i-a83t-tbs-a711.dtb \ sun8i-h2-plus-bananapi-m2-zero.dtb \ diff --git a/arch/arm/boot/dts/allwinner/sun8i-a83t-bananapi-m3-camera-ov56= 40.dtso b/arch/arm/boot/dts/allwinner/sun8i-a83t-bananapi-m3-camera-ov5640.= dtso new file mode 100644 index 000000000000..469faf8cd2c4 --- /dev/null +++ b/arch/arm/boot/dts/allwinner/sun8i-a83t-bananapi-m3-camera-ov5640.dtso @@ -0,0 +1,117 @@ +// SPDX-License-Identifier: GPL-2.0 OR X11 +/* + * Copyright 2022 Bootlin + * Author: Paul Kocialkowski + */ + +/dts-v1/; +/plugin/; + +#include +#include + +&{/} { + compatible =3D "sinovoip,bpi-m3"; + + /* + * These regulators actually have DLDO4 tied to their EN pin, which is + * described as input supply here for lack of a better representation. + * Their actual supply is PS, which is always-on. + */ + + ov5640_avdd: ov5640-avdd { + compatible =3D "regulator-fixed"; + regulator-name =3D "ov5640-avdd"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + vin-supply =3D <®_dldo4>; + }; + + ov5640_dovdd: ov5640-dovdd { + compatible =3D "regulator-fixed"; + regulator-name =3D "ov5640-dovdd"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + vin-supply =3D <®_dldo4>; + }; + + ov5640_dvdd: ov5640-dvdd { + compatible =3D "regulator-fixed"; + regulator-name =3D "ov5640-dvdd"; + regulator-min-microvolt =3D <1500000>; + regulator-max-microvolt =3D <1500000>; + vin-supply =3D <®_dldo4>; + }; +}; + +&csi { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&csi_8bit_parallel_pins>; + status =3D "okay"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + csi_in_ov5640: endpoint { + remote-endpoint =3D <&ov5640_out_csi>; + bus-width =3D <8>; + data-shift =3D <2>; + hsync-active =3D <1>; + vsync-active =3D <1>; + pclk-sample =3D <1>; + }; + }; + }; +}; + +&i2c2 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c2_pe_pins>; + status =3D "okay"; + + #address-cells =3D <1>; + #size-cells =3D <0>; + + ov5640: camera@3c { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&csi_mclk_pin>; + + compatible =3D "ovti,ov5640"; + reg =3D <0x3c>; + + clocks =3D <&ccu CLK_CSI_MCLK>; + clock-names =3D "xclk"; + assigned-clocks =3D <&ccu CLK_CSI_MCLK>; + assigned-clock-parents =3D <&osc24M>; + assigned-clock-rates =3D <24000000>; + + AVDD-supply =3D <&ov5640_avdd>; + DOVDD-supply =3D <&ov5640_dovdd>; + DVDD-supply =3D <&ov5640_dvdd>; + + powerdown-gpios =3D <&pio 3 15 GPIO_ACTIVE_HIGH>; /* PD15 */ + reset-gpios =3D <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */ + + rotation =3D <180>; + + port { + ov5640_out_csi: endpoint { + remote-endpoint =3D <&csi_in_ov5640>; + bus-width =3D <8>; + data-shift =3D <2>; + hsync-active =3D <1>;=20 + vsync-active =3D <1>; + pclk-sample =3D <1>; + }; + }; + }; +}; + +®_dldo4 { + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; +}; --=20 2.49.0 From nobody Tue Oct 7 22:24:59 2025 Received: from leonov.paulk.fr (leonov.paulk.fr [185.233.101.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B1BB0221729; Fri, 4 Jul 2025 15:53:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.233.101.22 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751644404; cv=none; b=tqdOrJLZiqvQFZDhXUPVfVbuV1L1mVTsZWhjLQrle6M8Mz60Irg+zjAg9rYdGi+WY2Fths7UALXS3jBK15P4oNwkZQ1ZKmv7Hr1UVP9XQhfeLoSNzzndQIuHjKloBe/9ez3Exft1hE6snF7JiO+B46eUXWrf3z4W/DmEPYPNIdw= ARC-Message-Signature: i=1; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable From: Paul Kocialkowski Add an overlay supporting the OV8865 from the BananaPi Camera v3 peripheral board. The board has two sensors (OV5640 and OV8865) which cannot be supported in parallel as they share the same reset pin and the kernel currently has no support for this case. Signed-off-by: Paul Kocialkowski --- arch/arm/boot/dts/allwinner/Makefile | 1 + .../sun8i-a83t-bananapi-m3-camera-ov8865.dtso | 103 ++++++++++++++++++ 2 files changed, 104 insertions(+) create mode 100644 arch/arm/boot/dts/allwinner/sun8i-a83t-bananapi-m3-came= ra-ov8865.dtso diff --git a/arch/arm/boot/dts/allwinner/Makefile b/arch/arm/boot/dts/allwi= nner/Makefile index de13da013732..6bfa51266445 100644 --- a/arch/arm/boot/dts/allwinner/Makefile +++ b/arch/arm/boot/dts/allwinner/Makefile @@ -220,6 +220,7 @@ dtb-$(CONFIG_MACH_SUN8I) +=3D \ sun8i-a83t-allwinner-h8homlet-v2.dtb \ sun8i-a83t-bananapi-m3.dtb \ sun8i-a83t-bananapi-m3-camera-ov5640.dtbo \ + sun8i-a83t-bananapi-m3-camera-ov8865.dtbo \ sun8i-a83t-cubietruck-plus.dtb \ sun8i-a83t-tbs-a711.dtb \ sun8i-h2-plus-bananapi-m2-zero.dtb \ diff --git a/arch/arm/boot/dts/allwinner/sun8i-a83t-bananapi-m3-camera-ov88= 65.dtso b/arch/arm/boot/dts/allwinner/sun8i-a83t-bananapi-m3-camera-ov8865.= dtso new file mode 100644 index 000000000000..50f965741f4a --- /dev/null +++ b/arch/arm/boot/dts/allwinner/sun8i-a83t-bananapi-m3-camera-ov8865.dtso @@ -0,0 +1,103 @@ +// SPDX-License-Identifier: GPL-2.0 OR X11 +/* + * Copyright 2022 Bootlin + * Author: K=C3=A9vin L'h=C3=B4pital + * Author: Paul Kocialkowski + */ + +/dts-v1/; +/plugin/; + +#include +#include + +&{/} { + compatible =3D "sinovoip,bpi-m3"; + + /* + * These regulators actually have DLDO4 tied to their EN pin, which is + * described as input supply here for lack of a better representation. + * Their actual supply is PS, which is always-on. + */ + + ov8865_avdd: ov8865-avdd { + compatible =3D "regulator-fixed"; + regulator-name =3D "ov8865-avdd"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + vin-supply =3D <®_dldo4>; + }; + + ov8865_dovdd: ov8865-dovdd { + compatible =3D "regulator-fixed"; + regulator-name =3D "ov8865-dovdd"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + vin-supply =3D <®_dldo4>; + }; + + ov8865_dvdd: ov8865-dvdd { + compatible =3D "regulator-fixed"; + regulator-name =3D "ov8865-dvdd"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + vin-supply =3D <®_dldo4>; + }; +}; + +&csi { + status =3D "okay"; +}; + +&i2c2 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c2_pe_pins>; + status =3D "okay"; + + #address-cells =3D <1>; + #size-cells =3D <0>; + + ov8865: camera@36 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&csi_mclk_pin>; + + compatible =3D "ovti,ov8865"; + reg =3D <0x36>; + + clocks =3D <&ccu CLK_CSI_MCLK>; + assigned-clocks =3D <&ccu CLK_CSI_MCLK>; + assigned-clock-parents =3D <&osc24M>; + assigned-clock-rates =3D <24000000>; + + avdd-supply =3D <&ov8865_avdd>; + dovdd-supply =3D <&ov8865_dovdd>; + dvdd-supply =3D <&ov8865_dvdd>; + + powerdown-gpios =3D <&pio 4 17 GPIO_ACTIVE_LOW>; /* PE17 */ + reset-gpios =3D <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */ + + port { + ov8865_out_mipi_csi2: endpoint { + remote-endpoint =3D <&mipi_csi2_in_ov8865>; + link-frequencies =3D /bits/ 64 <360000000>; + data-lanes =3D <1 2 3 4>; + }; + }; + }; +}; + +&mipi_csi2 { + status =3D "okay"; +}; + +&mipi_csi2_in { + mipi_csi2_in_ov8865: endpoint { + remote-endpoint =3D <&ov8865_out_mipi_csi2>; + data-lanes =3D <1 2 3 4>; + }; +}; + +®_dldo4 { + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; +}; --=20 2.49.0