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[2001:14ba:a0c3:3a00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-556383d33f3sm298321e87.68.2025.07.04.09.36.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Jul 2025 09:36:11 -0700 (PDT) From: Dmitry Baryshkov Date: Fri, 04 Jul 2025 19:35:40 +0300 Subject: [PATCH v2 28/28] interconnect: qcom: icc-rpmh: drop support for non-dynamic IDS Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250704-rework-icc-v2-28-875fac996ef5@oss.qualcomm.com> References: <20250704-rework-icc-v2-0-875fac996ef5@oss.qualcomm.com> In-Reply-To: <20250704-rework-icc-v2-0-875fac996ef5@oss.qualcomm.com> To: Georgi Djakov , Bjorn Andersson Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=75057; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=KQJ86D8GRbnXNbA4NpWaKXmc9ZGzczcCFZ788BnLYnA=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBoaALJx7GubMiwCE/I/rerLa5N5tJdUSXL2G2z3 rKL7inIU72JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCaGgCyQAKCRCLPIo+Aiko 1el4B/9PDLYW8xCY5BLJMXGg9H0SJNI4SY9k2ATCsijQY4wCvLGDsQ0QZJYwiBMUYM7Q/6Q9qg7 gNbkXglj/XXOgcTNktMNk4NoIkbA1eFvTSHkUC9jLmKre7lEWl9NG8xIywq5wFbS1V2D9wibpAu 28YrQC0J1bV4EY7aoKj+ErMKxDuNRy1ODmUoE71i1EGL7sLv6ggmyAZgNNLsC7OUYP6rLGoHtSF OAtK+WrIwAsUqdhOpDcyJ8tPZs14E52g8rbIWtSF75z59/2d0VHstKYYglduVYmRbHuqfJQ/fMf +ndttF0h72ZrqITML5pQYSZXxl001EFu6nRb0SOZrVNbTfF8 X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzA0MDEyNiBTYWx0ZWRfXzPgfQjcmGvaJ 1ZD9f3SevpkJtFhn2fjs3hXgbj1KvhLd7jaM0zlB1eORHVsIuklEfy9WnB3j2v5kSaLl+/t1A4n 63bnnKScN3JFXwZvjscTdEpS6haKzL5wlNbZWBjjaGKeKsZ5zdjVXqGiMwL4BQ9LVIZk6nAZBfn jWrrVOfZRJ5ouqM9Vsv0rT41jBrTluzxs+iYuqcE12R6H+qTOlrhuy9aoS1bGXt2H4JjYu2IGLo 5PVoYaamkrd4igNvlQFSzlT7ER9ad/1E7xyleAGFpXz+RLN0RLTRBV9rjNKt1aLlNVBpo3EV4t8 pml1M19Ai9dvsUtQDEuhWO64LIe90cMic2dT8gKze1lKIzKaxAtG77EpOCuof7GbUrkEuw57DIH 9pdFTIkhMp0jxcQFuTZMD574NenLWzHc35Beh00+28gG4jIHhfO17emZI6i65kbKsTwMAryQ X-Proofpoint-GUID: _pKihq_evf8dEAsRWOd_QBfAhTU80YLj X-Proofpoint-ORIG-GUID: _pKihq_evf8dEAsRWOd_QBfAhTU80YLj X-Authority-Analysis: v=2.4 cv=TqPmhCXh c=1 sm=1 tr=0 ts=686802ff cx=c_pps a=50t2pK5VMbmlHzFWWp8p/g==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=Wb1JkmetP80A:10 a=EUspDBNiAAAA:8 a=dRK9c6Vhyr5mXIpLRdwA:9 a=QEXdDO2ut3YA:10 a=IoWCM6iH3mJn3m4BftBB:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.7,FMLib:17.12.80.40 definitions=2025-07-04_06,2025-07-04_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 bulkscore=0 mlxlogscore=999 suspectscore=0 adultscore=0 phishscore=0 malwarescore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 spamscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507040126 Now as all RPMh interconnect drivers were converted to using the dynamic IDs, drop support for non-dynamic ID allocation. Signed-off-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio --- drivers/interconnect/qcom/icc-rpmh.c | 19 +++++-------------- drivers/interconnect/qcom/icc-rpmh.h | 7 ------- drivers/interconnect/qcom/qcs615.c | 9 --------- drivers/interconnect/qcom/qcs8300.c | 13 ------------- drivers/interconnect/qcom/qdu1000.c | 4 ---- drivers/interconnect/qcom/sa8775p.c | 14 -------------- drivers/interconnect/qcom/sar2130p.c | 9 --------- drivers/interconnect/qcom/sc7180.c | 12 ------------ drivers/interconnect/qcom/sc7280.c | 12 ------------ drivers/interconnect/qcom/sc8180x.c | 11 ----------- drivers/interconnect/qcom/sc8280xp.c | 12 ------------ drivers/interconnect/qcom/sdm670.c | 8 -------- drivers/interconnect/qcom/sdm845.c | 8 -------- drivers/interconnect/qcom/sdx55.c | 3 --- drivers/interconnect/qcom/sdx65.c | 3 --- drivers/interconnect/qcom/sdx75.c | 6 ------ drivers/interconnect/qcom/sm6350.c | 10 ---------- drivers/interconnect/qcom/sm7150.c | 10 ---------- drivers/interconnect/qcom/sm8150.c | 10 ---------- drivers/interconnect/qcom/sm8350.c | 10 ---------- drivers/interconnect/qcom/sm8450.c | 11 ----------- drivers/interconnect/qcom/sm8550.c | 14 -------------- drivers/interconnect/qcom/sm8650.c | 14 -------------- drivers/interconnect/qcom/sm8750.c | 14 -------------- drivers/interconnect/qcom/x1e80100.c | 19 ------------------- 25 files changed, 5 insertions(+), 257 deletions(-) diff --git a/drivers/interconnect/qcom/icc-rpmh.c b/drivers/interconnect/qc= om/icc-rpmh.c index 941692cbaf208c66a27dda2e6902b2f26f605840..796fba9fb316cf58ae2eb77af16= 07d6d00c38438 100644 --- a/drivers/interconnect/qcom/icc-rpmh.c +++ b/drivers/interconnect/qcom/icc-rpmh.c @@ -280,14 +280,10 @@ int qcom_icc_rpmh_probe(struct platform_device *pdev) if (!qn) continue; =20 - if (desc->alloc_dyn_id) { - if (!qn->node) - qn->node =3D icc_node_create_dyn(); - node =3D qn->node; - } else { - node =3D icc_node_create(qn->id); - } + if (!qn->node) + qn->node =3D icc_node_create_dyn(); =20 + node =3D qn->node; if (IS_ERR(node)) { ret =3D PTR_ERR(node); goto err_remove_nodes; @@ -302,13 +298,8 @@ int qcom_icc_rpmh_probe(struct platform_device *pdev) node->data =3D qn; icc_node_add(node, provider); =20 - if (desc->alloc_dyn_id) { - for (j =3D 0; qn->link_nodes[j]; j++) - icc_link_nodes(node, &qn->link_nodes[j]->node); - } else { - for (j =3D 0; j < qn->num_links; j++) - icc_link_create(node, qn->links[j]); - } + for (j =3D 0; qn->link_nodes[j]; j++) + icc_link_nodes(node, &qn->link_nodes[j]->node); =20 data->nodes[i] =3D node; } diff --git a/drivers/interconnect/qcom/icc-rpmh.h b/drivers/interconnect/qc= om/icc-rpmh.h index 742941a296ac0a2e3d3e7147c25f750965a36647..5eb76da081df024e1f84069ce54= f5da5fbb19699 100644 --- a/drivers/interconnect/qcom/icc-rpmh.h +++ b/drivers/interconnect/qcom/icc-rpmh.h @@ -81,10 +81,7 @@ struct qcom_icc_qosbox { /** * struct qcom_icc_node - Qualcomm specific interconnect nodes * @name: the node name used in debugfs - * @links: an array of nodes where we can go next while traversing - * @id: a unique node identifier * @node: icc_node associated with this node - * @num_links: the total number of @links * @channels: num of channels at this node * @buswidth: width of the interconnect between a node and the bus * @sum_avg: current sum aggregate value of all avg bw requests @@ -96,10 +93,7 @@ struct qcom_icc_qosbox { */ struct qcom_icc_node { const char *name; - u16 links[MAX_LINKS]; - u16 id; struct icc_node *node; - u16 num_links; u16 channels; u16 buswidth; u64 sum_avg[QCOM_ICC_NUM_BUCKETS]; @@ -156,7 +150,6 @@ struct qcom_icc_desc { struct qcom_icc_bcm * const *bcms; size_t num_bcms; bool qos_requires_clocks; - bool alloc_dyn_id; }; =20 int qcom_icc_aggregate(struct icc_node *node, u32 tag, u32 avg_bw, diff --git a/drivers/interconnect/qcom/qcs615.c b/drivers/interconnect/qcom= /qcs615.c index 4fc58de384e9dec2364d78e89630ef61d0338155..bb9c9c0b6fe5b0c402fd9b8cda3= ee392839287cb 100644 --- a/drivers/interconnect/qcom/qcs615.c +++ b/drivers/interconnect/qcom/qcs615.c @@ -1194,7 +1194,6 @@ static struct qcom_icc_node * const aggre1_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc qcs615_aggre1_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), .bcms =3D aggre1_noc_bcms, @@ -1213,7 +1212,6 @@ static struct qcom_icc_node * const camnoc_virt_nodes= [] =3D { }; =20 static const struct qcom_icc_desc qcs615_camnoc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D camnoc_virt_nodes, .num_nodes =3D ARRAY_SIZE(camnoc_virt_nodes), .bcms =3D camnoc_virt_bcms, @@ -1272,7 +1270,6 @@ static struct qcom_icc_node * const config_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc qcs615_config_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), .bcms =3D config_noc_bcms, @@ -1286,7 +1283,6 @@ static struct qcom_icc_node * const dc_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc qcs615_dc_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D dc_noc_nodes, .num_nodes =3D ARRAY_SIZE(dc_noc_nodes), }; @@ -1316,7 +1312,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc qcs615_gem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, @@ -1333,7 +1328,6 @@ static struct qcom_icc_node * const ipa_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc qcs615_ipa_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D ipa_virt_nodes, .num_nodes =3D ARRAY_SIZE(ipa_virt_nodes), .bcms =3D ipa_virt_bcms, @@ -1351,7 +1345,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc qcs615_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -1380,7 +1373,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc qcs615_mmss_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, @@ -1423,7 +1415,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc qcs615_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/qcs8300.c b/drivers/interconnect/qco= m/qcs8300.c index ebe9a2eab554bcb199497e4efbfbebeec3bb2c53..d490f8dc1d0120b46d474dae4f7= cb9c603aba57f 100644 --- a/drivers/interconnect/qcom/qcs8300.c +++ b/drivers/interconnect/qcom/qcs8300.c @@ -1582,7 +1582,6 @@ static struct qcom_icc_node * const aggre1_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc qcs8300_aggre1_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), .bcms =3D aggre1_noc_bcms, @@ -1608,7 +1607,6 @@ static struct qcom_icc_node * const aggre2_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc qcs8300_aggre2_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), .bcms =3D aggre2_noc_bcms, @@ -1631,7 +1629,6 @@ static struct qcom_icc_node * const clk_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc qcs8300_clk_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D clk_virt_nodes, .num_nodes =3D ARRAY_SIZE(clk_virt_nodes), .bcms =3D clk_virt_bcms, @@ -1726,7 +1723,6 @@ static struct qcom_icc_node * const config_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc qcs8300_config_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), .bcms =3D config_noc_bcms, @@ -1740,7 +1736,6 @@ static struct qcom_icc_node * const dc_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc qcs8300_dc_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D dc_noc_nodes, .num_nodes =3D ARRAY_SIZE(dc_noc_nodes), }; @@ -1774,7 +1769,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc qcs8300_gem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, @@ -1792,7 +1786,6 @@ static struct qcom_icc_node * const gpdsp_anoc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc qcs8300_gpdsp_anoc =3D { - .alloc_dyn_id =3D true, .nodes =3D gpdsp_anoc_nodes, .num_nodes =3D ARRAY_SIZE(gpdsp_anoc_nodes), .bcms =3D gpdsp_anoc_bcms, @@ -1816,7 +1809,6 @@ static struct qcom_icc_node * const lpass_ag_noc_node= s[] =3D { }; =20 static const struct qcom_icc_desc qcs8300_lpass_ag_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D lpass_ag_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_ag_noc_nodes), .bcms =3D lpass_ag_noc_bcms, @@ -1834,7 +1826,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc qcs8300_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -1864,7 +1855,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc qcs8300_mmss_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, @@ -1885,7 +1875,6 @@ static struct qcom_icc_node * const nspa_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc qcs8300_nspa_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D nspa_noc_nodes, .num_nodes =3D ARRAY_SIZE(nspa_noc_nodes), .bcms =3D nspa_noc_bcms, @@ -1903,7 +1892,6 @@ static struct qcom_icc_node * const pcie_anoc_nodes[]= =3D { }; =20 static const struct qcom_icc_desc qcs8300_pcie_anoc =3D { - .alloc_dyn_id =3D true, .nodes =3D pcie_anoc_nodes, .num_nodes =3D ARRAY_SIZE(pcie_anoc_nodes), .bcms =3D pcie_anoc_bcms, @@ -1932,7 +1920,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc qcs8300_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/qdu1000.c b/drivers/interconnect/qco= m/qdu1000.c index 6bd7b16f8129758eca38ed9d348ac745226897dd..0e2f3b19de405989ca60019e6aa= bc9352cc1c607 100644 --- a/drivers/interconnect/qcom/qdu1000.c +++ b/drivers/interconnect/qcom/qdu1000.c @@ -816,7 +816,6 @@ static struct qcom_icc_node * const clk_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc qdu1000_clk_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D clk_virt_nodes, .num_nodes =3D ARRAY_SIZE(clk_virt_nodes), .bcms =3D clk_virt_bcms, @@ -844,7 +843,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] =3D= { }; =20 static const struct qcom_icc_desc qdu1000_gem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, @@ -862,7 +860,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] =3D= { }; =20 static const struct qcom_icc_desc qdu1000_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -949,7 +946,6 @@ static struct qcom_icc_node * const system_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc qdu1000_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/sa8775p.c b/drivers/interconnect/qco= m/sa8775p.c index a7049eb22d1e064afea17812637b720f907de90e..910116bc8b3a7a15f5906473af7= 018777b122afc 100644 --- a/drivers/interconnect/qcom/sa8775p.c +++ b/drivers/interconnect/qcom/sa8775p.c @@ -1820,7 +1820,6 @@ static const struct qcom_icc_desc sa8775p_aggre1_noc = =3D { .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), .bcms =3D aggre1_noc_bcms, .num_bcms =3D ARRAY_SIZE(aggre1_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const aggre2_noc_bcms[] =3D { @@ -1848,7 +1847,6 @@ static const struct qcom_icc_desc sa8775p_aggre2_noc = =3D { .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), .bcms =3D aggre2_noc_bcms, .num_bcms =3D ARRAY_SIZE(aggre2_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const clk_virt_bcms[] =3D { @@ -1873,7 +1871,6 @@ static const struct qcom_icc_desc sa8775p_clk_virt = =3D { .num_nodes =3D ARRAY_SIZE(clk_virt_nodes), .bcms =3D clk_virt_bcms, .num_bcms =3D ARRAY_SIZE(clk_virt_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const config_noc_bcms[] =3D { @@ -1979,7 +1976,6 @@ static const struct qcom_icc_desc sa8775p_config_noc = =3D { .num_nodes =3D ARRAY_SIZE(config_noc_nodes), .bcms =3D config_noc_bcms, .num_bcms =3D ARRAY_SIZE(config_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const dc_noc_bcms[] =3D { @@ -1996,7 +1992,6 @@ static const struct qcom_icc_desc sa8775p_dc_noc =3D { .num_nodes =3D ARRAY_SIZE(dc_noc_nodes), .bcms =3D dc_noc_bcms, .num_bcms =3D ARRAY_SIZE(dc_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const gem_noc_bcms[] =3D { @@ -2033,7 +2028,6 @@ static const struct qcom_icc_desc sa8775p_gem_noc =3D= { .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, .num_bcms =3D ARRAY_SIZE(gem_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const gpdsp_anoc_bcms[] =3D { @@ -2052,7 +2046,6 @@ static const struct qcom_icc_desc sa8775p_gpdsp_anoc = =3D { .num_nodes =3D ARRAY_SIZE(gpdsp_anoc_nodes), .bcms =3D gpdsp_anoc_bcms, .num_bcms =3D ARRAY_SIZE(gpdsp_anoc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const lpass_ag_noc_bcms[] =3D { @@ -2076,7 +2069,6 @@ static const struct qcom_icc_desc sa8775p_lpass_ag_no= c =3D { .num_nodes =3D ARRAY_SIZE(lpass_ag_noc_nodes), .bcms =3D lpass_ag_noc_bcms, .num_bcms =3D ARRAY_SIZE(lpass_ag_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const mc_virt_bcms[] =3D { @@ -2094,7 +2086,6 @@ static const struct qcom_icc_desc sa8775p_mc_virt =3D= { .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, .num_bcms =3D ARRAY_SIZE(mc_virt_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const mmss_noc_bcms[] =3D { @@ -2127,7 +2118,6 @@ static const struct qcom_icc_desc sa8775p_mmss_noc = =3D { .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, .num_bcms =3D ARRAY_SIZE(mmss_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const nspa_noc_bcms[] =3D { @@ -2148,7 +2138,6 @@ static const struct qcom_icc_desc sa8775p_nspa_noc = =3D { .num_nodes =3D ARRAY_SIZE(nspa_noc_nodes), .bcms =3D nspa_noc_bcms, .num_bcms =3D ARRAY_SIZE(nspa_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const nspb_noc_bcms[] =3D { @@ -2169,7 +2158,6 @@ static const struct qcom_icc_desc sa8775p_nspb_noc = =3D { .num_nodes =3D ARRAY_SIZE(nspb_noc_nodes), .bcms =3D nspb_noc_bcms, .num_bcms =3D ARRAY_SIZE(nspb_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const pcie_anoc_bcms[] =3D { @@ -2187,7 +2175,6 @@ static const struct qcom_icc_desc sa8775p_pcie_anoc = =3D { .num_nodes =3D ARRAY_SIZE(pcie_anoc_nodes), .bcms =3D pcie_anoc_bcms, .num_bcms =3D ARRAY_SIZE(pcie_anoc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const system_noc_bcms[] =3D { @@ -2216,7 +2203,6 @@ static const struct qcom_icc_desc sa8775p_system_noc = =3D { .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, .num_bcms =3D ARRAY_SIZE(system_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static const struct of_device_id qnoc_of_match[] =3D { diff --git a/drivers/interconnect/qcom/sar2130p.c b/drivers/interconnect/qc= om/sar2130p.c index df9bd10ffe0589f135a0c6199162b7f33233598f..cb978aae8c8cc1f333eaa91e727= 7e437fd788acd 100644 --- a/drivers/interconnect/qcom/sar2130p.c +++ b/drivers/interconnect/qcom/sar2130p.c @@ -1447,7 +1447,6 @@ static struct qcom_icc_node * const clk_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sar2130p_clk_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D clk_virt_nodes, .num_nodes =3D ARRAY_SIZE(clk_virt_nodes), .bcms =3D clk_virt_bcms, @@ -1510,7 +1509,6 @@ static struct qcom_icc_node * const config_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sar2130p_config_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), @@ -1541,7 +1539,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sar2130p_gem_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), @@ -1565,7 +1562,6 @@ static struct qcom_icc_node * const lpass_ag_noc_node= s[] =3D { }; =20 static const struct qcom_icc_desc sar2130p_lpass_ag_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D lpass_ag_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_ag_noc_nodes), @@ -1584,7 +1580,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sar2130p_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -1613,7 +1608,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sar2130p_mmss_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), @@ -1633,7 +1627,6 @@ static struct qcom_icc_node * const nsp_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sar2130p_nsp_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D nsp_noc_nodes, .num_nodes =3D ARRAY_SIZE(nsp_noc_nodes), @@ -1652,7 +1645,6 @@ static struct qcom_icc_node * const pcie_anoc_nodes[]= =3D { }; =20 static const struct qcom_icc_desc sar2130p_pcie_anoc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D pcie_anoc_nodes, .num_nodes =3D ARRAY_SIZE(pcie_anoc_nodes), @@ -1692,7 +1684,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sar2130p_system_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), diff --git a/drivers/interconnect/qcom/sc7180.c b/drivers/interconnect/qcom= /sc7180.c index 2d9099e909bb9fbc9b82370e488d014391324637..9c2ae0056183918ccc2aa3f55be= 7febc6f254628 100644 --- a/drivers/interconnect/qcom/sc7180.c +++ b/drivers/interconnect/qcom/sc7180.c @@ -1449,7 +1449,6 @@ static struct qcom_icc_node * const aggre1_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sc7180_aggre1_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), .bcms =3D aggre1_noc_bcms, @@ -1473,7 +1472,6 @@ static struct qcom_icc_node * const aggre2_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sc7180_aggre2_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), .bcms =3D aggre2_noc_bcms, @@ -1492,7 +1490,6 @@ static struct qcom_icc_node * const camnoc_virt_nodes= [] =3D { }; =20 static const struct qcom_icc_desc sc7180_camnoc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D camnoc_virt_nodes, .num_nodes =3D ARRAY_SIZE(camnoc_virt_nodes), .bcms =3D camnoc_virt_bcms, @@ -1512,7 +1509,6 @@ static struct qcom_icc_node * const compute_noc_nodes= [] =3D { }; =20 static const struct qcom_icc_desc sc7180_compute_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D compute_noc_nodes, .num_nodes =3D ARRAY_SIZE(compute_noc_nodes), .bcms =3D compute_noc_bcms, @@ -1581,7 +1577,6 @@ static struct qcom_icc_node * const config_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sc7180_config_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), .bcms =3D config_noc_bcms, @@ -1595,7 +1590,6 @@ static struct qcom_icc_node * const dc_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sc7180_dc_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D dc_noc_nodes, .num_nodes =3D ARRAY_SIZE(dc_noc_nodes), }; @@ -1624,7 +1618,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sc7180_gem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, @@ -1642,7 +1635,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sc7180_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -1670,7 +1662,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sc7180_mmss_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, @@ -1692,7 +1683,6 @@ static struct qcom_icc_node * const npu_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sc7180_npu_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D npu_noc_nodes, .num_nodes =3D ARRAY_SIZE(npu_noc_nodes), }; @@ -1709,7 +1699,6 @@ static struct qcom_icc_node * const qup_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sc7180_qup_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D qup_virt_nodes, .num_nodes =3D ARRAY_SIZE(qup_virt_nodes), .bcms =3D qup_virt_bcms, @@ -1745,7 +1734,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sc7180_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/sc7280.c b/drivers/interconnect/qcom= /sc7280.c index c39e79d82b482ae3e35b292fe1a2d4cfc911d969..1ca2e8f55d6fcb0bc8818848a92= 9c25ffe102427 100644 --- a/drivers/interconnect/qcom/sc7280.c +++ b/drivers/interconnect/qcom/sc7280.c @@ -1585,7 +1585,6 @@ static const struct regmap_config sc7280_aggre1_noc_r= egmap_config =3D { }; =20 static const struct qcom_icc_desc sc7280_aggre1_noc =3D { - .alloc_dyn_id =3D true, .config =3D &sc7280_aggre1_noc_regmap_config, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), @@ -1618,7 +1617,6 @@ static struct qcom_icc_node * const aggre2_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sc7280_aggre2_noc =3D { - .alloc_dyn_id =3D true, .config =3D &sc7280_aggre2_noc_regmap_config, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), @@ -1640,7 +1638,6 @@ static struct qcom_icc_node * const clk_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sc7280_clk_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D clk_virt_nodes, .num_nodes =3D ARRAY_SIZE(clk_virt_nodes), .bcms =3D clk_virt_bcms, @@ -1711,7 +1708,6 @@ static const struct regmap_config sc7280_cnoc2_regmap= _config =3D { }; =20 static const struct qcom_icc_desc sc7280_cnoc2 =3D { - .alloc_dyn_id =3D true, .config =3D &sc7280_cnoc2_regmap_config, .nodes =3D cnoc2_nodes, .num_nodes =3D ARRAY_SIZE(cnoc2_nodes), @@ -1753,7 +1749,6 @@ static const struct regmap_config sc7280_cnoc3_regmap= _config =3D { }; =20 static const struct qcom_icc_desc sc7280_cnoc3 =3D { - .alloc_dyn_id =3D true, .config =3D &sc7280_cnoc3_regmap_config, .nodes =3D cnoc3_nodes, .num_nodes =3D ARRAY_SIZE(cnoc3_nodes), @@ -1779,7 +1774,6 @@ static const struct regmap_config sc7280_dc_noc_regma= p_config =3D { }; =20 static const struct qcom_icc_desc sc7280_dc_noc =3D { - .alloc_dyn_id =3D true, .config =3D &sc7280_dc_noc_regmap_config, .nodes =3D dc_noc_nodes, .num_nodes =3D ARRAY_SIZE(dc_noc_nodes), @@ -1825,7 +1819,6 @@ static const struct regmap_config sc7280_gem_noc_regm= ap_config =3D { }; =20 static const struct qcom_icc_desc sc7280_gem_noc =3D { - .alloc_dyn_id =3D true, .config =3D &sc7280_gem_noc_regmap_config, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), @@ -1855,7 +1848,6 @@ static const struct regmap_config sc7280_lpass_ag_noc= _regmap_config =3D { }; =20 static const struct qcom_icc_desc sc7280_lpass_ag_noc =3D { - .alloc_dyn_id =3D true, .config =3D &sc7280_lpass_ag_noc_regmap_config, .nodes =3D lpass_ag_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_ag_noc_nodes), @@ -1882,7 +1874,6 @@ static const struct regmap_config sc7280_mc_virt_regm= ap_config =3D { }; =20 static const struct qcom_icc_desc sc7280_mc_virt =3D { - .alloc_dyn_id =3D true, .config =3D &sc7280_mc_virt_regmap_config, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), @@ -1919,7 +1910,6 @@ static const struct regmap_config sc7280_mmss_noc_reg= map_config =3D { }; =20 static const struct qcom_icc_desc sc7280_mmss_noc =3D { - .alloc_dyn_id =3D true, .config =3D &sc7280_mmss_noc_regmap_config, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), @@ -1948,7 +1938,6 @@ static const struct regmap_config sc7280_nsp_noc_regm= ap_config =3D { }; =20 static const struct qcom_icc_desc sc7280_nsp_noc =3D { - .alloc_dyn_id =3D true, .config =3D &sc7280_nsp_noc_regmap_config, .nodes =3D nsp_noc_nodes, .num_nodes =3D ARRAY_SIZE(nsp_noc_nodes), @@ -1983,7 +1972,6 @@ static const struct regmap_config sc7280_system_noc_r= egmap_config =3D { }; =20 static const struct qcom_icc_desc sc7280_system_noc =3D { - .alloc_dyn_id =3D true, .config =3D &sc7280_system_noc_regmap_config, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), diff --git a/drivers/interconnect/qcom/sc8180x.c b/drivers/interconnect/qco= m/sc8180x.c index e68bc35b691276375349585ac03b279e30568c68..5a04126994b4e8bb5501ffb313d= 96e7794d3e096 100644 --- a/drivers/interconnect/qcom/sc8180x.c +++ b/drivers/interconnect/qcom/sc8180x.c @@ -1761,7 +1761,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sc8180x_aggre1_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), .bcms =3D aggre1_noc_bcms, @@ -1769,7 +1768,6 @@ static const struct qcom_icc_desc sc8180x_aggre1_noc = =3D { }; =20 static const struct qcom_icc_desc sc8180x_aggre2_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), .bcms =3D aggre2_noc_bcms, @@ -1777,7 +1775,6 @@ static const struct qcom_icc_desc sc8180x_aggre2_noc = =3D { }; =20 static const struct qcom_icc_desc sc8180x_camnoc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D camnoc_virt_nodes, .num_nodes =3D ARRAY_SIZE(camnoc_virt_nodes), .bcms =3D camnoc_virt_bcms, @@ -1785,7 +1782,6 @@ static const struct qcom_icc_desc sc8180x_camnoc_virt= =3D { }; =20 static const struct qcom_icc_desc sc8180x_compute_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D compute_noc_nodes, .num_nodes =3D ARRAY_SIZE(compute_noc_nodes), .bcms =3D compute_noc_bcms, @@ -1793,7 +1789,6 @@ static const struct qcom_icc_desc sc8180x_compute_noc= =3D { }; =20 static const struct qcom_icc_desc sc8180x_config_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), .bcms =3D config_noc_bcms, @@ -1801,13 +1796,11 @@ static const struct qcom_icc_desc sc8180x_config_no= c =3D { }; =20 static const struct qcom_icc_desc sc8180x_dc_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D dc_noc_nodes, .num_nodes =3D ARRAY_SIZE(dc_noc_nodes), }; =20 static const struct qcom_icc_desc sc8180x_gem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, @@ -1815,7 +1808,6 @@ static const struct qcom_icc_desc sc8180x_gem_noc = =3D { }; =20 static const struct qcom_icc_desc sc8180x_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -1823,7 +1815,6 @@ static const struct qcom_icc_desc sc8180x_mc_virt = =3D { }; =20 static const struct qcom_icc_desc sc8180x_mmss_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, @@ -1831,7 +1822,6 @@ static const struct qcom_icc_desc sc8180x_mmss_noc = =3D { }; =20 static const struct qcom_icc_desc sc8180x_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, @@ -1852,7 +1842,6 @@ static struct qcom_icc_node * const qup_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sc8180x_qup_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D qup_virt_nodes, .num_nodes =3D ARRAY_SIZE(qup_virt_nodes), .bcms =3D qup_virt_bcms, diff --git a/drivers/interconnect/qcom/sc8280xp.c b/drivers/interconnect/qc= om/sc8280xp.c index d9fd67ae6258d66ab3e78e06863a5a42da3ac131..2c0f760edee725f5cb0a9de8eb0= 3308c0f98c854 100644 --- a/drivers/interconnect/qcom/sc8280xp.c +++ b/drivers/interconnect/qcom/sc8280xp.c @@ -1957,7 +1957,6 @@ static struct qcom_icc_node * const aggre1_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sc8280xp_aggre1_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), .bcms =3D aggre1_noc_bcms, @@ -1994,7 +1993,6 @@ static struct qcom_icc_node * const aggre2_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sc8280xp_aggre2_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), .bcms =3D aggre2_noc_bcms, @@ -2017,7 +2015,6 @@ static struct qcom_icc_node * const clk_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sc8280xp_clk_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D clk_virt_nodes, .num_nodes =3D ARRAY_SIZE(clk_virt_nodes), .bcms =3D clk_virt_bcms, @@ -2122,7 +2119,6 @@ static struct qcom_icc_node * const config_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sc8280xp_config_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), .bcms =3D config_noc_bcms, @@ -2139,7 +2135,6 @@ static struct qcom_icc_node * const dc_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sc8280xp_dc_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D dc_noc_nodes, .num_nodes =3D ARRAY_SIZE(dc_noc_nodes), .bcms =3D dc_noc_bcms, @@ -2174,7 +2169,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sc8280xp_gem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, @@ -2198,7 +2192,6 @@ static struct qcom_icc_node * const lpass_ag_noc_node= s[] =3D { }; =20 static const struct qcom_icc_desc sc8280xp_lpass_ag_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D lpass_ag_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_ag_noc_nodes), .bcms =3D lpass_ag_noc_bcms, @@ -2216,7 +2209,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sc8280xp_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -2248,7 +2240,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sc8280xp_mmss_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, @@ -2269,7 +2260,6 @@ static struct qcom_icc_node * const nspa_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sc8280xp_nspa_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D nspa_noc_nodes, .num_nodes =3D ARRAY_SIZE(nspa_noc_nodes), .bcms =3D nspa_noc_bcms, @@ -2290,7 +2280,6 @@ static struct qcom_icc_node * const nspb_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sc8280xp_nspb_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D nspb_noc_nodes, .num_nodes =3D ARRAY_SIZE(nspb_noc_nodes), .bcms =3D nspb_noc_bcms, @@ -2320,7 +2309,6 @@ static struct qcom_icc_node * const system_noc_main_n= odes[] =3D { }; =20 static const struct qcom_icc_desc sc8280xp_system_noc_main =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_main_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_main_nodes), .bcms =3D system_noc_main_bcms, diff --git a/drivers/interconnect/qcom/sdm670.c b/drivers/interconnect/qcom= /sdm670.c index d1aa6e3532821659d06373c4082cc6bd77e420ab..6bf641c95d85f0049cf3b69a187= 8b18d6921c255 100644 --- a/drivers/interconnect/qcom/sdm670.c +++ b/drivers/interconnect/qcom/sdm670.c @@ -1222,7 +1222,6 @@ static struct qcom_icc_node * const aggre1_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sdm670_aggre1_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), .bcms =3D aggre1_noc_bcms, @@ -1249,7 +1248,6 @@ static struct qcom_icc_node * const aggre2_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sdm670_aggre2_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), .bcms =3D aggre2_noc_bcms, @@ -1305,7 +1303,6 @@ static struct qcom_icc_node * const config_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sdm670_config_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), .bcms =3D config_noc_bcms, @@ -1322,7 +1319,6 @@ static struct qcom_icc_node * const dc_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sdm670_dc_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D dc_noc_nodes, .num_nodes =3D ARRAY_SIZE(dc_noc_nodes), .bcms =3D dc_noc_bcms, @@ -1341,7 +1337,6 @@ static struct qcom_icc_node * const gladiator_noc_nod= es[] =3D { }; =20 static const struct qcom_icc_desc sdm670_gladiator_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gladiator_noc_nodes, .num_nodes =3D ARRAY_SIZE(gladiator_noc_nodes), .bcms =3D gladiator_noc_bcms, @@ -1377,7 +1372,6 @@ static struct qcom_icc_node * const mem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sdm670_mem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mem_noc_nodes, .num_nodes =3D ARRAY_SIZE(mem_noc_nodes), .bcms =3D mem_noc_bcms, @@ -1408,7 +1402,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sdm670_mmss_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, @@ -1453,7 +1446,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sdm670_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/sdm845.c b/drivers/interconnect/qcom= /sdm845.c index b37de30a9e8f309510818e2619aab2c451f50fe0..8d77e6d00fe03c7b13f932e6f71= 36336535eaa21 100644 --- a/drivers/interconnect/qcom/sdm845.c +++ b/drivers/interconnect/qcom/sdm845.c @@ -1464,7 +1464,6 @@ static struct qcom_icc_node * const aggre1_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sdm845_aggre1_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), .bcms =3D aggre1_noc_bcms, @@ -1494,7 +1493,6 @@ static struct qcom_icc_node * const aggre2_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sdm845_aggre2_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), .bcms =3D aggre2_noc_bcms, @@ -1556,7 +1554,6 @@ static struct qcom_icc_node * const config_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sdm845_config_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), .bcms =3D config_noc_bcms, @@ -1573,7 +1570,6 @@ static struct qcom_icc_node * const dc_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sdm845_dc_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D dc_noc_nodes, .num_nodes =3D ARRAY_SIZE(dc_noc_nodes), .bcms =3D dc_noc_bcms, @@ -1592,7 +1588,6 @@ static struct qcom_icc_node * const gladiator_noc_nod= es[] =3D { }; =20 static const struct qcom_icc_desc sdm845_gladiator_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gladiator_noc_nodes, .num_nodes =3D ARRAY_SIZE(gladiator_noc_nodes), .bcms =3D gladiator_noc_bcms, @@ -1628,7 +1623,6 @@ static struct qcom_icc_node * const mem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sdm845_mem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mem_noc_nodes, .num_nodes =3D ARRAY_SIZE(mem_noc_nodes), .bcms =3D mem_noc_bcms, @@ -1663,7 +1657,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sdm845_mmss_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, @@ -1710,7 +1703,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sdm845_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/sdx55.c b/drivers/interconnect/qcom/= sdx55.c index 5d85c1e6ec58d3949b30c143440bb6dd0779a605..350fbfbfcba5fae70d2f4e9ecf2= d2f064d7adbd0 100644 --- a/drivers/interconnect/qcom/sdx55.c +++ b/drivers/interconnect/qcom/sdx55.c @@ -766,7 +766,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] =3D= { }; =20 static const struct qcom_icc_desc sdx55_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -789,7 +788,6 @@ static struct qcom_icc_node * const mem_noc_nodes[] =3D= { }; =20 static const struct qcom_icc_desc sdx55_mem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mem_noc_nodes, .num_nodes =3D ARRAY_SIZE(mem_noc_nodes), .bcms =3D mem_noc_bcms, @@ -869,7 +867,6 @@ static struct qcom_icc_node * const system_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sdx55_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/sdx65.c b/drivers/interconnect/qcom/= sdx65.c index 267eeeec0e655e13c9643c432139f4b94542d959..a8aaab3fc3eaacfc717f9cb2a98= bc854e7721311 100644 --- a/drivers/interconnect/qcom/sdx65.c +++ b/drivers/interconnect/qcom/sdx65.c @@ -751,7 +751,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] =3D= { }; =20 static const struct qcom_icc_desc sdx65_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -774,7 +773,6 @@ static struct qcom_icc_node * const mem_noc_nodes[] =3D= { }; =20 static const struct qcom_icc_desc sdx65_mem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mem_noc_nodes, .num_nodes =3D ARRAY_SIZE(mem_noc_nodes), .bcms =3D mem_noc_bcms, @@ -851,7 +849,6 @@ static struct qcom_icc_node * const system_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sdx65_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/sdx75.c b/drivers/interconnect/qcom/= sdx75.c index bfd0ec87f68020ea1e832c405237d29054117f70..49d0a14512e9edf5bc5a9524dc7= 0d24485b4389f 100644 --- a/drivers/interconnect/qcom/sdx75.c +++ b/drivers/interconnect/qcom/sdx75.c @@ -854,7 +854,6 @@ static struct qcom_icc_node * const clk_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sdx75_clk_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D clk_virt_nodes, .num_nodes =3D ARRAY_SIZE(clk_virt_nodes), .bcms =3D clk_virt_bcms, @@ -870,7 +869,6 @@ static struct qcom_icc_node * const dc_noc_nodes[] =3D { }; =20 static const struct qcom_icc_desc sdx75_dc_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D dc_noc_nodes, .num_nodes =3D ARRAY_SIZE(dc_noc_nodes), }; @@ -897,7 +895,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] =3D= { }; =20 static const struct qcom_icc_desc sdx75_gem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, @@ -914,7 +911,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] =3D= { }; =20 static const struct qcom_icc_desc sdx75_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -934,7 +930,6 @@ static struct qcom_icc_node * const pcie_anoc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sdx75_pcie_anoc =3D { - .alloc_dyn_id =3D true, .nodes =3D pcie_anoc_nodes, .num_nodes =3D ARRAY_SIZE(pcie_anoc_nodes), .bcms =3D pcie_anoc_bcms, @@ -1013,7 +1008,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sdx75_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/sm6350.c b/drivers/interconnect/qcom= /sm6350.c index 92a33c307c960157bf537bc5fe28b0348fbb9918..b1df16edff9d71ab2b7284e1a97= e6f15bcb1f887 100644 --- a/drivers/interconnect/qcom/sm6350.c +++ b/drivers/interconnect/qcom/sm6350.c @@ -1360,7 +1360,6 @@ static struct qcom_icc_node * const aggre1_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm6350_aggre1_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), .bcms =3D aggre1_noc_bcms, @@ -1386,7 +1385,6 @@ static struct qcom_icc_node * const aggre2_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm6350_aggre2_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), .bcms =3D aggre2_noc_bcms, @@ -1414,7 +1412,6 @@ static struct qcom_icc_node * const clk_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm6350_clk_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D clk_virt_nodes, .num_nodes =3D ARRAY_SIZE(clk_virt_nodes), .bcms =3D clk_virt_bcms, @@ -1434,7 +1431,6 @@ static struct qcom_icc_node * const compute_noc_nodes= [] =3D { }; =20 static const struct qcom_icc_desc sm6350_compute_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D compute_noc_nodes, .num_nodes =3D ARRAY_SIZE(compute_noc_nodes), .bcms =3D compute_noc_bcms, @@ -1495,7 +1491,6 @@ static struct qcom_icc_node * const config_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm6350_config_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), .bcms =3D config_noc_bcms, @@ -1512,7 +1507,6 @@ static struct qcom_icc_node * const dc_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm6350_dc_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D dc_noc_nodes, .num_nodes =3D ARRAY_SIZE(dc_noc_nodes), .bcms =3D dc_noc_bcms, @@ -1544,7 +1538,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm6350_gem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, @@ -1572,7 +1565,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm6350_mmss_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, @@ -1597,7 +1589,6 @@ static struct qcom_icc_node * const npu_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm6350_npu_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D npu_noc_nodes, .num_nodes =3D ARRAY_SIZE(npu_noc_nodes), .bcms =3D npu_noc_bcms, @@ -1634,7 +1625,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm6350_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/sm7150.c b/drivers/interconnect/qcom= /sm7150.c index 5e2b77f3e1d2245ded149add1548e603a1358295..9857c86f2e45a7e62307e9b6f74= fbd6e2c95b6f2 100644 --- a/drivers/interconnect/qcom/sm7150.c +++ b/drivers/interconnect/qcom/sm7150.c @@ -1384,7 +1384,6 @@ static struct qcom_icc_node * const aggre1_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm7150_aggre1_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), .bcms =3D aggre1_noc_bcms, @@ -1414,7 +1413,6 @@ static struct qcom_icc_node * const aggre2_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm7150_aggre2_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), .bcms =3D aggre2_noc_bcms, @@ -1434,7 +1432,6 @@ static struct qcom_icc_node * const camnoc_virt_nodes= [] =3D { }; =20 static const struct qcom_icc_desc sm7150_camnoc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D camnoc_virt_nodes, .num_nodes =3D ARRAY_SIZE(camnoc_virt_nodes), .bcms =3D camnoc_virt_bcms, @@ -1452,7 +1449,6 @@ static struct qcom_icc_node * const compute_noc_nodes= [] =3D { }; =20 static const struct qcom_icc_desc sm7150_compute_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D compute_noc_nodes, .num_nodes =3D ARRAY_SIZE(compute_noc_nodes), .bcms =3D compute_noc_bcms, @@ -1518,7 +1514,6 @@ static struct qcom_icc_node * const config_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm7150_config_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), .bcms =3D config_noc_bcms, @@ -1535,7 +1530,6 @@ static struct qcom_icc_node * const dc_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm7150_dc_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D dc_noc_nodes, .num_nodes =3D ARRAY_SIZE(dc_noc_nodes), .bcms =3D dc_noc_bcms, @@ -1567,7 +1561,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm7150_gem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, @@ -1585,7 +1578,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm7150_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -1617,7 +1609,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm7150_mmss_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, @@ -1654,7 +1645,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm7150_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/sm8150.c b/drivers/interconnect/qcom= /sm8150.c index a545e780cacd77b0e8834c879d62c1fc1b3a433d..75093a2704fed883b9ea1d2ece6= b01e469d2658c 100644 --- a/drivers/interconnect/qcom/sm8150.c +++ b/drivers/interconnect/qcom/sm8150.c @@ -1494,7 +1494,6 @@ static struct qcom_icc_node * const aggre1_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8150_aggre1_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), .bcms =3D aggre1_noc_bcms, @@ -1530,7 +1529,6 @@ static struct qcom_icc_node * const aggre2_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8150_aggre2_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), .bcms =3D aggre2_noc_bcms, @@ -1549,7 +1547,6 @@ static struct qcom_icc_node * const camnoc_virt_nodes= [] =3D { }; =20 static const struct qcom_icc_desc sm8150_camnoc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D camnoc_virt_nodes, .num_nodes =3D ARRAY_SIZE(camnoc_virt_nodes), .bcms =3D camnoc_virt_bcms, @@ -1567,7 +1564,6 @@ static struct qcom_icc_node * const compute_noc_nodes= [] =3D { }; =20 static const struct qcom_icc_desc sm8150_compute_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D compute_noc_nodes, .num_nodes =3D ARRAY_SIZE(compute_noc_nodes), .bcms =3D compute_noc_bcms, @@ -1636,7 +1632,6 @@ static struct qcom_icc_node * const config_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8150_config_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), .bcms =3D config_noc_bcms, @@ -1653,7 +1648,6 @@ static struct qcom_icc_node * const dc_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8150_dc_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D dc_noc_nodes, .num_nodes =3D ARRAY_SIZE(dc_noc_nodes), .bcms =3D dc_noc_bcms, @@ -1689,7 +1683,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8150_gem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, @@ -1707,7 +1700,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8150_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -1738,7 +1730,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8150_mmss_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, @@ -1780,7 +1771,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8150_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/sm8350.c b/drivers/interconnect/qcom= /sm8350.c index d268bb68b18cd7e9b06bd060f905b4f22e565e5e..be5a1752b81388549143796f2b4= d103a11034090 100644 --- a/drivers/interconnect/qcom/sm8350.c +++ b/drivers/interconnect/qcom/sm8350.c @@ -1484,7 +1484,6 @@ static struct qcom_icc_node * const aggre1_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8350_aggre1_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), .bcms =3D aggre1_noc_bcms, @@ -1516,7 +1515,6 @@ static struct qcom_icc_node * const aggre2_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8350_aggre2_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), .bcms =3D aggre2_noc_bcms, @@ -1596,7 +1594,6 @@ static struct qcom_icc_node * const config_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8350_config_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), .bcms =3D config_noc_bcms, @@ -1613,7 +1610,6 @@ static struct qcom_icc_node * const dc_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8350_dc_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D dc_noc_nodes, .num_nodes =3D ARRAY_SIZE(dc_noc_nodes), .bcms =3D dc_noc_bcms, @@ -1650,7 +1646,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8350_gem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, @@ -1671,7 +1666,6 @@ static struct qcom_icc_node * const lpass_ag_noc_node= s[] =3D { }; =20 static const struct qcom_icc_desc sm8350_lpass_ag_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D lpass_ag_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_ag_noc_nodes), .bcms =3D lpass_ag_noc_bcms, @@ -1689,7 +1683,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8350_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -1720,7 +1713,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8350_mmss_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, @@ -1740,7 +1732,6 @@ static struct qcom_icc_node * const nsp_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8350_compute_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D nsp_noc_nodes, .num_nodes =3D ARRAY_SIZE(nsp_noc_nodes), .bcms =3D nsp_noc_bcms, @@ -1766,7 +1757,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8350_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/sm8450.c b/drivers/interconnect/qcom= /sm8450.c index eb3c2bb5499da9aaa6cd84b14d3917ab5e119a5f..fdec76e242574d096f834b252ac= 8bf65f0050d5c 100644 --- a/drivers/interconnect/qcom/sm8450.c +++ b/drivers/interconnect/qcom/sm8450.c @@ -1442,7 +1442,6 @@ static struct qcom_icc_node * const aggre1_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8450_aggre1_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), .bcms =3D aggre1_noc_bcms, @@ -1470,7 +1469,6 @@ static struct qcom_icc_node * const aggre2_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8450_aggre2_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), .bcms =3D aggre2_noc_bcms, @@ -1493,7 +1491,6 @@ static struct qcom_icc_node * const clk_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8450_clk_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D clk_virt_nodes, .num_nodes =3D ARRAY_SIZE(clk_virt_nodes), .bcms =3D clk_virt_bcms, @@ -1563,7 +1560,6 @@ static struct qcom_icc_node * const config_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8450_config_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), .bcms =3D config_noc_bcms, @@ -1599,7 +1595,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8450_gem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, @@ -1622,7 +1617,6 @@ static struct qcom_icc_node * const lpass_ag_noc_node= s[] =3D { }; =20 static const struct qcom_icc_desc sm8450_lpass_ag_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D lpass_ag_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_ag_noc_nodes), .bcms =3D lpass_ag_noc_bcms, @@ -1644,7 +1638,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8450_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -1680,7 +1673,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8450_mmss_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, @@ -1699,7 +1691,6 @@ static struct qcom_icc_node * const nsp_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8450_nsp_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D nsp_noc_nodes, .num_nodes =3D ARRAY_SIZE(nsp_noc_nodes), .bcms =3D nsp_noc_bcms, @@ -1719,7 +1710,6 @@ static struct qcom_icc_node * const pcie_anoc_nodes[]= =3D { }; =20 static const struct qcom_icc_desc sm8450_pcie_anoc =3D { - .alloc_dyn_id =3D true, .nodes =3D pcie_anoc_nodes, .num_nodes =3D ARRAY_SIZE(pcie_anoc_nodes), .bcms =3D pcie_anoc_bcms, @@ -1748,7 +1738,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8450_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/sm8550.c b/drivers/interconnect/qcom= /sm8550.c index 8e3993c189685693d75e184bbaad5692bef6375c..4fad11c369dfce113a2aca65ac7= ec694158efde1 100644 --- a/drivers/interconnect/qcom/sm8550.c +++ b/drivers/interconnect/qcom/sm8550.c @@ -1207,7 +1207,6 @@ static struct qcom_icc_node * const aggre1_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8550_aggre1_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), .bcms =3D aggre1_noc_bcms, @@ -1231,7 +1230,6 @@ static struct qcom_icc_node * const aggre2_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8550_aggre2_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), .bcms =3D aggre2_noc_bcms, @@ -1254,7 +1252,6 @@ static struct qcom_icc_node * const clk_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8550_clk_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D clk_virt_nodes, .num_nodes =3D ARRAY_SIZE(clk_virt_nodes), .bcms =3D clk_virt_bcms, @@ -1315,7 +1312,6 @@ static struct qcom_icc_node * const config_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8550_config_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), .bcms =3D config_noc_bcms, @@ -1340,7 +1336,6 @@ static struct qcom_icc_node * const cnoc_main_nodes[]= =3D { }; =20 static const struct qcom_icc_desc sm8550_cnoc_main =3D { - .alloc_dyn_id =3D true, .nodes =3D cnoc_main_nodes, .num_nodes =3D ARRAY_SIZE(cnoc_main_nodes), .bcms =3D cnoc_main_bcms, @@ -1371,7 +1366,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8550_gem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, @@ -1387,7 +1381,6 @@ static struct qcom_icc_node * const lpass_ag_noc_node= s[] =3D { }; =20 static const struct qcom_icc_desc sm8550_lpass_ag_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D lpass_ag_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_ag_noc_nodes), .bcms =3D lpass_ag_noc_bcms, @@ -1404,7 +1397,6 @@ static struct qcom_icc_node * const lpass_lpiaon_noc_= nodes[] =3D { }; =20 static const struct qcom_icc_desc sm8550_lpass_lpiaon_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D lpass_lpiaon_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_lpiaon_noc_nodes), .bcms =3D lpass_lpiaon_noc_bcms, @@ -1420,7 +1412,6 @@ static struct qcom_icc_node * const lpass_lpicx_noc_n= odes[] =3D { }; =20 static const struct qcom_icc_desc sm8550_lpass_lpicx_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D lpass_lpicx_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_lpicx_noc_nodes), .bcms =3D lpass_lpicx_noc_bcms, @@ -1438,7 +1429,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8550_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -1467,7 +1457,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8550_mmss_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, @@ -1484,7 +1473,6 @@ static struct qcom_icc_node * const nsp_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8550_nsp_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D nsp_noc_nodes, .num_nodes =3D ARRAY_SIZE(nsp_noc_nodes), .bcms =3D nsp_noc_bcms, @@ -1504,7 +1492,6 @@ static struct qcom_icc_node * const pcie_anoc_nodes[]= =3D { }; =20 static const struct qcom_icc_desc sm8550_pcie_anoc =3D { - .alloc_dyn_id =3D true, .nodes =3D pcie_anoc_nodes, .num_nodes =3D ARRAY_SIZE(pcie_anoc_nodes), .bcms =3D pcie_anoc_bcms, @@ -1528,7 +1515,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8550_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/sm8650.c b/drivers/interconnect/qcom= /sm8650.c index 48b1f9c5e988bebc78f1a724f78664f49e7c1aaa..5282b8ac1658a7933ae5d528c2b= 88a72d67cbf8b 100644 --- a/drivers/interconnect/qcom/sm8650.c +++ b/drivers/interconnect/qcom/sm8650.c @@ -1567,7 +1567,6 @@ static struct qcom_icc_node * const aggre1_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8650_aggre1_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), @@ -1590,7 +1589,6 @@ static struct qcom_icc_node * const aggre2_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8650_aggre2_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), @@ -1614,7 +1612,6 @@ static struct qcom_icc_node * const clk_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8650_clk_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D clk_virt_nodes, .num_nodes =3D ARRAY_SIZE(clk_virt_nodes), .bcms =3D clk_virt_bcms, @@ -1676,7 +1673,6 @@ static struct qcom_icc_node * const config_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8650_config_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), @@ -1705,7 +1701,6 @@ static struct qcom_icc_node * const cnoc_main_nodes[]= =3D { }; =20 static const struct qcom_icc_desc sm8650_cnoc_main =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D cnoc_main_nodes, .num_nodes =3D ARRAY_SIZE(cnoc_main_nodes), @@ -1739,7 +1734,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8650_gem_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), @@ -1753,7 +1747,6 @@ static struct qcom_icc_node * const lpass_ag_noc_node= s[] =3D { }; =20 static const struct qcom_icc_desc sm8650_lpass_ag_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D lpass_ag_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_ag_noc_nodes), @@ -1769,7 +1762,6 @@ static struct qcom_icc_node * const lpass_lpiaon_noc_= nodes[] =3D { }; =20 static const struct qcom_icc_desc sm8650_lpass_lpiaon_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D lpass_lpiaon_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_lpiaon_noc_nodes), @@ -1783,7 +1775,6 @@ static struct qcom_icc_node * const lpass_lpicx_noc_n= odes[] =3D { }; =20 static const struct qcom_icc_desc sm8650_lpass_lpicx_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D lpass_lpicx_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_lpicx_noc_nodes), @@ -1800,7 +1791,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8650_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -1829,7 +1819,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8650_mmss_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), @@ -1847,7 +1836,6 @@ static struct qcom_icc_node * const nsp_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8650_nsp_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D nsp_noc_nodes, .num_nodes =3D ARRAY_SIZE(nsp_noc_nodes), @@ -1868,7 +1856,6 @@ static struct qcom_icc_node * const pcie_anoc_nodes[]= =3D { }; =20 static const struct qcom_icc_desc sm8650_pcie_anoc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D pcie_anoc_nodes, .num_nodes =3D ARRAY_SIZE(pcie_anoc_nodes), @@ -1890,7 +1877,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8650_system_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), diff --git a/drivers/interconnect/qcom/sm8750.c b/drivers/interconnect/qcom= /sm8750.c index 0c9b39ea4f9ec970112f2a9117d16e70a6f41c93..e2605b68bb2c05c6d1170f9fc38= 7c5a3f4c30335 100644 --- a/drivers/interconnect/qcom/sm8750.c +++ b/drivers/interconnect/qcom/sm8750.c @@ -1155,7 +1155,6 @@ static struct qcom_icc_node * const aggre1_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8750_aggre1_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), }; @@ -1178,7 +1177,6 @@ static struct qcom_icc_node * const aggre2_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8750_aggre2_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), .bcms =3D aggre2_noc_bcms, @@ -1201,7 +1199,6 @@ static struct qcom_icc_node * const clk_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8750_clk_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D clk_virt_nodes, .num_nodes =3D ARRAY_SIZE(clk_virt_nodes), .bcms =3D clk_virt_bcms, @@ -1251,7 +1248,6 @@ static struct qcom_icc_node * const config_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8750_config_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), .bcms =3D config_noc_bcms, @@ -1281,7 +1277,6 @@ static struct qcom_icc_node * const cnoc_main_nodes[]= =3D { }; =20 static const struct qcom_icc_desc sm8750_cnoc_main =3D { - .alloc_dyn_id =3D true, .nodes =3D cnoc_main_nodes, .num_nodes =3D ARRAY_SIZE(cnoc_main_nodes), .bcms =3D cnoc_main_bcms, @@ -1315,7 +1310,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8750_gem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, @@ -1328,7 +1322,6 @@ static struct qcom_icc_node * const lpass_ag_noc_node= s[] =3D { }; =20 static const struct qcom_icc_desc sm8750_lpass_ag_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D lpass_ag_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_ag_noc_nodes), }; @@ -1343,7 +1336,6 @@ static struct qcom_icc_node * const lpass_lpiaon_noc_= nodes[] =3D { }; =20 static const struct qcom_icc_desc sm8750_lpass_lpiaon_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D lpass_lpiaon_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_lpiaon_noc_nodes), .bcms =3D lpass_lpiaon_noc_bcms, @@ -1356,7 +1348,6 @@ static struct qcom_icc_node * const lpass_lpicx_noc_n= odes[] =3D { }; =20 static const struct qcom_icc_desc sm8750_lpass_lpicx_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D lpass_lpicx_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_lpicx_noc_nodes), }; @@ -1372,7 +1363,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8750_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -1402,7 +1392,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8750_mmss_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, @@ -1419,7 +1408,6 @@ static struct qcom_icc_node * const nsp_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8750_nsp_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D nsp_noc_nodes, .num_nodes =3D ARRAY_SIZE(nsp_noc_nodes), .bcms =3D nsp_noc_bcms, @@ -1438,7 +1426,6 @@ static struct qcom_icc_node * const pcie_anoc_nodes[]= =3D { }; =20 static const struct qcom_icc_desc sm8750_pcie_anoc =3D { - .alloc_dyn_id =3D true, .nodes =3D pcie_anoc_nodes, .num_nodes =3D ARRAY_SIZE(pcie_anoc_nodes), .bcms =3D pcie_anoc_bcms, @@ -1458,7 +1445,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8750_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/x1e80100.c b/drivers/interconnect/qc= om/x1e80100.c index 8f2a912f403a48826a9ee89df57933f746e4bed6..a4b18f1905dcfe5d7fb59d5a004= 4624921417f44 100644 --- a/drivers/interconnect/qcom/x1e80100.c +++ b/drivers/interconnect/qcom/x1e80100.c @@ -1424,7 +1424,6 @@ static struct qcom_icc_node * const aggre1_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc x1e80100_aggre1_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), .bcms =3D aggre1_noc_bcms, @@ -1447,7 +1446,6 @@ static struct qcom_icc_node * const aggre2_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc x1e80100_aggre2_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), .bcms =3D aggre2_noc_bcms, @@ -1470,7 +1468,6 @@ static struct qcom_icc_node * const clk_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc x1e80100_clk_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D clk_virt_nodes, .num_nodes =3D ARRAY_SIZE(clk_virt_nodes), .bcms =3D clk_virt_bcms, @@ -1534,7 +1531,6 @@ static struct qcom_icc_node * const cnoc_cfg_nodes[] = =3D { }; =20 static const struct qcom_icc_desc x1e80100_cnoc_cfg =3D { - .alloc_dyn_id =3D true, .nodes =3D cnoc_cfg_nodes, .num_nodes =3D ARRAY_SIZE(cnoc_cfg_nodes), .bcms =3D cnoc_cfg_bcms, @@ -1565,7 +1561,6 @@ static struct qcom_icc_node * const cnoc_main_nodes[]= =3D { }; =20 static const struct qcom_icc_desc x1e80100_cnoc_main =3D { - .alloc_dyn_id =3D true, .nodes =3D cnoc_main_nodes, .num_nodes =3D ARRAY_SIZE(cnoc_main_nodes), .bcms =3D cnoc_main_bcms, @@ -1596,7 +1591,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc x1e80100_gem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, @@ -1612,7 +1606,6 @@ static struct qcom_icc_node * const lpass_ag_noc_node= s[] =3D { }; =20 static const struct qcom_icc_desc x1e80100_lpass_ag_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D lpass_ag_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_ag_noc_nodes), .bcms =3D lpass_ag_noc_bcms, @@ -1629,7 +1622,6 @@ static struct qcom_icc_node * const lpass_lpiaon_noc_= nodes[] =3D { }; =20 static const struct qcom_icc_desc x1e80100_lpass_lpiaon_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D lpass_lpiaon_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_lpiaon_noc_nodes), .bcms =3D lpass_lpiaon_noc_bcms, @@ -1645,7 +1637,6 @@ static struct qcom_icc_node * const lpass_lpicx_noc_n= odes[] =3D { }; =20 static const struct qcom_icc_desc x1e80100_lpass_lpicx_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D lpass_lpicx_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_lpicx_noc_nodes), .bcms =3D lpass_lpicx_noc_bcms, @@ -1663,7 +1654,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc x1e80100_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -1692,7 +1682,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc x1e80100_mmss_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, @@ -1709,7 +1698,6 @@ static struct qcom_icc_node * const nsp_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc x1e80100_nsp_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D nsp_noc_nodes, .num_nodes =3D ARRAY_SIZE(nsp_noc_nodes), .bcms =3D nsp_noc_bcms, @@ -1727,7 +1715,6 @@ static struct qcom_icc_node * const pcie_center_anoc_= nodes[] =3D { }; =20 static const struct qcom_icc_desc x1e80100_pcie_center_anoc =3D { - .alloc_dyn_id =3D true, .nodes =3D pcie_center_anoc_nodes, .num_nodes =3D ARRAY_SIZE(pcie_center_anoc_nodes), .bcms =3D pcie_center_anoc_bcms, @@ -1745,7 +1732,6 @@ static struct qcom_icc_node * const pcie_north_anoc_n= odes[] =3D { }; =20 static const struct qcom_icc_desc x1e80100_pcie_north_anoc =3D { - .alloc_dyn_id =3D true, .nodes =3D pcie_north_anoc_nodes, .num_nodes =3D ARRAY_SIZE(pcie_north_anoc_nodes), .bcms =3D pcie_north_anoc_bcms, @@ -1765,7 +1751,6 @@ static struct qcom_icc_node * const pcie_south_anoc_n= odes[] =3D { }; =20 static const struct qcom_icc_desc x1e80100_pcie_south_anoc =3D { - .alloc_dyn_id =3D true, .nodes =3D pcie_south_anoc_nodes, .num_nodes =3D ARRAY_SIZE(pcie_south_anoc_nodes), .bcms =3D pcie_south_anoc_bcms, @@ -1788,7 +1773,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc x1e80100_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, @@ -1805,7 +1789,6 @@ static struct qcom_icc_node * const usb_center_anoc_n= odes[] =3D { }; =20 static const struct qcom_icc_desc x1e80100_usb_center_anoc =3D { - .alloc_dyn_id =3D true, .nodes =3D usb_center_anoc_nodes, .num_nodes =3D ARRAY_SIZE(usb_center_anoc_nodes), .bcms =3D usb_center_anoc_bcms, @@ -1822,7 +1805,6 @@ static struct qcom_icc_node * const usb_north_anoc_no= des[] =3D { }; =20 static const struct qcom_icc_desc x1e80100_usb_north_anoc =3D { - .alloc_dyn_id =3D true, .nodes =3D usb_north_anoc_nodes, .num_nodes =3D ARRAY_SIZE(usb_north_anoc_nodes), .bcms =3D usb_north_anoc_bcms, @@ -1843,7 +1825,6 @@ static struct qcom_icc_node * const usb_south_anoc_no= des[] =3D { }; =20 static const struct qcom_icc_desc x1e80100_usb_south_anoc =3D { - .alloc_dyn_id =3D true, .nodes =3D usb_south_anoc_nodes, .num_nodes =3D ARRAY_SIZE(usb_south_anoc_nodes), .bcms =3D usb_south_anoc_bcms, --=20 2.39.5