From nobody Tue Oct 7 22:50:49 2025 Received: from mx08-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3BC0C2BEC2C; Fri, 4 Jul 2025 08:42:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.207.212.93 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751618526; cv=none; b=QQXXjIiAyNMF8KDPV1W1CqQm8OSoqCD+6T4DAemypDjalXgGC14stZOPZB8wYRMOF2svXi7NX/Xuq2lgk2GPnkkORMNgC/v6gQ+nXhiBdQDoq4C07cZeSQjAMz1RUin+lGHq5FYre+4VKXcUgjhFIpIDqexswB2dTmLheX4jaqM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751618526; c=relaxed/simple; bh=spBMOw57GDSLk2vF/Vu9cw2CDWTQFCvyfJMk6teynhA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=cYqCI8VgFKjc7Vkr/ORK2Ldi4/RXHYul1YMxt2AosbCweOwdFw9Ezli2oENJSxvZAOzn8j1yd4PmOp9vQp+MFJ5uJvvfTuiFJnogH6EqgD9/zvFHYK+lGIFLV5qc8/3hwKzdAqgZS1bKh5Fxnn7SMS8gUgdRUpxRqQMuue5C5ds= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com; spf=pass smtp.mailfrom=foss.st.com; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b=CX/LaQsN; arc=none smtp.client-ip=91.207.212.93 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=foss.st.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b="CX/LaQsN" Received: from pps.filterd (m0369457.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 5647Zr9v012099; Fri, 4 Jul 2025 10:41:40 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= T+nHIjk3CgnMjH/o8M23MKc/+/PyZ7sJdxyhMJ6Ka/4=; b=CX/LaQsNge428SQj SuztwM9Qwozyfyw8KguWd1ub3aZz2cbTXYSNNNXO9/W03fLBqUuZ74B+L0LULcWh BhTPeD8q6DJFC+5q+if76n4b8CMbvgxlXb5/Pfc5iWxLz7BAbdZVKmGQ9YOZbeG/ SvtrJcpO5mcxgi9/EELSdQzT3tqXYWCUQAjB66/QxlKdVwfmKG/pjz0lVJgY2nzB HObByf9fx46mgcPv4BhILZhggZ/WfQF9etpJPN5Llb67kT3OjmpZa7qBcxgpQtRG 5j50phFMt0qHuI067V/HAWLh+RjzWkiJzrYabWsNPIkfeNMWfHaliv4G3fghn4H0 Si/xcg== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 47jubp8w0e-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 04 Jul 2025 10:41:40 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 995604004F; Fri, 4 Jul 2025 10:40:31 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 4336847F9B2; Fri, 4 Jul 2025 10:39:37 +0200 (CEST) Received: from localhost (10.48.86.185) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 4 Jul 2025 10:39:36 +0200 From: =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= Date: Fri, 4 Jul 2025 10:39:14 +0200 Subject: [PATCH v4 1/3] i2c: stm32: fix the device used for the DMA map Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20250704-i2c-upstream-v4-1-84a095a2c728@foss.st.com> References: <20250704-i2c-upstream-v4-0-84a095a2c728@foss.st.com> In-Reply-To: <20250704-i2c-upstream-v4-0-84a095a2c728@foss.st.com> To: Pierre-Yves MORDRET , Alain Volmat , Andi Shyti , "Maxime Coquelin" , Alexandre Torgue , Sumit Semwal , =?utf-8?q?Christian_K=C3=B6nig?= , "M'boumba Cedric Madianga" , Wolfram Sang CC: Pierre-Yves MORDRET , , , , , , , , =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= X-Mailer: b4 0.15-dev-7616d X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.7,FMLib:17.12.80.40 definitions=2025-07-04_03,2025-07-02_04,2025-03-28_01 If the DMA mapping failed, it produced an error log with the wrong device name: "stm32-dma3 40400000.dma-controller: rejecting DMA map of vmalloc memory" Fix this issue by replacing the dev with the I2C dev. Fixes: bb8822cbbc53 ("i2c: i2c-stm32: Add generic DMA API") Acked-by: Alain Volmat Signed-off-by: Cl=C3=A9ment Le Goffic --- drivers/i2c/busses/i2c-stm32.c | 8 +++----- drivers/i2c/busses/i2c-stm32f7.c | 4 ++-- 2 files changed, 5 insertions(+), 7 deletions(-) diff --git a/drivers/i2c/busses/i2c-stm32.c b/drivers/i2c/busses/i2c-stm32.c index 157c64e27d0b..f84ec056e36d 100644 --- a/drivers/i2c/busses/i2c-stm32.c +++ b/drivers/i2c/busses/i2c-stm32.c @@ -102,7 +102,6 @@ int stm32_i2c_prep_dma_xfer(struct device *dev, struct = stm32_i2c_dma *dma, void *dma_async_param) { struct dma_async_tx_descriptor *txdesc; - struct device *chan_dev; int ret; =20 if (rd_wr) { @@ -116,11 +115,10 @@ int stm32_i2c_prep_dma_xfer(struct device *dev, struc= t stm32_i2c_dma *dma, } =20 dma->dma_len =3D len; - chan_dev =3D dma->chan_using->device->dev; =20 - dma->dma_buf =3D dma_map_single(chan_dev, buf, dma->dma_len, + dma->dma_buf =3D dma_map_single(dev, buf, dma->dma_len, dma->dma_data_dir); - if (dma_mapping_error(chan_dev, dma->dma_buf)) { + if (dma_mapping_error(dev, dma->dma_buf)) { dev_err(dev, "DMA mapping failed\n"); return -EINVAL; } @@ -150,7 +148,7 @@ int stm32_i2c_prep_dma_xfer(struct device *dev, struct = stm32_i2c_dma *dma, return 0; =20 err: - dma_unmap_single(chan_dev, dma->dma_buf, dma->dma_len, + dma_unmap_single(dev, dma->dma_buf, dma->dma_len, dma->dma_data_dir); return ret; } diff --git a/drivers/i2c/busses/i2c-stm32f7.c b/drivers/i2c/busses/i2c-stm3= 2f7.c index e4aaeb2262d0..817d081460c2 100644 --- a/drivers/i2c/busses/i2c-stm32f7.c +++ b/drivers/i2c/busses/i2c-stm32f7.c @@ -741,10 +741,10 @@ static void stm32f7_i2c_dma_callback(void *arg) { struct stm32f7_i2c_dev *i2c_dev =3D (struct stm32f7_i2c_dev *)arg; struct stm32_i2c_dma *dma =3D i2c_dev->dma; - struct device *dev =3D dma->chan_using->device->dev; =20 stm32f7_i2c_disable_dma_req(i2c_dev); - dma_unmap_single(dev, dma->dma_buf, dma->dma_len, dma->dma_data_dir); + dma_unmap_single(i2c_dev->dev, dma->dma_buf, dma->dma_len, + dma->dma_data_dir); complete(&dma->dma_complete); } =20 --=20 2.43.0 From nobody Tue Oct 7 22:50:49 2025 Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 75B8B2D9EF9; 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Fri, 04 Jul 2025 10:41:46 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 99C2840051; Fri, 4 Jul 2025 10:40:31 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 022ED483149; Fri, 4 Jul 2025 10:39:38 +0200 (CEST) Received: from localhost (10.48.86.185) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 4 Jul 2025 10:39:37 +0200 From: =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= Date: Fri, 4 Jul 2025 10:39:15 +0200 Subject: [PATCH v4 2/3] i2c: stm32f7: unmap DMA mapped buffer Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20250704-i2c-upstream-v4-2-84a095a2c728@foss.st.com> References: <20250704-i2c-upstream-v4-0-84a095a2c728@foss.st.com> In-Reply-To: <20250704-i2c-upstream-v4-0-84a095a2c728@foss.st.com> To: Pierre-Yves MORDRET , Alain Volmat , Andi Shyti , "Maxime Coquelin" , Alexandre Torgue , Sumit Semwal , =?utf-8?q?Christian_K=C3=B6nig?= , "M'boumba Cedric Madianga" , Wolfram Sang CC: Pierre-Yves MORDRET , , , , , , , , =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= X-Mailer: b4 0.15-dev-7616d X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.7,FMLib:17.12.80.40 definitions=2025-07-04_03,2025-07-02_04,2025-03-28_01 Before each I2C transfer using DMA, the I2C buffer is DMA'pped to make sure the memory buffer is DMA'able. This is handle in the function `stm32_i2c_prep_dma_xfer()`. If the transfer fails for any reason the I2C buffer must be unmap. Use the dma_callback to factorize the code and fix this issue. Note that the `stm32f7_i2c_dma_callback()` is now called in case of DMA transfer success and error and that the `complete()` on the dma_complete completion structure is done inconditionnally in case of transfer success or error as well as the `dmaengine_terminate_async()`. This is allowed as a `complete()` in case transfer error has no effect as well as a `dmaengine_terminate_async()` on a transfer success. Also fix the unneeded cast and remove not more needed variables. Fixes: 7ecc8cfde553 ("i2c: i2c-stm32f7: Add DMA support") Acked-by: Alain Volmat Signed-off-by: Cl=C3=A9ment Le Goffic --- drivers/i2c/busses/i2c-stm32f7.c | 20 +++++++------------- 1 file changed, 7 insertions(+), 13 deletions(-) diff --git a/drivers/i2c/busses/i2c-stm32f7.c b/drivers/i2c/busses/i2c-stm3= 2f7.c index 817d081460c2..73a7b8894c0d 100644 --- a/drivers/i2c/busses/i2c-stm32f7.c +++ b/drivers/i2c/busses/i2c-stm32f7.c @@ -739,10 +739,11 @@ static void stm32f7_i2c_disable_dma_req(struct stm32f= 7_i2c_dev *i2c_dev) =20 static void stm32f7_i2c_dma_callback(void *arg) { - struct stm32f7_i2c_dev *i2c_dev =3D (struct stm32f7_i2c_dev *)arg; + struct stm32f7_i2c_dev *i2c_dev =3D arg; struct stm32_i2c_dma *dma =3D i2c_dev->dma; =20 stm32f7_i2c_disable_dma_req(i2c_dev); + dmaengine_terminate_async(dma->chan_using); dma_unmap_single(i2c_dev->dev, dma->dma_buf, dma->dma_len, dma->dma_data_dir); complete(&dma->dma_complete); @@ -1510,7 +1511,6 @@ static irqreturn_t stm32f7_i2c_handle_isr_errs(struct= stm32f7_i2c_dev *i2c_dev, u16 addr =3D f7_msg->addr; void __iomem *base =3D i2c_dev->base; struct device *dev =3D i2c_dev->dev; - struct stm32_i2c_dma *dma =3D i2c_dev->dma; =20 /* Bus error */ if (status & STM32F7_I2C_ISR_BERR) { @@ -1551,10 +1551,8 @@ static irqreturn_t stm32f7_i2c_handle_isr_errs(struc= t stm32f7_i2c_dev *i2c_dev, } =20 /* Disable dma */ - if (i2c_dev->use_dma) { - stm32f7_i2c_disable_dma_req(i2c_dev); - dmaengine_terminate_async(dma->chan_using); - } + if (i2c_dev->use_dma) + stm32f7_i2c_dma_callback(i2c_dev); =20 i2c_dev->master_mode =3D false; complete(&i2c_dev->complete); @@ -1600,7 +1598,6 @@ static irqreturn_t stm32f7_i2c_isr_event_thread(int i= rq, void *data) { struct stm32f7_i2c_dev *i2c_dev =3D data; struct stm32f7_i2c_msg *f7_msg =3D &i2c_dev->f7_msg; - struct stm32_i2c_dma *dma =3D i2c_dev->dma; void __iomem *base =3D i2c_dev->base; u32 status, mask; int ret; @@ -1619,10 +1616,8 @@ static irqreturn_t stm32f7_i2c_isr_event_thread(int = irq, void *data) dev_dbg(i2c_dev->dev, "<%s>: Receive NACK (addr %x)\n", __func__, f7_msg->addr); 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Fri, 04 Jul 2025 10:41:40 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 98D5A4004C; Fri, 4 Jul 2025 10:40:31 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id B39E7483152; Fri, 4 Jul 2025 10:39:38 +0200 (CEST) Received: from localhost (10.48.86.185) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 4 Jul 2025 10:39:38 +0200 From: =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= Date: Fri, 4 Jul 2025 10:39:16 +0200 Subject: [PATCH v4 3/3] i2c: stm32f7: support i2c_*_dma_safe_msg_buf APIs Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20250704-i2c-upstream-v4-3-84a095a2c728@foss.st.com> References: <20250704-i2c-upstream-v4-0-84a095a2c728@foss.st.com> In-Reply-To: <20250704-i2c-upstream-v4-0-84a095a2c728@foss.st.com> To: Pierre-Yves MORDRET , Alain Volmat , Andi Shyti , "Maxime Coquelin" , Alexandre Torgue , Sumit Semwal , =?utf-8?q?Christian_K=C3=B6nig?= , "M'boumba Cedric Madianga" , Wolfram Sang CC: Pierre-Yves MORDRET , , , , , , , , =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= X-Mailer: b4 0.15-dev-7616d X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.7,FMLib:17.12.80.40 definitions=2025-07-04_03,2025-07-02_04,2025-03-28_01 `i2c_*_dma_safe_msg_buf` APIs operate on a `struct i2c_msg`. The get operation make sure the I2C buffer is DMA'able according to its buffer length, or if the memory use is DMA coherent for example and return a valid pointer for safe DMA access to be used. The put operation release the pointer. Prefer using generic API's than relying on private tests. Acked-by: Alain Volmat Signed-off-by: Cl=C3=A9ment Le Goffic --- drivers/i2c/busses/i2c-stm32f7.c | 32 +++++++++++++++++++++----------- 1 file changed, 21 insertions(+), 11 deletions(-) diff --git a/drivers/i2c/busses/i2c-stm32f7.c b/drivers/i2c/busses/i2c-stm3= 2f7.c index 73a7b8894c0d..994232646789 100644 --- a/drivers/i2c/busses/i2c-stm32f7.c +++ b/drivers/i2c/busses/i2c-stm32f7.c @@ -741,11 +741,14 @@ static void stm32f7_i2c_dma_callback(void *arg) { struct stm32f7_i2c_dev *i2c_dev =3D arg; struct stm32_i2c_dma *dma =3D i2c_dev->dma; + struct stm32f7_i2c_msg *f7_msg =3D &i2c_dev->f7_msg; =20 stm32f7_i2c_disable_dma_req(i2c_dev); dmaengine_terminate_async(dma->chan_using); dma_unmap_single(i2c_dev->dev, dma->dma_buf, dma->dma_len, dma->dma_data_dir); + if (!f7_msg->smbus) + i2c_put_dma_safe_msg_buf(f7_msg->buf, i2c_dev->msg, true); complete(&dma->dma_complete); } =20 @@ -881,6 +884,7 @@ static void stm32f7_i2c_xfer_msg(struct stm32f7_i2c_dev= *i2c_dev, { struct stm32f7_i2c_msg *f7_msg =3D &i2c_dev->f7_msg; void __iomem *base =3D i2c_dev->base; + u8 *dma_buf; u32 cr1, cr2; int ret; =20 @@ -930,17 +934,23 @@ static void stm32f7_i2c_xfer_msg(struct stm32f7_i2c_d= ev *i2c_dev, =20 /* Configure DMA or enable RX/TX interrupt */ i2c_dev->use_dma =3D false; - if (i2c_dev->dma && f7_msg->count >=3D STM32F7_I2C_DMA_LEN_MIN - && !i2c_dev->atomic) { - ret =3D stm32_i2c_prep_dma_xfer(i2c_dev->dev, i2c_dev->dma, - msg->flags & I2C_M_RD, - f7_msg->count, f7_msg->buf, - stm32f7_i2c_dma_callback, - i2c_dev); - if (!ret) - i2c_dev->use_dma =3D true; - else - dev_warn(i2c_dev->dev, "can't use DMA\n"); + if (i2c_dev->dma && !i2c_dev->atomic) { + dma_buf =3D i2c_get_dma_safe_msg_buf(msg, STM32F7_I2C_DMA_LEN_MIN); + if (dma_buf) { + f7_msg->buf =3D dma_buf; + ret =3D stm32_i2c_prep_dma_xfer(i2c_dev->dev, i2c_dev->dma, + msg->flags & I2C_M_RD, + f7_msg->count, f7_msg->buf, + stm32f7_i2c_dma_callback, + i2c_dev); + if (ret) { + dev_warn(i2c_dev->dev, "can't use DMA\n"); + i2c_put_dma_safe_msg_buf(f7_msg->buf, msg, false); + f7_msg->buf =3D msg->buf; + } else { + i2c_dev->use_dma =3D true; + } + } } =20 if (!i2c_dev->use_dma) { --=20 2.43.0