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Wed, 02 Jul 2025 02:22:23 -0700 (PDT) Received: from [127.0.1.1] ([2a01:cb1d:dc:7e00:8827:d0e:25e:834a]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4538a406489sm195844165e9.27.2025.07.02.02.22.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Jul 2025 02:22:22 -0700 (PDT) From: Bartosz Golaszewski Date: Wed, 02 Jul 2025 11:22:15 +0200 Subject: [PATCH v2 8/8] gpio: en7523: use new generic GPIO chip API Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250702-gpio-mmio-rework-v2-8-6b77aab684d8@linaro.org> References: <20250702-gpio-mmio-rework-v2-0-6b77aab684d8@linaro.org> In-Reply-To: <20250702-gpio-mmio-rework-v2-0-6b77aab684d8@linaro.org> To: Linus Walleij , Bartosz Golaszewski , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam Cc: linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, Bartosz Golaszewski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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a=openpgp; fpr=169DEB6C0BC3C46013D2C79F11A72EA01471D772 From: Bartosz Golaszewski Convert the driver to using the new generic GPIO chip interfaces from linux/gpio/generic.h. Reviewed-by: Linus Walleij Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-en7523.c | 36 ++++++++++++++++++------------------ 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/drivers/gpio/gpio-en7523.c b/drivers/gpio/gpio-en7523.c index c08069d0d1045e9df4a76cad4600bf25d4e3a7c5..cf47afc578a9cea1fb1adb97f51= b143b13c66ab1 100644 --- a/drivers/gpio/gpio-en7523.c +++ b/drivers/gpio/gpio-en7523.c @@ -4,6 +4,7 @@ #include #include #include +#include #include #include #include @@ -13,28 +14,23 @@ =20 /** * struct airoha_gpio_ctrl - Airoha GPIO driver data - * @gc: Associated gpio_chip instance. + * @gen_gc: Associated gpio_generic_chip instance. * @data: The data register. * @dir: [0] The direction register for the lower 16 pins. * [1]: The direction register for the higher 16 pins. * @output: The output enable register. */ struct airoha_gpio_ctrl { - struct gpio_chip gc; + struct gpio_generic_chip gen_gc; void __iomem *data; void __iomem *dir[2]; void __iomem *output; }; =20 -static struct airoha_gpio_ctrl *gc_to_ctrl(struct gpio_chip *gc) -{ - return container_of(gc, struct airoha_gpio_ctrl, gc); -} - static int airoha_dir_set(struct gpio_chip *gc, unsigned int gpio, int val, int out) { - struct airoha_gpio_ctrl *ctrl =3D gc_to_ctrl(gc); + struct airoha_gpio_ctrl *ctrl =3D gpiochip_get_data(gc); u32 dir =3D ioread32(ctrl->dir[gpio / 16]); u32 output =3D ioread32(ctrl->output); u32 mask =3D BIT((gpio % 16) * 2); @@ -50,7 +46,7 @@ static int airoha_dir_set(struct gpio_chip *gc, unsigned = int gpio, iowrite32(dir, ctrl->dir[gpio / 16]); =20 if (out) - gc->set_rv(gc, gpio, val); + gpio_generic_chip_set(&ctrl->gen_gc, gpio, val); =20 iowrite32(output, ctrl->output); =20 @@ -70,7 +66,7 @@ static int airoha_dir_in(struct gpio_chip *gc, unsigned i= nt gpio) =20 static int airoha_get_dir(struct gpio_chip *gc, unsigned int gpio) { - struct airoha_gpio_ctrl *ctrl =3D gc_to_ctrl(gc); + struct airoha_gpio_ctrl *ctrl =3D gpiochip_get_data(gc); u32 dir =3D ioread32(ctrl->dir[gpio / 16]); u32 mask =3D BIT((gpio % 16) * 2); =20 @@ -79,6 +75,7 @@ static int airoha_get_dir(struct gpio_chip *gc, unsigned = int gpio) =20 static int airoha_gpio_probe(struct platform_device *pdev) { + struct gpio_generic_chip_config config =3D { }; struct device *dev =3D &pdev->dev; struct airoha_gpio_ctrl *ctrl; int err; @@ -103,18 +100,21 @@ static int airoha_gpio_probe(struct platform_device *= pdev) if (IS_ERR(ctrl->output)) return PTR_ERR(ctrl->output); =20 - err =3D bgpio_init(&ctrl->gc, dev, 4, ctrl->data, NULL, - NULL, NULL, NULL, 0); + config.dev =3D dev; + config.sz =3D 4; + config.dat =3D ctrl->data; + + err =3D gpio_generic_chip_init(&ctrl->gen_gc, &config); if (err) return dev_err_probe(dev, err, "unable to init generic GPIO"); =20 - ctrl->gc.ngpio =3D AIROHA_GPIO_MAX; - ctrl->gc.owner =3D THIS_MODULE; - ctrl->gc.direction_output =3D airoha_dir_out; - ctrl->gc.direction_input =3D airoha_dir_in; - ctrl->gc.get_direction =3D airoha_get_dir; + ctrl->gen_gc.gc.ngpio =3D AIROHA_GPIO_MAX; + ctrl->gen_gc.gc.owner =3D THIS_MODULE; + ctrl->gen_gc.gc.direction_output =3D airoha_dir_out; + ctrl->gen_gc.gc.direction_input =3D airoha_dir_in; + ctrl->gen_gc.gc.get_direction =3D airoha_get_dir; =20 - return devm_gpiochip_add_data(dev, &ctrl->gc, ctrl); + return devm_gpiochip_add_data(dev, &ctrl->gen_gc.gc, ctrl); } =20 static const struct of_device_id airoha_gpio_of_match[] =3D { --=20 2.48.1