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Wed, 02 Jul 2025 02:22:17 -0700 (PDT) Received: from [127.0.1.1] ([2a01:cb1d:dc:7e00:8827:d0e:25e:834a]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4538a406489sm195844165e9.27.2025.07.02.02.22.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Jul 2025 02:22:17 -0700 (PDT) From: Bartosz Golaszewski Date: Wed, 02 Jul 2025 11:22:10 +0200 Subject: [PATCH v2 3/8] gpio: mxc: use new generic GPIO chip API Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250702-gpio-mmio-rework-v2-3-6b77aab684d8@linaro.org> References: <20250702-gpio-mmio-rework-v2-0-6b77aab684d8@linaro.org> In-Reply-To: <20250702-gpio-mmio-rework-v2-0-6b77aab684d8@linaro.org> To: Linus Walleij , Bartosz Golaszewski , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam Cc: linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, Bartosz Golaszewski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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a=openpgp; fpr=169DEB6C0BC3C46013D2C79F11A72EA01471D772 From: Bartosz Golaszewski Convert the driver to using the new generic GPIO chip interfaces from linux/gpio/generic.h. Reviewed-by: Linus Walleij Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-mxc.c | 41 ++++++++++++++++++++++++----------------- 1 file changed, 24 insertions(+), 17 deletions(-) diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c index 1c37168c8d0a657d7f93067d9ac95cfbd821f757..433cbadc3a4cc67ebc89a470228= 0975fa8d2c9bc 100644 --- a/drivers/gpio/gpio-mxc.c +++ b/drivers/gpio/gpio-mxc.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include =20 @@ -65,7 +66,7 @@ struct mxc_gpio_port { int irq_high; void (*mx_irq_handler)(struct irq_desc *desc); struct irq_domain *domain; - struct gpio_chip gc; + struct gpio_generic_chip gen_gc; struct device *dev; u32 both_edges; struct mxc_gpio_reg_saved gpio_saved_reg; @@ -179,7 +180,7 @@ static int gpio_set_irq_type(struct irq_data *d, u32 ty= pe) if (GPIO_EDGE_SEL >=3D 0) { edge =3D GPIO_INT_BOTH_EDGES; } else { - val =3D port->gc.get(&port->gc, gpio_idx); + val =3D port->gen_gc.gc.get(&port->gen_gc.gc, gpio_idx); if (val) { edge =3D GPIO_INT_LOW_LEV; pr_debug("mxc: set GPIO %d to low trigger\n", gpio_idx); @@ -200,7 +201,7 @@ static int gpio_set_irq_type(struct irq_data *d, u32 ty= pe) return -EINVAL; } =20 - scoped_guard(raw_spinlock_irqsave, &port->gc.bgpio_lock) { + scoped_guard(gpio_generic_lock_irqsave, &port->gen_gc) { if (GPIO_EDGE_SEL >=3D 0) { val =3D readl(port->base + GPIO_EDGE_SEL); if (edge =3D=3D GPIO_INT_BOTH_EDGES) @@ -222,7 +223,7 @@ static int gpio_set_irq_type(struct irq_data *d, u32 ty= pe) port->pad_type[gpio_idx] =3D type; } =20 - return port->gc.direction_input(&port->gc, gpio_idx); + return port->gen_gc.gc.direction_input(&port->gen_gc.gc, gpio_idx); } =20 static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio) @@ -231,7 +232,7 @@ static void mxc_flip_edge(struct mxc_gpio_port *port, u= 32 gpio) u32 bit, val; int edge; =20 - guard(raw_spinlock_irqsave)(&port->gc.bgpio_lock); + guard(gpio_generic_lock_irqsave)(&port->gen_gc); =20 reg +=3D GPIO_ICR1 + ((gpio & 0x10) >> 2); /* lower or upper register */ bit =3D gpio & 0xf; @@ -414,6 +415,7 @@ static void mxc_update_irq_chained_handler(struct mxc_g= pio_port *port, bool enab =20 static int mxc_gpio_probe(struct platform_device *pdev) { + struct gpio_generic_chip_config config =3D { }; struct device_node *np =3D pdev->dev.of_node; struct mxc_gpio_port *port; int irq_count; @@ -473,27 +475,31 @@ static int mxc_gpio_probe(struct platform_device *pde= v) port->mx_irq_handler =3D mx3_gpio_irq_handler; =20 mxc_update_irq_chained_handler(port, true); - err =3D bgpio_init(&port->gc, &pdev->dev, 4, - port->base + GPIO_PSR, - port->base + GPIO_DR, NULL, - port->base + GPIO_GDIR, NULL, - BGPIOF_READ_OUTPUT_REG_SET); + + config.dev =3D &pdev->dev; + config.sz =3D 4; + config.dat =3D port->base + GPIO_PSR; + config.set =3D port->base + GPIO_DR; + config.dirout =3D port->base + GPIO_GDIR; + config.flags =3D BGPIOF_READ_OUTPUT_REG_SET; + + err =3D gpio_generic_chip_init(&port->gen_gc, &config); if (err) goto out_bgio; =20 - port->gc.request =3D mxc_gpio_request; - port->gc.free =3D mxc_gpio_free; - port->gc.to_irq =3D mxc_gpio_to_irq; + port->gen_gc.gc.request =3D mxc_gpio_request; + port->gen_gc.gc.free =3D mxc_gpio_free; + port->gen_gc.gc.to_irq =3D mxc_gpio_to_irq; /* * Driver is DT-only, so a fixed base needs only be maintained for legacy * userspace with sysfs interface. */ if (IS_ENABLED(CONFIG_GPIO_SYSFS)) - port->gc.base =3D of_alias_get_id(np, "gpio") * 32; + port->gen_gc.gc.base =3D of_alias_get_id(np, "gpio") * 32; else /* silence boot time warning */ - port->gc.base =3D -1; + port->gen_gc.gc.base =3D -1; =20 - err =3D devm_gpiochip_add_data(&pdev->dev, &port->gc, port); + err =3D devm_gpiochip_add_data(&pdev->dev, &port->gen_gc.gc, port); if (err) goto out_bgio; =20 @@ -567,7 +573,8 @@ static bool mxc_gpio_generic_config(struct mxc_gpio_por= t *port, if (of_device_is_compatible(np, "fsl,imx8dxl-gpio") || of_device_is_compatible(np, "fsl,imx8qxp-gpio") || of_device_is_compatible(np, "fsl,imx8qm-gpio")) - return (gpiochip_generic_config(&port->gc, offset, conf) =3D=3D 0); + return (gpiochip_generic_config(&port->gen_gc.gc, + offset, conf) =3D=3D 0); =20 return false; } --=20 2.48.1