From nobody Wed Oct 8 05:55:35 2025 Received: from leonov.paulk.fr (leonov.paulk.fr [185.233.101.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1D88D23B60B; Tue, 1 Jul 2025 20:14:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.233.101.22 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751400853; cv=none; b=rZiOH+L547Z1oeRzrjkzhA1VZYGaEcg89OgsGny9j4szk0Mry39MwmdQJ6+R4RHC2WPqkwyq7mSCUJmMee5ZMVmUhUw/HTHloixIxTxJ1sjYvmmuvLDA02wP/14n81CGo5BU/mO1ciijyJCMKS7Mxpxft95z/3SXqzismJBwRQg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751400853; c=relaxed/simple; bh=HFLK5CehmWjnbyd0ytHLF7MjGTcYbbrRKSw90+w8kuo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=pkXwlSGc4uE3RVQ8wrSjYABjJ0i6TituLiSm31HlAAh6L3zIimHWK98iIXX30rxpqMeu/kVd3Bi/bfJGCT+nWe05tmxQhSXZ0Mwmue5N8O7Ux3t+zukgAN2FLbmlTw4sKa6EfoLQ8o4JP8KpPrOyR4VcpOVcZTuyxraAWKoLorg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io; spf=pass smtp.mailfrom=sys-base.io; arc=none smtp.client-ip=185.233.101.22 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sys-base.io Received: from laika.paulk.fr (12.234.24.109.rev.sfr.net [109.24.234.12]) by leonov.paulk.fr (Postfix) with ESMTPS id 3F7531F00036; Tue, 1 Jul 2025 20:14:10 +0000 (UTC) Received: by laika.paulk.fr (Postfix, from userid 65534) id A04B6AC968E; Tue, 1 Jul 2025 20:14:09 +0000 (UTC) X-Spam-Level: * Received: from localhost.localdomain (unknown [192.168.1.64]) by laika.paulk.fr (Postfix) with ESMTP id 3D736AC9681; Tue, 1 Jul 2025 20:11:32 +0000 (UTC) From: Paul Kocialkowski To: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-gpio@vger.kernel.org Cc: Yong Deng , Paul Kocialkowski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Maxime Ripard , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Simona Vetter , Linus Walleij , Icenowy Zheng , Andre Przywara Subject: [PATCH 1/5] pinctrl: sunxi: v3s: Fix wrong comment about UART2 pinmux Date: Tue, 1 Jul 2025 22:11:20 +0200 Message-ID: <20250701201124.812882-2-paulk@sys-base.io> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250701201124.812882-1-paulk@sys-base.io> References: <20250701201124.812882-1-paulk@sys-base.io> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The original comment doesn't match the pin attribution, probably due to a hasty copy/paste. Signed-off-by: Paul Kocialkowski Acked-by Chen-Yu Tsai Reviewed-by: Icenowy Zheng --- drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c b/drivers/pinctrl/su= nxi/pinctrl-sun8i-v3s.c index 696d7dd8d87b..2e3bd36a4410 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c +++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c @@ -45,7 +45,7 @@ static const struct sunxi_desc_pin sun8i_v3s_pins[] =3D { SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3), SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), - SUNXI_FUNCTION(0x2, "uart2"), /* D1 */ + SUNXI_FUNCTION(0x2, "uart2"), /* CTS */ SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)), /* PB_EINT3 */ SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4), SUNXI_FUNCTION(0x0, "gpio_in"), --=20 2.49.0 From nobody Wed Oct 8 05:55:35 2025 Received: from leonov.paulk.fr (leonov.paulk.fr [185.233.101.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F401C2441A6; Tue, 1 Jul 2025 20:15:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.233.101.22 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751400935; cv=none; b=XbV24Ppq+e0y25uZyan35DfMOV6yzBGCbCa5YrzUKP/6FtZt1mhN9WlmhnhDPe8B4E2c9MwBOg08yBSs2H1IrNnEzz0UIEfHiDHY/uD1OA1gnN3G6ggW9ZKpdGtsRry67WKwytdIAKn4CLdQHSjrrhUMd3S8khT1XSvXByB/WdI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751400935; c=relaxed/simple; bh=UCQ/ORzA7zunGa781r16wUL+6h1iduPb4jRIaZmeYQw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Le4g0Z86CytRTh2Z1pWNkTW7ZRrxmav/645Yek7+25GB3vLRZQLUzFkgaQVy1XUR1s0R7PPFspnTTfb6mtiHV6jHTq+h2BF5NJ8xqWHJ3270lod/O38OxnPPBzNElQgBcJ7LcXmBDzonlguLcg5xmelZAJ5oWMhORRmUMySnaQU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io; spf=pass smtp.mailfrom=sys-base.io; arc=none smtp.client-ip=185.233.101.22 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sys-base.io Received: from laika.paulk.fr (12.234.24.109.rev.sfr.net [109.24.234.12]) by leonov.paulk.fr (Postfix) with ESMTPS id A54031F00036; Tue, 1 Jul 2025 20:15:30 +0000 (UTC) Received: by laika.paulk.fr (Postfix, from userid 65534) id 2F874AC9699; Tue, 1 Jul 2025 20:15:30 +0000 (UTC) X-Spam-Level: * Received: from localhost.localdomain (unknown [192.168.1.64]) by laika.paulk.fr (Postfix) with ESMTP id 2C8D0AC9682; Tue, 1 Jul 2025 20:11:33 +0000 (UTC) From: Paul Kocialkowski To: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-gpio@vger.kernel.org Cc: Yong Deng , Paul Kocialkowski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Maxime Ripard , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Simona Vetter , Linus Walleij , Icenowy Zheng , Andre Przywara Subject: [PATCH 2/5] clk: sunxi-ng: v3s: Fix CSI SCLK clock name Date: Tue, 1 Jul 2025 22:11:21 +0200 Message-ID: <20250701201124.812882-3-paulk@sys-base.io> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250701201124.812882-1-paulk@sys-base.io> References: <20250701201124.812882-1-paulk@sys-base.io> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The CSI SCLK clock is incorrectly called CSI1 SCLK while it is used for both the CSI0 and CSI1 interfaces and is called CSI SCLK all around the documentation. Fix the name in the driver, header and device-tree. Fixes: d0f11d14b0bc ("clk: sunxi-ng: add support for V3s CCU") Signed-off-by: Paul Kocialkowski Reviewed-By: Icenowy Zheng --- .../bindings/media/allwinner,sun6i-a31-csi.yaml | 2 +- .../bindings/media/allwinner,sun6i-a31-isp.yaml | 2 +- .../bindings/media/allwinner,sun6i-a31-mipi-csi2.yaml | 2 +- arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi | 2 +- drivers/clk/sunxi-ng/ccu-sun8i-v3s.c | 10 +++++----- include/dt-bindings/clock/sun8i-v3s-ccu.h | 2 +- 6 files changed, 10 insertions(+), 10 deletions(-) diff --git a/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-cs= i.yaml b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.ya= ml index b3d6db922693..1aa5775ba2bc 100644 --- a/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml +++ b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml @@ -110,7 +110,7 @@ examples: reg =3D <0x01cb4000 0x1000>; interrupts =3D ; clocks =3D <&ccu CLK_BUS_CSI>, - <&ccu CLK_CSI1_SCLK>, + <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI>; clock-names =3D "bus", "mod", diff --git a/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-is= p.yaml b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-isp.ya= ml index a61a76bb611c..3ea4a4290f23 100644 --- a/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-isp.yaml +++ b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-isp.yaml @@ -79,7 +79,7 @@ examples: reg =3D <0x01cb8000 0x1000>; interrupts =3D ; clocks =3D <&ccu CLK_BUS_CSI>, - <&ccu CLK_CSI1_SCLK>, + <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI>; clock-names =3D "bus", "mod", "ram"; resets =3D <&ccu RST_BUS_CSI>; diff --git a/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-mi= pi-csi2.yaml b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-= mipi-csi2.yaml index 54e15ab8a7f5..627b28e94354 100644 --- a/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-mipi-csi2= .yaml +++ b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-mipi-csi2= .yaml @@ -103,7 +103,7 @@ examples: reg =3D <0x01cb1000 0x1000>; interrupts =3D ; clocks =3D <&ccu CLK_BUS_CSI>, - <&ccu CLK_CSI1_SCLK>; + <&ccu CLK_CSI_SCLK>; clock-names =3D "bus", "mod"; resets =3D <&ccu RST_BUS_CSI>; =20 diff --git a/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi b/arch/arm/boot/dts= /allwinner/sun8i-v3s.dtsi index f909b1d4dbca..e82cf312da25 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi +++ b/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi @@ -652,7 +652,7 @@ csi1: camera@1cb4000 { reg =3D <0x01cb4000 0x3000>; interrupts =3D ; clocks =3D <&ccu CLK_BUS_CSI>, - <&ccu CLK_CSI1_SCLK>, + <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI>; clock-names =3D "bus", "mod", "ram"; resets =3D <&ccu RST_BUS_CSI>; diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c b/drivers/clk/sunxi-ng/cc= u-sun8i-v3s.c index 579a81bb46df..d12791b31a9d 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c @@ -362,8 +362,8 @@ static const char * const csi_mclk_parents[] =3D { "osc= 24M", "pll-video", static SUNXI_CCU_M_WITH_MUX_GATE(csi0_mclk_clk, "csi0-mclk", csi_mclk_pare= nts, 0x130, 0, 5, 8, 3, BIT(15), 0); =20 -static const char * const csi1_sclk_parents[] =3D { "pll-video", "pll-isp"= }; -static SUNXI_CCU_M_WITH_MUX_GATE(csi1_sclk_clk, "csi-sclk", csi1_sclk_pare= nts, +static const char * const csi_sclk_parents[] =3D { "pll-video", "pll-isp" = }; +static SUNXI_CCU_M_WITH_MUX_GATE(csi_sclk_clk, "csi-sclk", csi_sclk_parent= s, 0x134, 16, 4, 24, 3, BIT(31), 0); =20 static SUNXI_CCU_M_WITH_MUX_GATE(csi1_mclk_clk, "csi-mclk", csi_mclk_paren= ts, @@ -452,7 +452,7 @@ static struct ccu_common *sun8i_v3s_ccu_clks[] =3D { &tcon_clk.common, &csi_misc_clk.common, &csi0_mclk_clk.common, - &csi1_sclk_clk.common, + &csi_sclk_clk.common, &csi1_mclk_clk.common, &ve_clk.common, &ac_dig_clk.common, @@ -551,7 +551,7 @@ static struct clk_hw_onecell_data sun8i_v3s_hw_clks =3D= { [CLK_TCON0] =3D &tcon_clk.common.hw, [CLK_CSI_MISC] =3D &csi_misc_clk.common.hw, [CLK_CSI0_MCLK] =3D &csi0_mclk_clk.common.hw, - [CLK_CSI1_SCLK] =3D &csi1_sclk_clk.common.hw, + [CLK_CSI_SCLK] =3D &csi_sclk_clk.common.hw, [CLK_CSI1_MCLK] =3D &csi1_mclk_clk.common.hw, [CLK_VE] =3D &ve_clk.common.hw, [CLK_AC_DIG] =3D &ac_dig_clk.common.hw, @@ -633,7 +633,7 @@ static struct clk_hw_onecell_data sun8i_v3_hw_clks =3D { [CLK_TCON0] =3D &tcon_clk.common.hw, [CLK_CSI_MISC] =3D &csi_misc_clk.common.hw, [CLK_CSI0_MCLK] =3D &csi0_mclk_clk.common.hw, - [CLK_CSI1_SCLK] =3D &csi1_sclk_clk.common.hw, + [CLK_CSI_SCLK] =3D &csi_sclk_clk.common.hw, [CLK_CSI1_MCLK] =3D &csi1_mclk_clk.common.hw, [CLK_VE] =3D &ve_clk.common.hw, [CLK_AC_DIG] =3D &ac_dig_clk.common.hw, diff --git a/include/dt-bindings/clock/sun8i-v3s-ccu.h b/include/dt-binding= s/clock/sun8i-v3s-ccu.h index 014ac6123d17..c4055629c9f9 100644 --- a/include/dt-bindings/clock/sun8i-v3s-ccu.h +++ b/include/dt-bindings/clock/sun8i-v3s-ccu.h @@ -96,7 +96,7 @@ #define CLK_TCON0 64 #define CLK_CSI_MISC 65 #define CLK_CSI0_MCLK 66 -#define CLK_CSI1_SCLK 67 +#define CLK_CSI_SCLK 67 #define CLK_CSI1_MCLK 68 #define CLK_VE 69 #define CLK_AC_DIG 70 --=20 2.49.0 From nobody Wed Oct 8 05:55:35 2025 Received: from leonov.paulk.fr (leonov.paulk.fr [185.233.101.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 13F0B27FD52; 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dmarc=none (p=none dis=none) header.from=sys-base.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sys-base.io Received: from laika.paulk.fr (12.234.24.109.rev.sfr.net [109.24.234.12]) by leonov.paulk.fr (Postfix) with ESMTPS id 705651F0003D; Tue, 1 Jul 2025 20:16:49 +0000 (UTC) Received: by laika.paulk.fr (Postfix, from userid 65534) id E3C54AC9686; Tue, 1 Jul 2025 20:16:48 +0000 (UTC) X-Spam-Level: * Received: from localhost.localdomain (unknown [192.168.1.64]) by laika.paulk.fr (Postfix) with ESMTP id B6A8BAC9686; Tue, 1 Jul 2025 20:11:33 +0000 (UTC) From: Paul Kocialkowski To: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-gpio@vger.kernel.org Cc: Yong Deng , Paul Kocialkowski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Maxime Ripard , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Simona Vetter , Linus Walleij , Icenowy Zheng , Andre Przywara Subject: [PATCH 3/5] clk: sunxi-ng: v3s: Fix CSI1 MCLK clock name Date: Tue, 1 Jul 2025 22:11:22 +0200 Message-ID: <20250701201124.812882-4-paulk@sys-base.io> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250701201124.812882-1-paulk@sys-base.io> References: <20250701201124.812882-1-paulk@sys-base.io> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The CSI1 MCLK clock is reported as "csi-mclk" while it is specific to CSI1 as the name of the definition indicates. Fix it in the driver. Fixes: d0f11d14b0bc ("clk: sunxi-ng: add support for V3s CCU") Signed-off-by: Paul Kocialkowski Reviewed-By: Icenowy Zheng --- drivers/clk/sunxi-ng/ccu-sun8i-v3s.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c b/drivers/clk/sunxi-ng/cc= u-sun8i-v3s.c index d12791b31a9d..86d933d1ac72 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c @@ -366,7 +366,7 @@ static const char * const csi_sclk_parents[] =3D { "pll= -video", "pll-isp" }; static SUNXI_CCU_M_WITH_MUX_GATE(csi_sclk_clk, "csi-sclk", csi_sclk_parent= s, 0x134, 16, 4, 24, 3, BIT(31), 0); =20 -static SUNXI_CCU_M_WITH_MUX_GATE(csi1_mclk_clk, "csi-mclk", csi_mclk_paren= ts, +static SUNXI_CCU_M_WITH_MUX_GATE(csi1_mclk_clk, "csi1-mclk", csi_mclk_pare= nts, 0x134, 0, 5, 8, 3, BIT(15), 0); =20 static SUNXI_CCU_M_WITH_GATE(ve_clk, "ve", "pll-ve", --=20 2.49.0 From nobody Wed Oct 8 05:55:35 2025 Received: from leonov.paulk.fr (leonov.paulk.fr [185.233.101.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 25A32266EFB; Tue, 1 Jul 2025 20:18:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.233.101.22 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751401089; cv=none; b=scJDBT+UrwauG9tLZKPjx2uSZL7GTF8L5iuAuqKQc9x+WeBeg02qRPFIWqAXAwfZ0Gn9WPXlCOFuVsgXHD2axuqorisqklZPsB7uCHdPq9CLBDSigS8JR8jxi1hzHEVSE2rV7fQ/pwBvYxoNSz8ofZ4AocI0S+DN8PTaZBdE6GQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751401089; c=relaxed/simple; bh=fzXJc+2YW17H2qljaXn3odf+JD2oegdVXlnSHbTP/7s=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=JGy8ujSubB2D8XxSG0yItkWPQKfe4IglW9Q3Vdiw2exUzFPIwic7Hcizou6D/RZncYFq27nnFViryqMAUZowl5SnmHYX+ztFmTAKIR/Ol/PBGtkM61+LvcLgmgiHyYz6yGukCMhe0vS63BcLDfJH6cm0QH5D3DEsw9zKt9yfPC4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io; spf=pass smtp.mailfrom=sys-base.io; arc=none smtp.client-ip=185.233.101.22 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sys-base.io Received: from laika.paulk.fr (12.234.24.109.rev.sfr.net [109.24.234.12]) by leonov.paulk.fr (Postfix) with ESMTPS id 54EEE1F0003D; Tue, 1 Jul 2025 20:18:06 +0000 (UTC) Received: by laika.paulk.fr (Postfix, from userid 65534) id B80C6AC9687; Tue, 1 Jul 2025 20:18:05 +0000 (UTC) X-Spam-Level: * Received: from localhost.localdomain (unknown [192.168.1.64]) by laika.paulk.fr (Postfix) with ESMTP id 4E39AAC9687; Tue, 1 Jul 2025 20:11:34 +0000 (UTC) From: Paul Kocialkowski To: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-gpio@vger.kernel.org Cc: Yong Deng , Paul Kocialkowski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Maxime Ripard , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Simona Vetter , Linus Walleij , Icenowy Zheng , Andre Przywara Subject: [PATCH 4/5] clk: sunxi-ng: v3s: Fix TCON clock parents Date: Tue, 1 Jul 2025 22:11:23 +0200 Message-ID: <20250701201124.812882-5-paulk@sys-base.io> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250701201124.812882-1-paulk@sys-base.io> References: <20250701201124.812882-1-paulk@sys-base.io> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The TCON clock can be parented to both the video PLL and the periph0 PLL. Add the latter, which was missing from the list. Fixes: d0f11d14b0bc ("clk: sunxi-ng: add support for V3s CCU") Signed-off-by: Paul Kocialkowski --- drivers/clk/sunxi-ng/ccu-sun8i-v3s.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c b/drivers/clk/sunxi-ng/cc= u-sun8i-v3s.c index 86d933d1ac72..52e4369664c5 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c @@ -350,7 +350,7 @@ static SUNXI_CCU_M_WITH_MUX_GATE(de_clk, "de", de_paren= ts, 0x104, 0, 4, 24, 2, BIT(31), CLK_SET_RATE_PARENT); =20 -static const char * const tcon_parents[] =3D { "pll-video" }; +static const char * const tcon_parents[] =3D { "pll-video", "pll-periph0" = }; static SUNXI_CCU_M_WITH_MUX_GATE(tcon_clk, "tcon", tcon_parents, 0x118, 0, 4, 24, 3, BIT(31), 0); =20 --=20 2.49.0 From nobody Wed Oct 8 05:55:35 2025 Received: from leonov.paulk.fr (leonov.paulk.fr [185.233.101.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1B7842E3372; Tue, 1 Jul 2025 20:19:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.233.101.22 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751401168; cv=none; b=nksiRb50Dkf09du/uQ96h4mZSrLlmkoBQFQJLjJEZrRcn9aG/b5/zDeIJq/Otd7LGtEN9z79u2KjyP/tJOJQmbzkt79Bp/hKIWjhIwtmtJya6pC4VBuRK5D4Zxk/nqF+Foj9JwZUrnz6EEJh4YXTPf5/sO4S71Hm5I25qdZsCoI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751401168; c=relaxed/simple; bh=eTdiB+TyeObb5D0Oy2RdhXL7mUutM7cZ3MD00P9iWVE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=gBau70s0r1mAc/y28tsNrRzK6TswEXz3TUMNPDw99sPwBXn8cxzTGhpdYizdjtZBsKe3SYw98Jr430nSytyzkwsXAMyTihPYLQhSiyB5HMme6tNAPLP7gCmcmj5VUKBpe7KuVWz36IFasODBRYOpT6w6FVHN2We9MZsIf1MMkso= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io; spf=pass smtp.mailfrom=sys-base.io; arc=none smtp.client-ip=185.233.101.22 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sys-base.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sys-base.io Received: from laika.paulk.fr (12.234.24.109.rev.sfr.net [109.24.234.12]) by leonov.paulk.fr (Postfix) with ESMTPS id B91A31F00036; Tue, 1 Jul 2025 20:19:24 +0000 (UTC) Received: by laika.paulk.fr (Postfix, from userid 65534) id 48AFCAC96A5; Tue, 1 Jul 2025 20:19:24 +0000 (UTC) X-Spam-Level: * Received: from localhost.localdomain (unknown [192.168.1.64]) by laika.paulk.fr (Postfix) with ESMTP id F0064AC9688; Tue, 1 Jul 2025 20:11:38 +0000 (UTC) From: Paul Kocialkowski To: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-gpio@vger.kernel.org Cc: Yong Deng , Paul Kocialkowski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Maxime Ripard , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Simona Vetter , Linus Walleij , Icenowy Zheng , Andre Przywara Subject: [PATCH 5/5] drm/sun4i: Run the mixer clock at 297 MHz on V3s Date: Tue, 1 Jul 2025 22:11:24 +0200 Message-ID: <20250701201124.812882-6-paulk@sys-base.io> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250701201124.812882-1-paulk@sys-base.io> References: <20250701201124.812882-1-paulk@sys-base.io> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The DE mixer clock is currently set to run at 150 MHz, while the Allwinner BSP configures it at 300 MHz and other platforms typically run at 297 MHz. 150 MHz appears to be enough given the restricted graphics capabilities of the SoC (with a work area of only 1024x1024). However it typically causes the DE clock to be parented to the periph0 pll instead of the video PLL. While this should generally not be a concern, it appears (based on experimentation) that both the DE and TCON clocks need to be parented to the same PLL for these units to work. While we cannot represent this constraint in the clock driver, it appears that the TCON clock will often get parented to the video pll (typically running at 297 MHz for the CSI units needs), for instance when driving displays with a 33 MHz pixel clock (33 being a natural divider of 297). Running the DE clock at 297 MHz will typically result in parenting to the video pll instead of the periph0 pll, thus making the display output functional. This is all a bit fragile but it solves the issue with displays running at 33 Mhz and brings V3s to use the same frequency as other platforms, making support more unified. Also align and sort the fields of the v3s mixer config while at it. Signed-off-by: Paul Kocialkowski --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/su= n8i_mixer.c index 8b41d33baa30..35fdc2451060 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -670,12 +670,12 @@ static const struct sun8i_mixer_cfg sun8i_r40_mixer1_= cfg =3D { }; =20 static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg =3D { - .vi_num =3D 2, - .ui_num =3D 1, - .scaler_mask =3D 0x3, - .scanline_yuv =3D 2048, - .ccsc =3D CCSC_MIXER0_LAYOUT, - .mod_rate =3D 150000000, + .ccsc =3D CCSC_MIXER0_LAYOUT, + .mod_rate =3D 297000000, + .scaler_mask =3D 0x3, + .scanline_yuv =3D 2048, + .ui_num =3D 1, + .vi_num =3D 2, }; =20 static const struct sun8i_mixer_cfg sun20i_d1_mixer0_cfg =3D { --=20 2.49.0