From nobody Wed Oct 8 07:29:13 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 15530283138; Tue, 1 Jul 2025 16:58:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751389091; cv=none; b=SSt7n253mWelBiquEWyu7jjtNEYQO2OznuhfpGd0QL6uYZL/MEe7pKGl/ZyE5A7OY5eAxqRgfe4cV4wf3PNX9QtqNNfXRthSekYx4qZo8niYPgvYOoxWgU+mTgJeMqGXmsVlrHE+ycOvWFhqg4kKRLXkK0WGWhe7PEPHS3qJW2Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751389091; c=relaxed/simple; bh=2Z/sxjaBMHzyciR0Amj3yQU+atAainaF8NZKa+qbDFE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=c9BBbLKshJp50AgHjU4GC1bGgI5pAns9p3GrqaeNnk0IsELKHKpRd9ZYSgn73+N6/pveUfgSZ8B0PLB+IaX+wqZnYNGk6vZEBHvsCW1z/TA7NE9UX48MB+NavTogXdF9eiZp8RxJ3mZFkspkSlJU9x/A1Ps28OypzH0qgLcMtX4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=OkPUm/PU; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="OkPUm/PU" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A569EC4CEF2; Tue, 1 Jul 2025 16:58:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1751389090; bh=2Z/sxjaBMHzyciR0Amj3yQU+atAainaF8NZKa+qbDFE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OkPUm/PU7LW9I3SOA8qW+bkFi+253rrDVigh2nSqieuGt1WWZ2DEIAbG5Fun5F0U6 J4uH7mQrqHQH6l/xxsKFo3GTn1tMecCHsYCYQ6RzFRCYJpmSnz1OowvOSbG+UZcoxG wbgdqaINBCIKgTzkAZ/SfdS2Txwe3Got4APL+maZitPIbcBYkkfp+A81OJ3GNotn9v A8iwyKoZv6lrqxBNhf1GOh/1hkO5a5dol+UGbr1DKn3TIStxfP8qLo6Z2rBJdsmf91 YQE9Lg6IDVLD5/DhYCY0gsqMSivymnB+IJL1aAg9GaIjNXPFbzW/S3Zyo+uPYeyeN1 kEfRVqxjR6jcw== Received: by wens.tw (Postfix, from userid 1000) id 1BE306013F; Wed, 2 Jul 2025 00:58:06 +0800 (CST) From: Chen-Yu Tsai To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Andre Przywara Subject: [PATCH RFT net-next 09/10] arm64: dts: allwinner: t527: avaota-a1: enable second Ethernet port Date: Wed, 2 Jul 2025 00:57:55 +0800 Message-Id: <20250701165756.258356-10-wens@kernel.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250701165756.258356-1-wens@kernel.org> References: <20250701165756.258356-1-wens@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Chen-Yu Tsai On the Avaota A1 board, the second Ethernet controller, aka the GMAC200, is connected to a second external RTL8211F-CG PHY. The PHY uses an external 25MHz crystal, and has the SoC's PJ16 pin connected to its reset pin. Enable the second Ethernet port. Also fix up the label for the existing external PHY connected to the first Ethernet port. Signed-off-by: Chen-Yu Tsai --- .../dts/allwinner/sun55i-t527-avaota-a1.dts | 26 +++++++++++++++++-- 1 file changed, 24 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts b/arch= /arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts index 9a2f29201d3c..62bc9a6b0292 100644 --- a/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts +++ b/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts @@ -13,6 +13,7 @@ / { =20 aliases { ethernet0 =3D &gmac0; + ethernet1 =3D &gmac1; serial0 =3D &uart0; }; =20 @@ -67,7 +68,7 @@ &ehci1 { =20 &gmac0 { phy-mode =3D "rgmii-id"; - phy-handle =3D <&ext_rgmii_phy>; + phy-handle =3D <&ext_rgmii0_phy>; phy-supply =3D <®_dcdc4>; =20 allwinner,tx-delay-ps =3D <100>; @@ -76,8 +77,19 @@ &gmac0 { status =3D "okay"; }; =20 +&gmac1 { + phy-mode =3D "rgmii-id"; + phy-handle =3D <&ext_rgmii1_phy>; + phy-supply =3D <®_dcdc4>; + + allwinner,tx-delay-ps =3D <100>; + allwinner,rx-delay-ps =3D <100>; + + status =3D "okay"; +}; + &mdio0 { - ext_rgmii_phy: ethernet-phy@1 { + ext_rgmii0_phy: ethernet-phy@1 { compatible =3D "ethernet-phy-ieee802.3-c22"; reg =3D <1>; reset-gpios =3D <&pio 7 8 GPIO_ACTIVE_LOW>; /* PH8 */ @@ -86,6 +98,16 @@ ext_rgmii_phy: ethernet-phy@1 { }; }; =20 +&mdio1 { + ext_rgmii1_phy: ethernet-phy@1 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <1>; + reset-gpios =3D <&pio 9 16 GPIO_ACTIVE_LOW>; /* PJ16 */ + reset-assert-us =3D <10000>; + reset-deassert-us =3D <150000>; + }; +}; + &mmc0 { vmmc-supply =3D <®_cldo3>; cd-gpios =3D <&pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PF6 */ --=20 2.39.5