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([10.237.72.28]) by orviesa010.jf.intel.com with ESMTP; 01 Jul 2025 05:23:13 -0700 From: Heikki Krogerus To: Lucas De Marchi , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Rodrigo Vivi Cc: Jarkko Nikula , David Airlie , Simona Vetter , Andy Shevchenko , Mika Westerberg , Jan Dabros , Andi Shyti , Raag Jadav , "Tauro, Riana" , "Adatrao, Srinivasa" , "Michael J. Ruhl" , intel-xe@lists.freedesktop.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, Karthik Poosa , Andi Shyti Subject: [PATCH v6 4/5] drm/xe/pm: Wire up suspend/resume for I2C controller Date: Tue, 1 Jul 2025 15:22:51 +0300 Message-ID: <20250701122252.2590230-5-heikki.krogerus@linux.intel.com> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250701122252.2590230-1-heikki.krogerus@linux.intel.com> References: <20250701122252.2590230-1-heikki.krogerus@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Raag Jadav Wire up suspend/resume handles for I2C controller to match its power state with SGUnit. Signed-off-by: Raag Jadav Signed-off-by: Heikki Krogerus Reviewed-by: Karthik Poosa Reviewed-by: Andi Shyti --- drivers/gpu/drm/xe/regs/xe_i2c_regs.h | 5 +++++ drivers/gpu/drm/xe/xe_i2c.c | 29 +++++++++++++++++++++++++++ drivers/gpu/drm/xe/xe_i2c.h | 4 ++++ drivers/gpu/drm/xe/xe_pm.c | 9 +++++++++ 4 files changed, 47 insertions(+) diff --git a/drivers/gpu/drm/xe/regs/xe_i2c_regs.h b/drivers/gpu/drm/xe/reg= s/xe_i2c_regs.h index 92dae4487614..af781c8e4a80 100644 --- a/drivers/gpu/drm/xe/regs/xe_i2c_regs.h +++ b/drivers/gpu/drm/xe/regs/xe_i2c_regs.h @@ -2,6 +2,8 @@ #ifndef _XE_I2C_REGS_H_ #define _XE_I2C_REGS_H_ =20 +#include + #include "xe_reg_defs.h" #include "xe_regs.h" =20 @@ -12,4 +14,7 @@ #define REG_SG_REMAP_ADDR_PREFIX XE_REG(SOC_BASE + 0x0164) #define REG_SG_REMAP_ADDR_POSTFIX XE_REG(SOC_BASE + 0x0168) =20 +#define I2C_CONFIG_CMD XE_REG(I2C_CONFIG_SPACE_OFFSET + PCI_COMMAND) +#define I2C_CONFIG_PMCSR XE_REG(I2C_CONFIG_SPACE_OFFSET + 0x84) + #endif /* _XE_I2C_REGS_H_ */ diff --git a/drivers/gpu/drm/xe/xe_i2c.c b/drivers/gpu/drm/xe/xe_i2c.c index ef91239879c0..d395795d1e7e 100644 --- a/drivers/gpu/drm/xe/xe_i2c.c +++ b/drivers/gpu/drm/xe/xe_i2c.c @@ -226,6 +226,31 @@ static const struct regmap_config i2c_regmap_config = =3D { .fast_io =3D true, }; =20 +void xe_i2c_pm_suspend(struct xe_device *xe) +{ + struct xe_mmio *mmio =3D xe_root_tile_mmio(xe); + + if (!xe->i2c || xe->i2c->ep.cookie !=3D XE_I2C_EP_COOKIE_DEVICE) + return; + + xe_mmio_rmw32(mmio, I2C_CONFIG_PMCSR, PCI_PM_CTRL_STATE_MASK, (__force u3= 2)PCI_D3hot); + drm_dbg(&xe->drm, "pmcsr: 0x%08x\n", xe_mmio_read32(mmio, I2C_CONFIG_PMCS= R)); +} + +void xe_i2c_pm_resume(struct xe_device *xe, bool d3cold) +{ + struct xe_mmio *mmio =3D xe_root_tile_mmio(xe); + + if (!xe->i2c || xe->i2c->ep.cookie !=3D XE_I2C_EP_COOKIE_DEVICE) + return; + + if (d3cold) + xe_mmio_rmw32(mmio, I2C_CONFIG_CMD, 0, PCI_COMMAND_MEMORY); + + xe_mmio_rmw32(mmio, I2C_CONFIG_PMCSR, PCI_PM_CTRL_STATE_MASK, (__force u3= 2)PCI_D0); + drm_dbg(&xe->drm, "pmcsr: 0x%08x\n", xe_mmio_read32(mmio, I2C_CONFIG_PMCS= R)); +} + static void xe_i2c_remove(void *data) { struct xe_i2c *i2c =3D data; @@ -270,6 +295,10 @@ int xe_i2c_probe(struct xe_device *xe) i2c->mmio =3D xe_root_tile_mmio(xe); i2c->drm_dev =3D drm_dev; i2c->ep =3D ep; + xe->i2c =3D i2c; + + /* PCI PM isn't aware of this device, bring it up and match it with SGUni= t state. */ + xe_i2c_pm_resume(xe, true); =20 regmap =3D devm_regmap_init(drm_dev, NULL, i2c, &i2c_regmap_config); if (IS_ERR(regmap)) diff --git a/drivers/gpu/drm/xe/xe_i2c.h b/drivers/gpu/drm/xe/xe_i2c.h index 7ea40f4e4aa4..b767ed8ce52b 100644 --- a/drivers/gpu/drm/xe/xe_i2c.h +++ b/drivers/gpu/drm/xe/xe_i2c.h @@ -50,9 +50,13 @@ struct xe_i2c { #if IS_ENABLED(CONFIG_I2C) int xe_i2c_probe(struct xe_device *xe); void xe_i2c_irq_handler(struct xe_device *xe, u32 master_ctl); +void xe_i2c_pm_suspend(struct xe_device *xe); +void xe_i2c_pm_resume(struct xe_device *xe, bool d3cold); #else static inline int xe_i2c_probe(struct xe_device *xe) { return 0; } static inline void xe_i2c_irq_handler(struct xe_device *xe, u32 master_ctl= ) { } +static inline void xe_i2c_pm_suspend(struct xe_device *xe) { } +static inline void xe_i2c_pm_resume(struct xe_device *xe, bool d3cold) { } #endif =20 #endif diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c index 26e95460af87..46471e166b96 100644 --- a/drivers/gpu/drm/xe/xe_pm.c +++ b/drivers/gpu/drm/xe/xe_pm.c @@ -19,6 +19,7 @@ #include "xe_ggtt.h" #include "xe_gt.h" #include "xe_guc.h" +#include "xe_i2c.h" #include "xe_irq.h" #include "xe_pcode.h" #include "xe_pxp.h" @@ -146,6 +147,8 @@ int xe_pm_suspend(struct xe_device *xe) =20 xe_display_pm_suspend_late(xe); =20 + xe_i2c_pm_suspend(xe); + drm_dbg(&xe->drm, "Device suspended\n"); return 0; =20 @@ -191,6 +194,8 @@ int xe_pm_resume(struct xe_device *xe) if (err) goto err; =20 + xe_i2c_pm_resume(xe, xe->d3cold.allowed); + xe_irq_resume(xe); =20 for_each_gt(gt, xe, id) @@ -484,6 +489,8 @@ int xe_pm_runtime_suspend(struct xe_device *xe) =20 xe_display_pm_runtime_suspend_late(xe); =20 + xe_i2c_pm_suspend(xe); + xe_rpm_lockmap_release(xe); xe_pm_write_callback_task(xe, NULL); return 0; @@ -531,6 +538,8 @@ int xe_pm_runtime_resume(struct xe_device *xe) goto out; } =20 + xe_i2c_pm_resume(xe, xe->d3cold.allowed); + xe_irq_resume(xe); =20 for_each_gt(gt, xe, id) --=20 2.47.2