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Tue, 01 Jul 2025 08:32:58 -0700 (PDT) From: James Clark Date: Tue, 01 Jul 2025 16:31:57 +0100 Subject: [PATCH 1/3] perf: arm_spe: Add barrier before enabling profiling buffer Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250701-james-spe-vm-interface-v1-1-52a2cd223d00@linaro.org> References: <20250701-james-spe-vm-interface-v1-0-52a2cd223d00@linaro.org> In-Reply-To: <20250701-james-spe-vm-interface-v1-0-52a2cd223d00@linaro.org> To: Will Deacon , Mark Rutland , Catalin Marinas , Alexandru Elisei , Anshuman Khandual , Rob Herring , Suzuki Poulose , Robin Murphy Cc: linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, James Clark X-Mailer: b4 0.14.0 DEN0154 states that PMBPTR_EL1 must not be modified while the profiling buffer is enabled. Ensure that enabling the buffer comes after setting PMBPTR_EL1 by inserting an isb(). This only applies to guests for now, but in future versions of the architecture the PE will be allowed to behave in the same way. Fixes: d5d9696b0380 ("drivers/perf: Add support for ARMv8.2 Statistical Pro= filing Extension") Signed-off-by: James Clark --- drivers/perf/arm_spe_pmu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/perf/arm_spe_pmu.c b/drivers/perf/arm_spe_pmu.c index 3efed8839a4e..6235ca7ecd48 100644 --- a/drivers/perf/arm_spe_pmu.c +++ b/drivers/perf/arm_spe_pmu.c @@ -537,6 +537,7 @@ static void arm_spe_perf_aux_output_begin(struct perf_o= utput_handle *handle, limit +=3D (u64)buf->base; base =3D (u64)buf->base + PERF_IDX2OFF(handle->head, buf); write_sysreg_s(base, SYS_PMBPTR_EL1); + isb(); =20 out_write_limit: write_sysreg_s(limit, SYS_PMBLIMITR_EL1); --=20 2.34.1