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smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=D5/JIP5E; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="D5/JIP5E" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 34086C4CEE3; Mon, 30 Jun 2025 23:27:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1751326026; bh=KZZob1ziys11up+TERSy8DmK6bVQ82VouoWjvFI+MaM=; h=From:To:Cc:Subject:Date:From; b=D5/JIP5Eu0VhLKUHmDKQH+7FCS5H5+YTKoysCJqTYc4/ZDq3TkytfKLpB91PTi0hg KPmvJGztTTjs0YOehFRQMXDK59ULEUT0iH0EnkLNMAu6q1x7cQDDOQQwUsi4FdcmNN ILmSz3KMqnYsN4Thr5a/DVc6/+a7vVwZaJdA3JHCB2SJQrqB6ibGgN3ijC3WGf8uoY rgvRYm2cqFLAJ94LzfekRcnEcVs92SSaZFl1FocuJT9ohwYC24z8IdzJhwFOxAzEDS 1Yyaxj5FjN0v+Kbs49tefL56CepqKt4wNG8pCQI6TCs/k8rZWdy17UEwuGVIWQ/VXl F/IYf5XxUaZKA== From: "Rob Herring (Arm)" To: Michael Turquette , Stephen Boyd , Krzysztof Kozlowski , Conor Dooley , Daniel Mack Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] dt-bindings: clock: Convert maxim,max9485 to DT schema Date: Mon, 30 Jun 2025 18:26:57 -0500 Message-ID: <20250630232658.3701225-1-robh@kernel.org> X-Mailer: git-send-email 2.47.2 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Signed-off-by: Rob Herring (Arm) --- .../bindings/clock/maxim,max9485.txt | 59 ------------- .../bindings/clock/maxim,max9485.yaml | 82 +++++++++++++++++++ 2 files changed, 82 insertions(+), 59 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/maxim,max9485.t= xt create mode 100644 Documentation/devicetree/bindings/clock/maxim,max9485.y= aml diff --git a/Documentation/devicetree/bindings/clock/maxim,max9485.txt b/Do= cumentation/devicetree/bindings/clock/maxim,max9485.txt deleted file mode 100644 index b8f5c3bbf12b..000000000000 --- a/Documentation/devicetree/bindings/clock/maxim,max9485.txt +++ /dev/null @@ -1,59 +0,0 @@ -Devicetree bindings for Maxim MAX9485 Programmable Audio Clock Generator - -This device exposes 4 clocks in total: - -- MAX9485_MCLKOUT: A gated, buffered output of the input clock of 27 MHz -- MAX9485_CLKOUT: A PLL that can be configured to 16 different discrete - frequencies -- MAX9485_CLKOUT[1,2]: Two gated outputs for MAX9485_CLKOUT - -MAX9485_CLKOUT[1,2] are children of MAX9485_CLKOUT which upchain all rate = set -requests. - -Required properties: -- compatible: "maxim,max9485" -- clocks: Input clock, must provide 27.000 MHz -- clock-names: Must be set to "xclk" -- #clock-cells: From common clock binding; shall be set to 1 - -Optional properties: -- reset-gpios: GPIO descriptor connected to the #RESET input pin -- vdd-supply: A regulator node for Vdd -- clock-output-names: Name of output clocks, as defined in common clock - bindings - -If not explicitly set, the output names are "mclkout", "clkout", "clkout1" -and "clkout2". - -Clocks are defined as preprocessor macros in the dt-binding header. - -Example: - - #include - - xo-27mhz: xo-27mhz { - compatible =3D "fixed-clock"; - #clock-cells =3D <0>; - clock-frequency =3D <27000000>; - }; - - &i2c0 { - max9485: audio-clock@63 { - reg =3D <0x63>; - compatible =3D "maxim,max9485"; - clock-names =3D "xclk"; - clocks =3D <&xo-27mhz>; - reset-gpios =3D <&gpio 1 GPIO_ACTIVE_HIGH>; - vdd-supply =3D <&3v3-reg>; - #clock-cells =3D <1>; - }; - }; - - // Clock consumer node - - foo@0 { - compatible =3D "bar,foo"; - /* ... */ - clock-names =3D "foo-input-clk"; - clocks =3D <&max9485 MAX9485_CLKOUT1>; - }; diff --git a/Documentation/devicetree/bindings/clock/maxim,max9485.yaml b/D= ocumentation/devicetree/bindings/clock/maxim,max9485.yaml new file mode 100644 index 000000000000..f9d8941c7235 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/maxim,max9485.yaml @@ -0,0 +1,82 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/maxim,max9485.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Maxim MAX9485 Programmable Audio Clock Generator + +maintainers: + - Daniel Mack + +description: > + Maxim MAX9485 Programmable Audio Clock Generator exposes 4 clocks in tot= al: + + - MAX9485_MCLKOUT: A gated, buffered output of the input clock of 27 = MHz + - MAX9485_CLKOUT: A PLL that can be configured to 16 different discr= ete + frequencies + - MAX9485_CLKOUT[1,2]: Two gated outputs for MAX9485_CLKOUT + + MAX9485_CLKOUT[1,2] are children of MAX9485_CLKOUT which upchain all rat= e set + requests. + +properties: + compatible: + const: maxim,max9485 + + reg: + maxItems: 1 + + clocks: + description: Input clock. Must provide 27 MHz + maxItems: 1 + + clock-names: + items: + - const: xclk + + '#clock-cells': + const: 1 + + reset-gpios: + description: > + GPIO descriptor connected to the #RESET input pin + + vdd-supply: + description: A regulator node for Vdd + + clock-output-names: + description: Name of output clocks, as defined in common clock bindings + items: + - const: mclkout + - const: clkout + - const: clkout1 + - const: clkout2 + +required: + - compatible + - reg + - clocks + - clock-names + - '#clock-cells' + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells =3D <1>; + #size-cells =3D <0>; + + clock-controller@63 { + compatible =3D "maxim,max9485"; + reg =3D <0x63>; + #clock-cells =3D <1>; + clock-names =3D "xclk"; + clocks =3D <&xo_27mhz>; + reset-gpios =3D <&gpio 1 GPIO_ACTIVE_HIGH>; + vdd-supply =3D <®_3v3>; + }; + }; --=20 2.47.2