From nobody Wed Oct 8 10:00:53 2025 Received: from mout-p-202.mailbox.org (mout-p-202.mailbox.org [80.241.56.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 83DF71DC988; Sun, 29 Jun 2025 22:05:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=80.241.56.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751234717; cv=none; b=H1AiahEbcPXClpqjQzuj489ecfVrQcuazOuBXEbuE2uJdF9b6hn9CpERUaZHjPKZup+ywmnlJ/e0UT07B11vBhlFcw2ShIm87k3wnP3WPWvJ1v6iYo1wK9EpvueexQgGPsAXtwcgAwTMwjawg2Hx5GMaHlcZ8MWGjAJxBBRh1EQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751234717; c=relaxed/simple; bh=FI3QegmqdgygByP3S8dUbw/0GVJZXkqD0oaE0+hUZ9o=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=KO9G+PIm7vGitVfNmNHdq3F+YzFzKL3eJ3WagjTPYiLpMPy0mjvjaakhlWbXl99h7z1CxBoPRK5aBApiQE19eCfPthzTnTd+wegbhSXPRdwNAmzcP3Rpbzo2NLk0xdJkxSPTNDVMpgzuSHjspYfl0HjrXICA74clcuBPk9erzww= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=mailbox.org; spf=pass smtp.mailfrom=mailbox.org; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b=dZLcAFrT; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b=Snk5NeqI; arc=none smtp.client-ip=80.241.56.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=mailbox.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mailbox.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b="dZLcAFrT"; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b="Snk5NeqI" Received: from smtp202.mailbox.org (smtp202.mailbox.org [IPv6:2001:67c:2050:b231:465::202]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-p-202.mailbox.org (Postfix) with ESMTPS id 4bVjyd3WvZz9stg; Mon, 30 Jun 2025 00:05:13 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1751234713; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=wonIqwqE+gZtcXn2WE6N/pAhGaGx6R/BhYVp+2etRMk=; b=dZLcAFrTgcxfCPDqmmzeXnwWZKnWuxBRJphwxQJzOi5js7oJMhshlVu6cFT0bTbdemDgZy klyRdP9Ogh1lcQ3A9y9LZ9U/t18I98zipzGoW3GC4hUhd+soTt49Arrq6uHZWersaqE4MD nQSPuMu0ElXB9VpWzQ087MQjtBsK7OjilE1uXBT8fNbK8yXGEk06rGiqWmQiCuxEgVtjTu /NSrXxT6LzqYod4aEH+Eo82WejKX28Ij0CMyLfBeAXdQSRGvO1UWfWYkc/ewwnr2/drojz ltk6VhPF0RUA2w3VPT8TITwvmGgAQJTa5QNAXV82yuKvEvl2AsjotkLgme8PDg== From: Marek Vasut DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1751234711; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=wonIqwqE+gZtcXn2WE6N/pAhGaGx6R/BhYVp+2etRMk=; b=Snk5NeqIxlYLkGoTYhqpTkOw+9tVflrQkjGl/vH4BnTRhwH+lxc0lzrqQN/YaT2+PAlmzq 15b7ei26HInKT4UZcQY1FPC2w5UpGsNjlFz4R4HJRoYO6RxwGpnFyKYiBkfN6AfUASnZsQ f8eABpFDpgcPIy/THhwQ6fsCpqms6tV/min6CmxLEa8YY7s/26yBYtowQl/RnFsrK961wh R1Ka4nQGzIWxOBMAHw+ZcwRcb2QFxS+rOBj4bPOMsbvLbwzFvOExxvfUnF8DeKa3RHEzeI HGKEGUnDDikNEdFsg16vOZd26UEqq4Hf/FTT8+eIjpNaQ8c7wu+1I/Q5bNcnug== To: linux-arm-kernel@lists.infradead.org Cc: Marek Vasut , Conor Dooley , Geert Uytterhoeven , Krzysztof Kozlowski , Magnus Damm , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH] ARM: dts: renesas: Add boot phase tags marking to Renesas RZ/A1 Date: Mon, 30 Jun 2025 00:04:24 +0200 Message-ID: <20250629220502.935717-1-marek.vasut+renesas@mailbox.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MBO-RS-ID: cd501b2cf243314dd24 X-MBO-RS-META: q69wwtg3rufy5stjqdw1npekmohmqoaf X-Rspamd-Queue-Id: 4bVjyd3WvZz9stg Content-Type: text/plain; charset="utf-8" bootph-all as phase tag was added to dt-schema (dtschema/schemas/bootph.yam= l) to describe various node usage during boot phases with DT. Add bootph-all f= or all nodes that are used in the bootloader on Renesas RZ/A1 SoC. All SoC require BSC bus, PFC pin control and OSTM0 timer access during all stages of the boot process, those are marked using bootph-all property, and so is the SoC bus node which contains the PFC and OSTM IPs. Each board console UART is also marked as bootph-all to make it available in all stages of the boot process. Signed-off-by: Marek Vasut --- Cc: Conor Dooley Cc: Geert Uytterhoeven Cc: Krzysztof Kozlowski Cc: Magnus Damm Cc: Rob Herring Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org --- arch/arm/boot/dts/renesas/r7s72100-genmai.dts | 3 ++- arch/arm/boot/dts/renesas/r7s72100-gr-peach.dts | 3 ++- arch/arm/boot/dts/renesas/r7s72100-rskrza1.dts | 2 ++ arch/arm/boot/dts/renesas/r7s72100.dtsi | 5 +++++ 4 files changed, 11 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/renesas/r7s72100-genmai.dts b/arch/arm/boot/= dts/renesas/r7s72100-genmai.dts index c81840dfb7da..13c0324b8def 100644 --- a/arch/arm/boot/dts/renesas/r7s72100-genmai.dts +++ b/arch/arm/boot/dts/renesas/r7s72100-genmai.dts @@ -258,6 +258,7 @@ mmcif_pins: mmcif { }; =20 scif2_pins: serial2 { + bootph-all; /* P3_0 as TxD2; P3_2 as RxD2 */ pinmux =3D , ; }; @@ -286,7 +287,7 @@ &rtc { &scif2 { pinctrl-names =3D "default"; pinctrl-0 =3D <&scif2_pins>; - + bootph-all; status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/renesas/r7s72100-gr-peach.dts b/arch/arm/boo= t/dts/renesas/r7s72100-gr-peach.dts index 9d29861f23f1..e4f489522b2b 100644 --- a/arch/arm/boot/dts/renesas/r7s72100-gr-peach.dts +++ b/arch/arm/boot/dts/renesas/r7s72100-gr-peach.dts @@ -59,6 +59,7 @@ led1 { =20 &pinctrl { scif2_pins: serial2 { + bootph-all; /* P6_2 as RxD2; P6_3 as TxD2 */ pinmux =3D , ; }; @@ -109,7 +110,7 @@ &ostm1 { &scif2 { pinctrl-names =3D "default"; pinctrl-0 =3D <&scif2_pins>; - + bootph-all; status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/renesas/r7s72100-rskrza1.dts b/arch/arm/boot= /dts/renesas/r7s72100-rskrza1.dts index 25c6d0c78828..0bf106e9827e 100644 --- a/arch/arm/boot/dts/renesas/r7s72100-rskrza1.dts +++ b/arch/arm/boot/dts/renesas/r7s72100-rskrza1.dts @@ -199,6 +199,7 @@ keyboard_pins: keyboard { =20 /* Serial Console */ scif2_pins: serial2 { + bootph-all; pinmux =3D , /* TxD2 */ ; /* RxD2 */ }; @@ -278,6 +279,7 @@ &rtc { &scif2 { pinctrl-names =3D "default"; pinctrl-0 =3D <&scif2_pins>; + bootph-all; status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/renesas/r7s72100.dtsi b/arch/arm/boot/dts/re= nesas/r7s72100.dtsi index 1a866dbaf5e9..c78131e3cd24 100644 --- a/arch/arm/boot/dts/renesas/r7s72100.dtsi +++ b/arch/arm/boot/dts/renesas/r7s72100.dtsi @@ -41,6 +41,7 @@ bsc: bus { #address-cells =3D <1>; #size-cells =3D <1>; ranges =3D <0 0 0x18000000>; + bootph-all; }; =20 cpus { @@ -108,6 +109,8 @@ soc { #size-cells =3D <1>; ranges; =20 + bootph-all; + L2: cache-controller@3ffff000 { compatible =3D "arm,pl310-cache"; reg =3D <0x3ffff000 0x1000>; @@ -557,6 +560,7 @@ R7S72100_CLK_SDHI10 R7S72100_CLK_SDHI11 =20 pinctrl: pinctrl@fcfe3000 { compatible =3D "renesas,r7s72100-ports"; + bootph-all; =20 reg =3D <0xfcfe3000 0x4230>; =20 @@ -639,6 +643,7 @@ ostm0: timer@fcfec000 { interrupts =3D ; clocks =3D <&mstp5_clks R7S72100_CLK_OSTM0>; power-domains =3D <&cpg_clocks>; + bootph-all; status =3D "disabled"; }; =20 --=20 2.47.2