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charset="utf-8" The fb only deals with kms->vm, so make that explicit. This will start letting us refcount the # of times the fb is pinned, so we can only unpin the vma after last user of the fb is done. Having a single reference count really only works if there is only a single vm. Signed-off-by: Rob Clark Tested-by: Antonino Maniscalco Reviewed-by: Antonino Maniscalco --- .../drm/msm/disp/dpu1/dpu_encoder_phys_wb.c | 11 +++------- drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c | 18 +++++++---------- drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h | 3 +-- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 20 ++++++------------- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h | 2 -- drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c | 18 ++++++----------- drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c | 18 ++++++----------- drivers/gpu/drm/msm/msm_drv.h | 9 +++------ drivers/gpu/drm/msm/msm_fb.c | 15 +++++++------- 9 files changed, 39 insertions(+), 75 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c b/drivers/= gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c index 32e208ee946d..9a54da1c9e3c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c @@ -566,7 +566,6 @@ static void dpu_encoder_phys_wb_prepare_wb_job(struct d= pu_encoder_phys *phys_enc struct drm_writeback_job *job) { const struct msm_format *format; - struct msm_gem_vm *vm; struct dpu_hw_wb_cfg *wb_cfg; int ret; struct dpu_encoder_phys_wb *wb_enc =3D to_dpu_encoder_phys_wb(phys_enc); @@ -576,13 +575,12 @@ static void dpu_encoder_phys_wb_prepare_wb_job(struct= dpu_encoder_phys *phys_enc =20 wb_enc->wb_job =3D job; wb_enc->wb_conn =3D job->connector; - vm =3D phys_enc->dpu_kms->base.vm; =20 wb_cfg =3D &wb_enc->wb_cfg; =20 memset(wb_cfg, 0, sizeof(struct dpu_hw_wb_cfg)); =20 - ret =3D msm_framebuffer_prepare(job->fb, vm, false); + ret =3D msm_framebuffer_prepare(job->fb, false); if (ret) { DPU_ERROR("prep fb failed, %d\n", ret); return; @@ -596,7 +594,7 @@ static void dpu_encoder_phys_wb_prepare_wb_job(struct d= pu_encoder_phys *phys_enc return; } =20 - dpu_format_populate_addrs(vm, job->fb, &wb_cfg->dest); + dpu_format_populate_addrs(job->fb, &wb_cfg->dest); =20 wb_cfg->dest.width =3D job->fb->width; wb_cfg->dest.height =3D job->fb->height; @@ -619,14 +617,11 @@ static void dpu_encoder_phys_wb_cleanup_wb_job(struct= dpu_encoder_phys *phys_enc struct drm_writeback_job *job) { struct dpu_encoder_phys_wb *wb_enc =3D to_dpu_encoder_phys_wb(phys_enc); - struct msm_gem_vm *vm; =20 if (!job->fb) return; =20 - vm =3D phys_enc->dpu_kms->base.vm; - - msm_framebuffer_cleanup(job->fb, vm, false); + msm_framebuffer_cleanup(job->fb, false); wb_enc->wb_job =3D NULL; wb_enc->wb_conn =3D NULL; } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c b/drivers/gpu/drm/= msm/disp/dpu1/dpu_formats.c index d115b79af771..b0d585c5315c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c @@ -274,15 +274,14 @@ int dpu_format_populate_plane_sizes( return _dpu_format_populate_plane_sizes_linear(fmt, fb, layout); } =20 -static void _dpu_format_populate_addrs_ubwc(struct msm_gem_vm *vm, - struct drm_framebuffer *fb, +static void _dpu_format_populate_addrs_ubwc(struct drm_framebuffer *fb, struct dpu_hw_fmt_layout *layout) { const struct msm_format *fmt; uint32_t base_addr =3D 0; bool meta; =20 - base_addr =3D msm_framebuffer_iova(fb, vm, 0); + base_addr =3D msm_framebuffer_iova(fb, 0); =20 fmt =3D msm_framebuffer_format(fb); meta =3D MSM_FORMAT_IS_UBWC(fmt); @@ -355,26 +354,23 @@ static void _dpu_format_populate_addrs_ubwc(struct ms= m_gem_vm *vm, } } =20 -static void _dpu_format_populate_addrs_linear(struct msm_gem_vm *vm, - struct drm_framebuffer *fb, +static void _dpu_format_populate_addrs_linear(struct drm_framebuffer *fb, struct dpu_hw_fmt_layout *layout) { unsigned int i; =20 /* Populate addresses for simple formats here */ for (i =3D 0; i < layout->num_planes; ++i) - layout->plane_addr[i] =3D msm_framebuffer_iova(fb, vm, i); + layout->plane_addr[i] =3D msm_framebuffer_iova(fb, i); } =20 /** * dpu_format_populate_addrs - populate buffer addresses based on * mmu, fb, and format found in the fb - * @vm: address space pointer * @fb: framebuffer pointer * @layout: format layout structure to populate */ -void dpu_format_populate_addrs(struct msm_gem_vm *vm, - struct drm_framebuffer *fb, +void dpu_format_populate_addrs(struct drm_framebuffer *fb, struct dpu_hw_fmt_layout *layout) { const struct msm_format *fmt; @@ -384,7 +380,7 @@ void dpu_format_populate_addrs(struct msm_gem_vm *vm, /* Populate the addresses given the fb */ if (MSM_FORMAT_IS_UBWC(fmt) || MSM_FORMAT_IS_TILE(fmt)) - _dpu_format_populate_addrs_ubwc(vm, fb, layout); + _dpu_format_populate_addrs_ubwc(fb, layout); else - _dpu_format_populate_addrs_linear(vm, fb, layout); + _dpu_format_populate_addrs_linear(fb, layout); } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h b/drivers/gpu/drm/= msm/disp/dpu1/dpu_formats.h index 989f3e13c497..dc03f522e616 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h @@ -31,8 +31,7 @@ static inline bool dpu_find_format(u32 format, const u32 = *supported_formats, return false; } =20 -void dpu_format_populate_addrs(struct msm_gem_vm *vm, - struct drm_framebuffer *fb, +void dpu_format_populate_addrs(struct drm_framebuffer *fb, struct dpu_hw_fmt_layout *layout); =20 int dpu_format_populate_plane_sizes( diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/ms= m/disp/dpu1/dpu_plane.c index 6d47f43f52f7..07f0461223c3 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -646,7 +646,6 @@ static int dpu_plane_prepare_fb(struct drm_plane *plane, struct drm_framebuffer *fb =3D new_state->fb; struct dpu_plane *pdpu =3D to_dpu_plane(plane); struct dpu_plane_state *pstate =3D to_dpu_plane_state(new_state); - struct dpu_kms *kms =3D _dpu_plane_get_kms(&pdpu->base); int ret; =20 if (!new_state->fb) @@ -654,9 +653,6 @@ static int dpu_plane_prepare_fb(struct drm_plane *plane, =20 DPU_DEBUG_PLANE(pdpu, "FB[%u]\n", fb->base.id); =20 - /* cache vm */ - pstate->vm =3D kms->base.vm; - /* * TODO: Need to sort out the msm_framebuffer_prepare() call below so * we can use msm_atomic_prepare_fb() instead of doing the @@ -664,13 +660,10 @@ static int dpu_plane_prepare_fb(struct drm_plane *pla= ne, */ drm_gem_plane_helper_prepare_fb(plane, new_state); =20 - if (pstate->vm) { - ret =3D msm_framebuffer_prepare(new_state->fb, - pstate->vm, pstate->needs_dirtyfb); - if (ret) { - DPU_ERROR("failed to prepare framebuffer\n"); - return ret; - } + ret =3D msm_framebuffer_prepare(new_state->fb, pstate->needs_dirtyfb); + if (ret) { + DPU_ERROR("failed to prepare framebuffer\n"); + return ret; } =20 return 0; @@ -689,8 +682,7 @@ static void dpu_plane_cleanup_fb(struct drm_plane *plan= e, =20 DPU_DEBUG_PLANE(pdpu, "FB[%u]\n", old_state->fb->base.id); =20 - msm_framebuffer_cleanup(old_state->fb, old_pstate->vm, - old_pstate->needs_dirtyfb); + msm_framebuffer_cleanup(old_state->fb, old_pstate->needs_dirtyfb); } =20 static int dpu_plane_check_inline_rotation(struct dpu_plane *pdpu, @@ -1457,7 +1449,7 @@ static void dpu_plane_sspp_atomic_update(struct drm_p= lane *plane, pstate->needs_qos_remap |=3D (is_rt_pipe !=3D pdpu->is_rt_pipe); pdpu->is_rt_pipe =3D is_rt_pipe; =20 - dpu_format_populate_addrs(pstate->vm, new_state->fb, &pstate->layout); + dpu_format_populate_addrs(new_state->fb, &pstate->layout); =20 DPU_DEBUG_PLANE(pdpu, "FB[%u] " DRM_RECT_FP_FMT "->crtc%u " DRM_RECT_FMT ", %p4cc ubwc %d\n", fb->base.id, DRM_RECT_FP_ARG(&state->src), diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h b/drivers/gpu/drm/ms= m/disp/dpu1/dpu_plane.h index 3578f52048a5..a3a6e9028333 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h @@ -17,7 +17,6 @@ /** * struct dpu_plane_state: Define dpu extension of drm plane state object * @base: base drm plane state object - * @vm: pointer to address space for input/output buffers * @pipe: software pipe description * @r_pipe: software pipe description of the second pipe * @pipe_cfg: software pipe configuration @@ -34,7 +33,6 @@ */ struct dpu_plane_state { struct drm_plane_state base; - struct msm_gem_vm *vm; struct dpu_sw_pipe pipe; struct dpu_sw_pipe r_pipe; struct dpu_sw_pipe_cfg pipe_cfg; diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c b/drivers/gpu/drm/m= sm/disp/mdp4/mdp4_plane.c index 7743be6167f8..098c3b5ff2b2 100644 --- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c +++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c @@ -79,30 +79,25 @@ static const struct drm_plane_funcs mdp4_plane_funcs = =3D { static int mdp4_plane_prepare_fb(struct drm_plane *plane, struct drm_plane_state *new_state) { - struct msm_drm_private *priv =3D plane->dev->dev_private; - struct msm_kms *kms =3D priv->kms; - if (!new_state->fb) return 0; =20 drm_gem_plane_helper_prepare_fb(plane, new_state); =20 - return msm_framebuffer_prepare(new_state->fb, kms->vm, false); + return msm_framebuffer_prepare(new_state->fb, false); } =20 static void mdp4_plane_cleanup_fb(struct drm_plane *plane, struct drm_plane_state *old_state) { struct mdp4_plane *mdp4_plane =3D to_mdp4_plane(plane); - struct mdp4_kms *mdp4_kms =3D get_kms(plane); - struct msm_kms *kms =3D &mdp4_kms->base.base; struct drm_framebuffer *fb =3D old_state->fb; =20 if (!fb) return; =20 DBG("%s: cleanup: FB[%u]", mdp4_plane->name, fb->base.id); - msm_framebuffer_cleanup(fb, kms->vm, false); + msm_framebuffer_cleanup(fb, false); } =20 =20 @@ -141,7 +136,6 @@ static void mdp4_plane_set_scanout(struct drm_plane *pl= ane, { struct mdp4_plane *mdp4_plane =3D to_mdp4_plane(plane); struct mdp4_kms *mdp4_kms =3D get_kms(plane); - struct msm_kms *kms =3D &mdp4_kms->base.base; enum mdp4_pipe pipe =3D mdp4_plane->pipe; =20 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_A(pipe), @@ -153,13 +147,13 @@ static void mdp4_plane_set_scanout(struct drm_plane *= plane, MDP4_PIPE_SRC_STRIDE_B_P3(fb->pitches[3])); =20 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP0_BASE(pipe), - msm_framebuffer_iova(fb, kms->vm, 0)); + msm_framebuffer_iova(fb, 0)); mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP1_BASE(pipe), - msm_framebuffer_iova(fb, kms->vm, 1)); + msm_framebuffer_iova(fb, 1)); mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP2_BASE(pipe), - msm_framebuffer_iova(fb, kms->vm, 2)); + msm_framebuffer_iova(fb, 2)); mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP3_BASE(pipe), - msm_framebuffer_iova(fb, kms->vm, 3)); + msm_framebuffer_iova(fb, 3)); } =20 static void mdp4_write_csc_config(struct mdp4_kms *mdp4_kms, diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c b/drivers/gpu/drm/m= sm/disp/mdp5/mdp5_plane.c index 9f68a4747203..7c790406d533 100644 --- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c +++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c @@ -135,8 +135,6 @@ static const struct drm_plane_funcs mdp5_plane_funcs = =3D { static int mdp5_plane_prepare_fb(struct drm_plane *plane, struct drm_plane_state *new_state) { - struct msm_drm_private *priv =3D plane->dev->dev_private; - struct msm_kms *kms =3D priv->kms; bool needs_dirtyfb =3D to_mdp5_plane_state(new_state)->needs_dirtyfb; =20 if (!new_state->fb) @@ -144,14 +142,12 @@ static int mdp5_plane_prepare_fb(struct drm_plane *pl= ane, =20 drm_gem_plane_helper_prepare_fb(plane, new_state); =20 - return msm_framebuffer_prepare(new_state->fb, kms->vm, needs_dirtyfb); + return msm_framebuffer_prepare(new_state->fb, needs_dirtyfb); } =20 static void mdp5_plane_cleanup_fb(struct drm_plane *plane, struct drm_plane_state *old_state) { - struct mdp5_kms *mdp5_kms =3D get_kms(plane); - struct msm_kms *kms =3D &mdp5_kms->base.base; struct drm_framebuffer *fb =3D old_state->fb; bool needed_dirtyfb =3D to_mdp5_plane_state(old_state)->needs_dirtyfb; =20 @@ -159,7 +155,7 @@ static void mdp5_plane_cleanup_fb(struct drm_plane *pla= ne, return; =20 DBG("%s: cleanup: FB[%u]", plane->name, fb->base.id); - msm_framebuffer_cleanup(fb, kms->vm, needed_dirtyfb); + msm_framebuffer_cleanup(fb, needed_dirtyfb); } =20 static int mdp5_plane_atomic_check_with_state(struct drm_crtc_state *crtc_= state, @@ -467,8 +463,6 @@ static void set_scanout_locked(struct mdp5_kms *mdp5_km= s, enum mdp5_pipe pipe, struct drm_framebuffer *fb) { - struct msm_kms *kms =3D &mdp5_kms->base.base; - mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC_STRIDE_A(pipe), MDP5_PIPE_SRC_STRIDE_A_P0(fb->pitches[0]) | MDP5_PIPE_SRC_STRIDE_A_P1(fb->pitches[1])); @@ -478,13 +472,13 @@ static void set_scanout_locked(struct mdp5_kms *mdp5_= kms, MDP5_PIPE_SRC_STRIDE_B_P3(fb->pitches[3])); =20 mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC0_ADDR(pipe), - msm_framebuffer_iova(fb, kms->vm, 0)); + msm_framebuffer_iova(fb, 0)); mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC1_ADDR(pipe), - msm_framebuffer_iova(fb, kms->vm, 1)); + msm_framebuffer_iova(fb, 1)); mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC2_ADDR(pipe), - msm_framebuffer_iova(fb, kms->vm, 2)); + msm_framebuffer_iova(fb, 2)); mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC3_ADDR(pipe), - msm_framebuffer_iova(fb, kms->vm, 3)); + msm_framebuffer_iova(fb, 3)); } =20 /* Note: mdp5_plane->pipe_lock must be locked */ diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index 761e7e221ad9..eb009bd193e3 100644 --- a/drivers/gpu/drm/msm/msm_drv.h +++ b/drivers/gpu/drm/msm/msm_drv.h @@ -274,12 +274,9 @@ struct drm_gem_object *msm_gem_prime_import_sg_table(s= truct drm_device *dev, int msm_gem_prime_pin(struct drm_gem_object *obj); void msm_gem_prime_unpin(struct drm_gem_object *obj); =20 -int msm_framebuffer_prepare(struct drm_framebuffer *fb, - struct msm_gem_vm *vm, bool needs_dirtyfb); -void msm_framebuffer_cleanup(struct drm_framebuffer *fb, - struct msm_gem_vm *vm, bool needed_dirtyfb); -uint32_t msm_framebuffer_iova(struct drm_framebuffer *fb, - struct msm_gem_vm *vm, int plane); +int msm_framebuffer_prepare(struct drm_framebuffer *fb, bool needs_dirtyfb= ); +void msm_framebuffer_cleanup(struct drm_framebuffer *fb, bool needed_dirty= fb); +uint32_t msm_framebuffer_iova(struct drm_framebuffer *fb, int plane); struct drm_gem_object *msm_framebuffer_bo(struct drm_framebuffer *fb, int = plane); const struct msm_format *msm_framebuffer_format(struct drm_framebuffer *fb= ); struct drm_framebuffer *msm_framebuffer_create(struct drm_device *dev, diff --git a/drivers/gpu/drm/msm/msm_fb.c b/drivers/gpu/drm/msm/msm_fb.c index 6df318b73534..8a3b88130f4d 100644 --- a/drivers/gpu/drm/msm/msm_fb.c +++ b/drivers/gpu/drm/msm/msm_fb.c @@ -75,10 +75,10 @@ void msm_framebuffer_describe(struct drm_framebuffer *f= b, struct seq_file *m) =20 /* prepare/pin all the fb's bo's for scanout. */ -int msm_framebuffer_prepare(struct drm_framebuffer *fb, - struct msm_gem_vm *vm, - bool needs_dirtyfb) +int msm_framebuffer_prepare(struct drm_framebuffer *fb, bool needs_dirtyfb) { + struct msm_drm_private *priv =3D fb->dev->dev_private; + struct msm_gem_vm *vm =3D priv->kms->vm; struct msm_framebuffer *msm_fb =3D to_msm_framebuffer(fb); int ret, i, n =3D fb->format->num_planes; =20 @@ -98,10 +98,10 @@ int msm_framebuffer_prepare(struct drm_framebuffer *fb, return 0; } =20 -void msm_framebuffer_cleanup(struct drm_framebuffer *fb, - struct msm_gem_vm *vm, - bool needed_dirtyfb) +void msm_framebuffer_cleanup(struct drm_framebuffer *fb, bool needed_dirty= fb) { + struct msm_drm_private *priv =3D fb->dev->dev_private; + struct msm_gem_vm *vm =3D priv->kms->vm; struct msm_framebuffer *msm_fb =3D to_msm_framebuffer(fb); int i, n =3D fb->format->num_planes; =20 @@ -115,8 +115,7 @@ void msm_framebuffer_cleanup(struct drm_framebuffer *fb, memset(msm_fb->iova, 0, sizeof(msm_fb->iova)); } =20 -uint32_t msm_framebuffer_iova(struct drm_framebuffer *fb, - struct msm_gem_vm *vm, int plane) +uint32_t msm_framebuffer_iova(struct drm_framebuffer *fb, int plane) { struct msm_framebuffer *msm_fb =3D to_msm_framebuffer(fb); return msm_fb->iova[plane] + fb->offsets[plane]; --=20 2.50.0