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Fri, 27 Jun 2025 12:37:49 -0700 (PDT) Received: from iku.Home ([2a06:5906:61b:2d00:3b46:edb1:4d0:593b]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4538a3fe28dsm59655315e9.20.2025.06.27.12.37.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Jun 2025 12:37:48 -0700 (PDT) From: Prabhakar X-Google-Original-From: Prabhakar To: Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH v2] arm64: dts: renesas: Add CN15 eMMC and SD overlays for RZ/V2H and RZ/V2N EVKs Date: Fri, 27 Jun 2025 20:37:42 +0100 Message-ID: <20250627193742.110818-1-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.49.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Lad Prabhakar Introduce device tree overlays for supporting the eMMC (RTK0EF0186B02000BJ) and microSD (RTK0EF0186B01000BJ) sub-boards connected via the CN15 connector on the RZ/V2H and RZ/V2N evaluation kits. These overlays enable SDHI0 with appropriate pin control settings, power regulators, and GPIO handling. Both sub-boards are supported using shared overlay files that can be applied to either EVK due to their identical connector layout and interface support. To support this, new DT overlay files are added: - `rzv2-evk-cn15-emmc.dtso` for eMMC - `rzv2-evk-cn15-sd.dtso` for microSD Additionally, the base DTS files for both EVKs are updated to include a fixed 1.8V regulator (`reg_1p8v`) needed by the eMMC sub-board and potential future use cases such as HDMI output. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven --- v1->v2: - Dropped patch 2/3 from previous series as that has been merged. - Dropped adding alias in base DTS instead added in overlay. - Switched to using single overlay files for both RZ/V2H and RZ/V2N EVKs instead of separate overlays for each EVK. - Used RZG2L_GPIO and RZG2L_PORT_PINMUX to avoid using SoC specific macros. --- arch/arm64/boot/dts/renesas/Makefile | 8 +++ .../dts/renesas/r9a09g056n48-rzv2n-evk.dts | 9 +++ .../dts/renesas/r9a09g057h44-rzv2h-evk.dts | 9 +++ .../boot/dts/renesas/rzv2-evk-cn15-emmc.dtso | 50 +++++++++++++ .../boot/dts/renesas/rzv2-evk-cn15-sd.dtso | 70 +++++++++++++++++++ 5 files changed, 146 insertions(+) create mode 100644 arch/arm64/boot/dts/renesas/rzv2-evk-cn15-emmc.dtso create mode 100644 arch/arm64/boot/dts/renesas/rzv2-evk-cn15-sd.dtso diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/ren= esas/Makefile index 677ba3aa8931..a1bd652b58d1 100644 --- a/arch/arm64/boot/dts/renesas/Makefile +++ b/arch/arm64/boot/dts/renesas/Makefile @@ -161,8 +161,16 @@ r9a09g047e57-smarc-cru-csi-ov5645-dtbs :=3D r9a09g047e= 57-smarc.dtb r9a09g047e57-sm dtb-$(CONFIG_ARCH_R9A09G047) +=3D r9a09g047e57-smarc-cru-csi-ov5645.dtb =20 dtb-$(CONFIG_ARCH_R9A09G056) +=3D r9a09g056n48-rzv2n-evk.dtb +dtb-$(CONFIG_ARCH_R9A09G056) +=3D rzv2-evk-cn15-emmc.dtbo +r9a09g056n48-rzv2-evk-cn15-emmc.dts :=3D r9a09g056n48-rzv2n-evk.dtb rzv2-e= vk-cn15-emmc.dtbo +dtb-$(CONFIG_ARCH_R9A09G056) +=3D rzv2-evk-cn15-sd.dtbo +r9a09g056n48-rzv2-evk-cn15-sd.dts :=3D r9a09g056n48-rzv2n-evk.dtb rzv2-evk= -cn15-sd.dtbo =20 dtb-$(CONFIG_ARCH_R9A09G057) +=3D r9a09g057h44-rzv2h-evk.dtb +dtb-$(CONFIG_ARCH_R9A09G057) +=3D rzv2-evk-cn15-emmc.dtbo +r9a09g057h44-rzv2-evk-cn15-emmc.dts :=3D r9a09g057h44-rzv2h-evk.dtb rzv2-e= vk-cn15-emmc.dtbo +dtb-$(CONFIG_ARCH_R9A09G057) +=3D rzv2-evk-cn15-sd.dtbo +r9a09g057h44-rzv2-evk-cn15-sd.dts :=3D r9a09g057h44-rzv2h-evk.dtb rzv2-evk= -cn15-sd.dtbo dtb-$(CONFIG_ARCH_R9A09G057) +=3D r9a09g057h48-kakip.dtb =20 dtb-$(CONFIG_ARCH_RCAR_GEN3) +=3D draak-ebisu-panel-aa104xd12.dtbo diff --git a/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts b/arch/= arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts index 40014044bbc7..5829b9afaa95 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts +++ b/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts @@ -48,6 +48,15 @@ reg_0p8v: regulator-0p8v { regulator-always-on; }; =20 + reg_1p8v: regulator-1p8v { + compatible =3D "regulator-fixed"; + regulator-name =3D "fixed-1.8V"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-boot-on; + regulator-always-on; + }; + reg_3p3v: regulator-3p3v { compatible =3D "regulator-fixed"; regulator-name =3D "fixed-3.3V"; diff --git a/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts b/arch/= arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts index ae021546d895..886ce31c1674 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts +++ b/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts @@ -55,6 +55,15 @@ reg_0p8v: regulator-0p8v { regulator-always-on; }; =20 + reg_1p8v: regulator-1p8v { + compatible =3D "regulator-fixed"; + regulator-name =3D "fixed-1.8V"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-boot-on; + regulator-always-on; + }; + reg_3p3v: regulator-3p3v { compatible =3D "regulator-fixed"; =20 diff --git a/arch/arm64/boot/dts/renesas/rzv2-evk-cn15-emmc.dtso b/arch/arm= 64/boot/dts/renesas/rzv2-evk-cn15-emmc.dtso new file mode 100644 index 000000000000..eda2b31f6d79 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/rzv2-evk-cn15-emmc.dtso @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Shared DT overlay for the eMMC Sub Board (RTK0EF0186B02000BJ), which + * is connected to the CN15 connector on the RZ/V2H and RZ/V2N EVKs. + * + * Copyright (C) 2025 Renesas Electronics Corp. + */ + +/dts-v1/; +/plugin/; + +#include +#include + +&{/} { + aliases { + mmc0 =3D "/soc/mmc@15c00000"; + }; +}; + +&pinctrl { + sdhi0_emmc_pins: emmc-pins { + sd0-clk { + pins =3D "SD0CLK"; + renesas,output-impedance =3D <3>; + slew-rate =3D <0>; + }; + + sd0-dat-cmd { + pins =3D "SD0DAT0", "SD0DAT1", "SD0DAT2", "SD0DAT3", "SD0DAT4", + "SD0DAT5", "SD0DAT6", "SD0DAT7", "SD0CMD"; + input-enable; + renesas,output-impedance =3D <3>; + slew-rate =3D <0>; + }; + }; +}; + +&sdhi0 { + pinctrl-0 =3D <&sdhi0_emmc_pins>; + pinctrl-1 =3D <&sdhi0_emmc_pins>; + pinctrl-names =3D "default", "state_uhs"; + vmmc-supply =3D <®_3p3v>; + vqmmc-supply =3D <®_1p8v>; + bus-width =3D <8>; + mmc-hs200-1_8v; + non-removable; + fixed-emmc-driver-type =3D <1>; + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/renesas/rzv2-evk-cn15-sd.dtso b/arch/arm64= /boot/dts/renesas/rzv2-evk-cn15-sd.dtso new file mode 100644 index 000000000000..3e823b4093f5 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/rzv2-evk-cn15-sd.dtso @@ -0,0 +1,70 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Shared DT overlay for the microSD Sub Board (RTK0EF0186B01000BJ), which + * is connected to the CN15 connector on the RZ/V2H and RZ/V2N EVKs. + * + * Copyright (C) 2025 Renesas Electronics Corp. + */ + +/dts-v1/; +/plugin/; + +#include +#include + +&{/} { + aliases { + mmc0 =3D "/soc/mmc@15c00000"; + }; + + vqmmc_sdhi0: regulator-vqmmc-sdhi0 { + compatible =3D "regulator-gpio"; + regulator-name =3D "SDHI0 VqmmC"; + gpios =3D <&pinctrl RZG2L_GPIO(10, 0) GPIO_ACTIVE_HIGH>; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + gpios-states =3D <0>; + states =3D <3300000 0>, <1800000 1>; + }; +}; + +&pinctrl { + sdhi0-pwr-en-hog { + gpio-hog; + gpios =3D ; + output-high; + line-name =3D "sd0_pwr_en"; + }; + + sdhi0_pins: sd0 { + sd0-cd { + pinmux =3D ; /* SD0_CD */ + }; + + sd0-clk { + pins =3D "SD0CLK"; + renesas,output-impedance =3D <3>; + slew-rate =3D <0>; + }; + + sd0-dat-cmd { + pins =3D "SD0DAT0", "SD0DAT1", "SD0DAT2", "SD0DAT3", "SD0CMD"; + input-enable; + renesas,output-impedance =3D <3>; + slew-rate =3D <0>; + }; + }; +}; + +&sdhi0 { + pinctrl-0 =3D <&sdhi0_pins>; + pinctrl-1 =3D <&sdhi0_pins>; + pinctrl-names =3D "default", "state_uhs"; + vmmc-supply =3D <®_3p3v>; + vqmmc-supply =3D <&vqmmc_sdhi0>; + bus-width =3D <4>; + sd-uhs-sdr50; + sd-uhs-sdr104; + status =3D "okay"; +}; + --=20 2.49.0