From nobody Wed Oct 8 16:10:10 2025 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id BA7082980C2; Fri, 27 Jun 2025 09:05:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751015119; cv=none; b=BmzG+eCTaX8vbc0tBX3dt22QzzdGoYB2taW9NHruDE1jeLv5m5Q9cRn3a8KbMgAGK2kqFMEi8HFl1wn7Cwrh+qcqHISzNVdAU/la+N7pU3jMsNzseYC0d91o5CHPq03pu+/jMWOpgLed02uDjHzhVy3siiIdLq26CFaJ1Urd4Ao= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751015119; c=relaxed/simple; bh=JYTWJ4bzufmG4/W3c+dyWMhzf9Zd60/BveoZVPfRXoo=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=NCIzXunqrsfwYgOIry9uhF4WOYsrFx/2Gon3pyrRC5JCUGs09yuhVnUqf4iDGDz39T6ySNEHaboddCIosgI5gbMXsMf6ykoWXgJ9b0qqOdKM/DA/ogqt6L+CzCZUx2xKfR6quLYYzfQqLdHhdOPWRuPl8N8UQqQhaagrBpZKjTE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn; spf=pass smtp.mailfrom=loongson.cn; arc=none smtp.client-ip=114.242.206.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8BxJHDIXl5oRzIeAQ--.25960S3; Fri, 27 Jun 2025 17:05:12 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowJCxM+TEXl5ovCsAAA--.1247S3; Fri, 27 Jun 2025 17:05:11 +0800 (CST) From: Bibo Mao To: Tianrui Zhao , Huacai Chen , Xianglai Li Cc: kvm@vger.kernel.org, loongarch@lists.linux.dev, linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: [PATCH v4 1/6] LoongArch: KVM: Fix interrupt route update with eiointc Date: Fri, 27 Jun 2025 17:05:02 +0800 Message-Id: <20250627090507.808319-2-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20250627090507.808319-1-maobibo@loongson.cn> References: <20250627090507.808319-1-maobibo@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowJCxM+TEXl5ovCsAAA--.1247S3 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Content-Type: text/plain; charset="utf-8" With function eiointc_update_sw_coremap(), there is forced assignment like val =3D *(u64 *)pvalue. Parameter pvalue may be pointer to char type or others, there is problem with forced assignment with u64 type. Here the detailed value is passed rather address pointer. Cc: stable@vger.kernel.org Fixes: 3956a52bc05b ("LoongArch: KVM: Add EIOINTC read and write functions") Signed-off-by: Bibo Mao --- arch/loongarch/kvm/intc/eiointc.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/arch/loongarch/kvm/intc/eiointc.c b/arch/loongarch/kvm/intc/ei= ointc.c index f39929d7bf8a..d2c521b0e923 100644 --- a/arch/loongarch/kvm/intc/eiointc.c +++ b/arch/loongarch/kvm/intc/eiointc.c @@ -66,10 +66,9 @@ static void eiointc_update_irq(struct loongarch_eiointc = *s, int irq, int level) } =20 static inline void eiointc_update_sw_coremap(struct loongarch_eiointc *s, - int irq, void *pvalue, u32 len, bool notify) + int irq, u64 val, u32 len, bool notify) { int i, cpu; - u64 val =3D *(u64 *)pvalue; =20 for (i =3D 0; i < len; i++) { cpu =3D val & 0xff; @@ -398,7 +397,7 @@ static int loongarch_eiointc_writeb(struct kvm_vcpu *vc= pu, irq =3D offset - EIOINTC_COREMAP_START; index =3D irq; s->coremap.reg_u8[index] =3D data; - eiointc_update_sw_coremap(s, irq, (void *)&data, sizeof(data), true); + eiointc_update_sw_coremap(s, irq, data, sizeof(data), true); break; default: ret =3D -EINVAL; @@ -484,7 +483,7 @@ static int loongarch_eiointc_writew(struct kvm_vcpu *vc= pu, irq =3D offset - EIOINTC_COREMAP_START; index =3D irq >> 1; s->coremap.reg_u16[index] =3D data; - eiointc_update_sw_coremap(s, irq, (void *)&data, sizeof(data), true); + eiointc_update_sw_coremap(s, irq, data, sizeof(data), true); break; default: ret =3D -EINVAL; @@ -570,7 +569,7 @@ static int loongarch_eiointc_writel(struct kvm_vcpu *vc= pu, irq =3D offset - EIOINTC_COREMAP_START; index =3D irq >> 2; s->coremap.reg_u32[index] =3D data; - eiointc_update_sw_coremap(s, irq, (void *)&data, sizeof(data), true); + eiointc_update_sw_coremap(s, irq, data, sizeof(data), true); break; default: ret =3D -EINVAL; @@ -656,7 +655,7 @@ static int loongarch_eiointc_writeq(struct kvm_vcpu *vc= pu, irq =3D offset - EIOINTC_COREMAP_START; index =3D irq >> 3; s->coremap.reg_u64[index] =3D data; - eiointc_update_sw_coremap(s, irq, (void *)&data, sizeof(data), true); + eiointc_update_sw_coremap(s, irq, data, sizeof(data), true); break; default: ret =3D -EINVAL; @@ -809,7 +808,7 @@ static int kvm_eiointc_ctrl_access(struct kvm_device *d= ev, for (i =3D 0; i < (EIOINTC_IRQS / 4); i++) { start_irq =3D i * 4; eiointc_update_sw_coremap(s, start_irq, - (void *)&s->coremap.reg_u32[i], sizeof(u32), false); + s->coremap.reg_u32[i], sizeof(u32), false); } break; default: --=20 2.39.3