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Fri, 27 Jun 2025 15:48:25 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA01.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 55RFmOl1022557 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 27 Jun 2025 15:48:24 GMT Received: from hu-vgarodia-hyd.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Fri, 27 Jun 2025 08:48:20 -0700 From: Vikash Garodia Date: Fri, 27 Jun 2025 21:18:07 +0530 Subject: [PATCH v3 1/5] media: dt-bindings: add non-pixel property in iris schema Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20250627-video_cb-v3-1-51e18c0ffbce@quicinc.com> References: <20250627-video_cb-v3-0-51e18c0ffbce@quicinc.com> In-Reply-To: <20250627-video_cb-v3-0-51e18c0ffbce@quicinc.com> To: Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , , Vikash Garodia X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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Video hardware is designed to emit different stream-ID for pixel and non-pixel buffers, thereby introduce a non-pixel sub node to handle non-pixel stream-ID. With this, both iris and non-pixel device can have IOVA range of 0-4GiB individually. Certain video usecases like higher video concurrency needs IOVA higher than 4GiB. Add reference to the reserve-memory schema, which defines reserved IOVA regions that are *excluded* from addressable range. Video hardware generates different stream IDs based on the predefined range of IOVA addresses. Thereby IOVA addresses for firmware and data buffers need to be non overlapping. For ex. 0x0-0x25800000 address range is reserved for firmware stream-ID, while non-pixel (bitstream) stream-ID can be generated by hardware only when bitstream buffers IOVA address is from 0x25800000-0xe0000000. Non-pixel stream-ID can now be part of the new sub-node, hence iommus in iris node can have either 1 entry for pixel stream-id or 2 entries for pixel and non-pixel stream-ids. Signed-off-by: Vikash Garodia Reviewed-by: Bryan O'Donoghue --- .../bindings/media/qcom,sm8550-iris.yaml | 40 ++++++++++++++++++= ++-- 1 file changed, 38 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml = b/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml index c79bf2101812d83b99704f38b7348a9f728dff44..4dda2c9ca1293baa7aee3b9ee10= aff38d280fe05 100644 --- a/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml @@ -65,10 +65,31 @@ properties: - const: core =20 iommus: + minItems: 1 maxItems: 2 =20 dma-coherent: true =20 + non-pixel: + type: object + additionalProperties: false + + description: + Non pixel context bank is needed when video hardware have distinct i= ommus + for non pixel buffers. Non pixel buffers are mainly compressed and + internal buffers. + + properties: + iommus: + maxItems: 1 + + memory-region: + maxItems: 1 + + required: + - iommus + - memory-region + operating-points-v2: true =20 opp-table: @@ -86,6 +107,7 @@ required: =20 allOf: - $ref: qcom,venus-common.yaml# + - $ref: /schemas/reserved-memory/reserved-memory.yaml - if: properties: compatible: @@ -117,6 +139,16 @@ examples: #include #include =20 + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + + iris_resv: reservation-iris { + iommu-addresses =3D <&iris_non_pixel 0x0 0x0 0x0 0x25800000>, + <&iris_non_pixel 0x0 0xe0000000 0x0 0x20000000>; + }; + }; + video-codec@aa00000 { compatible =3D "qcom,sm8550-iris"; reg =3D <0x0aa00000 0xf0000>; @@ -144,12 +176,16 @@ examples: resets =3D <&gcc GCC_VIDEO_AXI0_CLK_ARES>; reset-names =3D "bus"; =20 - iommus =3D <&apps_smmu 0x1940 0x0000>, - <&apps_smmu 0x1947 0x0000>; + iommus =3D <&apps_smmu 0x1947 0x0000>; dma-coherent; =20 operating-points-v2 =3D <&iris_opp_table>; =20 + iris_non_pixel: non-pixel { + iommus =3D <&apps_smmu 0x1940 0x0000>; + memory-region =3D <&iris_resv>; + }; + iris_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 --=20 2.34.1