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Fri, 27 Jun 2025 15:32:58 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 55RFWviX006326 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 27 Jun 2025 15:32:57 GMT Received: from hu-vgarodia-hyd.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Fri, 27 Jun 2025 08:32:54 -0700 From: Vikash Garodia Date: Fri, 27 Jun 2025 21:02:38 +0530 Subject: [PATCH v2 1/5] media: dt-bindings: add non-pixel property in iris schema Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20250627-video_cb-v2-1-3931c3f49361@quicinc.com> References: <20250627-video_cb-v2-0-3931c3f49361@quicinc.com> In-Reply-To: <20250627-video_cb-v2-0-3931c3f49361@quicinc.com> To: Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , , Vikash Garodia X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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Video hardware is designed to emit different stream-ID for pixel and non-pixel buffers, thereby introduce a non-pixel sub node to handle non-pixel stream-ID. With this, both iris and non-pixel device can have IOVA range of 0-4GiB individually. Certain video usecases like higher video concurrency needs IOVA higher than 4GiB. Add reference to the reserve-memory schema, which defines reserved IOVA regions that are *excluded* from addressable range. Video hardware generates different stream IDs based on the predefined range of IOVA addresses. Thereby IOVA addresses for firmware and data buffers need to be non overlapping. For ex. 0x0-0x25800000 address range is reserved for firmware stream-ID, while non-pixel (bitstream) stream-ID can be generated by hardware only when bitstream buffers IOVA address is from 0x25800000-0xe0000000. Signed-off-by: Vikash Garodia --- .../bindings/media/qcom,sm8550-iris.yaml | 40 ++++++++++++++++++= ++-- 1 file changed, 38 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml = b/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml index c79bf2101812d83b99704f38b7348a9f728dff44..4dda2c9ca1293baa7aee3b9ee10= aff38d280fe05 100644 --- a/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml @@ -65,10 +65,31 @@ properties: - const: core =20 iommus: + minItems: 1 maxItems: 2 =20 dma-coherent: true =20 + non-pixel: + type: object + additionalProperties: false + + description: + Non pixel context bank is needed when video hardware have distinct i= ommus + for non pixel buffers. Non pixel buffers are mainly compressed and + internal buffers. + + properties: + iommus: + maxItems: 1 + + memory-region: + maxItems: 1 + + required: + - iommus + - memory-region + operating-points-v2: true =20 opp-table: @@ -86,6 +107,7 @@ required: =20 allOf: - $ref: qcom,venus-common.yaml# + - $ref: /schemas/reserved-memory/reserved-memory.yaml - if: properties: compatible: @@ -117,6 +139,16 @@ examples: #include #include =20 + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + + iris_resv: reservation-iris { + iommu-addresses =3D <&iris_non_pixel 0x0 0x0 0x0 0x25800000>, + <&iris_non_pixel 0x0 0xe0000000 0x0 0x20000000>; + }; + }; + video-codec@aa00000 { compatible =3D "qcom,sm8550-iris"; reg =3D <0x0aa00000 0xf0000>; @@ -144,12 +176,16 @@ examples: resets =3D <&gcc GCC_VIDEO_AXI0_CLK_ARES>; reset-names =3D "bus"; =20 - iommus =3D <&apps_smmu 0x1940 0x0000>, - <&apps_smmu 0x1947 0x0000>; + iommus =3D <&apps_smmu 0x1947 0x0000>; dma-coherent; =20 operating-points-v2 =3D <&iris_opp_table>; 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This ensures proper IOMMU attachment and DMA setup for the "non_pixel" device. All non pixel memory, i.e bitstream buffers, HFI queues and internal buffers related to bitstream processing, would be managed by non_pixel device. Signed-off-by: Vikash Garodia --- drivers/media/platform/qcom/iris/iris_core.h | 2 ++ drivers/media/platform/qcom/iris/iris_probe.c | 50 +++++++++++++++++++++++= +++- 2 files changed, 51 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/qcom/iris/iris_core.h b/drivers/media/p= latform/qcom/iris/iris_core.h index aeeac32a1f6d9a9fa7027e8e3db4d95f021c552e..757efd16870876bd2b1d5b1e410= 3b2d2326b5f49 100644 --- a/drivers/media/platform/qcom/iris/iris_core.h +++ b/drivers/media/platform/qcom/iris/iris_core.h @@ -65,6 +65,7 @@ struct icc_info { * @sys_error_handler: a delayed work for handling system fatal error * @instances: a list_head of all instances * @inst_fw_caps: an array of supported instance capabilities + * @np_dev: device to represent non pixel node */ =20 struct iris_core { @@ -105,6 +106,7 @@ struct iris_core { struct delayed_work sys_error_handler; struct list_head instances; struct platform_inst_fw_cap inst_fw_caps[INST_FW_CAP_MAX]; + struct device *np_dev; }; =20 int iris_core_init(struct iris_core *core); diff --git a/drivers/media/platform/qcom/iris/iris_probe.c b/drivers/media/= platform/qcom/iris/iris_probe.c index 9a7ce142f7007ffcda0bd422c1983f2374bb0d92..8fe87e30bd40f3c67ec41305c7d= 73520fbc9db7b 100644 --- a/drivers/media/platform/qcom/iris/iris_probe.c +++ b/drivers/media/platform/qcom/iris/iris_probe.c @@ -6,6 +6,8 @@ #include #include #include +#include +#include #include #include #include @@ -127,6 +129,46 @@ static int iris_init_resets(struct iris_core *core) core->iris_platform_data->controller_rst_tbl_size); } =20 +static int iris_init_non_pixel_node(struct iris_core *core) +{ + struct platform_device_info info; + struct platform_device *pdev; + struct device_node *np_node; + int ret; + + np_node =3D of_get_child_by_name(core->dev->of_node, "non_pixel"); + if (!np_node) + return 0; + + memset(&info, 0, sizeof(info)); + info.fwnode =3D &np_node->fwnode; + info.parent =3D core->dev; + info.name =3D np_node->name; + info.dma_mask =3D DMA_BIT_MASK(32); + + pdev =3D platform_device_register_full(&info); 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This allows platforms with separate DMA domain for non-pixel to use the appropriate device handle when managing HFI queues and SFR regions. Signed-off-by: Vikash Garodia --- drivers/media/platform/qcom/iris/iris_hfi_queue.c | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_hfi_queue.c b/drivers/me= dia/platform/qcom/iris/iris_hfi_queue.c index fac7df0c4d1aec647aeca275ab19651c9ba23733..a31ebe947f525f0d7c09f8b7869= 39d01b62532c3 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_queue.c +++ b/drivers/media/platform/qcom/iris/iris_hfi_queue.c @@ -247,24 +247,27 @@ static void iris_hfi_queue_deinit(struct iris_iface_q= _info *iface_q) int iris_hfi_queues_init(struct iris_core *core) { struct iris_hfi_queue_table_header *q_tbl_hdr; + struct device *dev; u32 queue_size; =20 + dev =3D core->np_dev ? core->np_dev : core->dev; + /* Iris hardware requires 4K queue alignment */ queue_size =3D ALIGN((sizeof(*q_tbl_hdr) + (IFACEQ_QUEUE_SIZE * IFACEQ_NU= MQ)), SZ_4K); - core->iface_q_table_vaddr =3D dma_alloc_attrs(core->dev, queue_size, + core->iface_q_table_vaddr =3D dma_alloc_attrs(dev, queue_size, &core->iface_q_table_daddr, GFP_KERNEL, DMA_ATTR_WRITE_COMBINE); if (!core->iface_q_table_vaddr) { - dev_err(core->dev, "queues alloc and map failed\n"); + dev_err(dev, "queues alloc and map failed\n"); return -ENOMEM; } =20 - core->sfr_vaddr =3D dma_alloc_attrs(core->dev, SFR_SIZE, + core->sfr_vaddr =3D dma_alloc_attrs(dev, SFR_SIZE, &core->sfr_daddr, GFP_KERNEL, DMA_ATTR_WRITE_COMBINE); if (!core->sfr_vaddr) { - dev_err(core->dev, "sfr alloc and map failed\n"); - dma_free_attrs(core->dev, sizeof(*q_tbl_hdr), core->iface_q_table_vaddr, + dev_err(dev, "sfr alloc and map failed\n"); + dma_free_attrs(dev, sizeof(*q_tbl_hdr), core->iface_q_table_vaddr, core->iface_q_table_daddr, DMA_ATTR_WRITE_COMBINE); return -ENOMEM; } @@ -292,6 +295,7 @@ int iris_hfi_queues_init(struct iris_core *core) =20 void iris_hfi_queues_deinit(struct iris_core *core) { + struct device *dev; u32 queue_size; =20 if (!core->iface_q_table_vaddr) @@ -301,7 +305,9 @@ void iris_hfi_queues_deinit(struct iris_core *core) iris_hfi_queue_deinit(&core->message_queue); iris_hfi_queue_deinit(&core->command_queue); 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DPB(decoded picture buffer) buffers are internal buffers associated with pixel buffers, hence they are not part of "non_pixel" device. Signed-off-by: Vikash Garodia --- drivers/media/platform/qcom/iris/iris_buffer.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_buffer.c b/drivers/media= /platform/qcom/iris/iris_buffer.c index e5c5a564fcb81e77746df8c4797a10a07f2ae946..0bf6041936175d03a51985be148= e78894fc3e990 100644 --- a/drivers/media/platform/qcom/iris/iris_buffer.c +++ b/drivers/media/platform/qcom/iris/iris_buffer.c @@ -265,6 +265,7 @@ static int iris_create_internal_buffer(struct iris_inst= *inst, struct iris_buffers *buffers =3D &inst->buffers[buffer_type]; struct iris_core *core =3D inst->core; struct iris_buffer *buffer; + struct device *dev; =20 if (!buffers->size) return 0; @@ -280,7 +281,11 @@ static int iris_create_internal_buffer(struct iris_ins= t *inst, buffer->dma_attrs =3D DMA_ATTR_WRITE_COMBINE | DMA_ATTR_NO_KERNEL_MAPPING; list_add_tail(&buffer->list, &buffers->list); =20 - buffer->kvaddr =3D dma_alloc_attrs(core->dev, buffer->buffer_size, + dev =3D core->np_dev ? core->np_dev : core->dev; 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It prefers the non_pixel device(np_dev) when available, falling back to core->dev otherwise. Signed-off-by: Vikash Garodia --- drivers/media/platform/qcom/iris/iris_vb2.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/media/platform/qcom/iris/iris_vb2.c b/drivers/media/pl= atform/qcom/iris/iris_vb2.c index cdf11feb590b5cb7804db3fcde7282fb1f9f1a1e..01cc337970400d48063c558c1ac= 039539dbcbaba 100644 --- a/drivers/media/platform/qcom/iris/iris_vb2.c +++ b/drivers/media/platform/qcom/iris/iris_vb2.c @@ -159,6 +159,10 @@ int iris_vb2_queue_setup(struct vb2_queue *q, *num_planes =3D 1; sizes[0] =3D f->fmt.pix_mp.plane_fmt[0].sizeimage; =20 + if (q->type =3D=3D V4L2_BUF_TYPE_VIDEO_OUTPUT || + q->type =3D=3D V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) + q->dev =3D core->np_dev ? core->np_dev : core->dev; + unlock: mutex_unlock(&inst->lock); =20 --=20 2.34.1