From nobody Wed Oct 8 14:52:38 2025 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5E1A52D1914; Fri, 27 Jun 2025 09:09:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751015395; cv=none; b=H0STeOCq2zcYJUHms/CdrcMxLQu31GwBAccm/fYTdy3ru2JDMDDHaQqFp1l4SwaqS5zpI1vWC5GZpF45ydeHwWG1DjGLfXGqUY3LxRJ3hImdHbfgrmIG0EcuMy4SJp8LuCgB14EIHj6OywHtowEo38NVVaNXV0OVe5zhk0GR8Bc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751015395; c=relaxed/simple; bh=jc3c9T7zBKk08gXb+SWzLy5BdXpmqLSWASVICeMMYnk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=I+xsnr17fuYY+N6YAG+XmAWW7Ep3B96NoUvEUr+b3na0Fhe3Aj5+CJb2sY9MuPE4AmCG1WDKzURK+Wd2KJEnlEUkFx7gotPbsDqiqDlrJto0aBQNCXTBbKKy0sQGt7zLyBANUJ0MbrsOnr2fHxT8JoEWu8mzMB2yiT1EleURHn8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=Yt661UtJ; arc=none smtp.client-ip=217.70.183.200 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="Yt661UtJ" Received: by mail.gandi.net (Postfix) with ESMTPSA id 7C13A43916; Fri, 27 Jun 2025 09:09:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1751015391; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=0e77s5AONBGZ93Anb3sgLgMItwu5elVegMgqEAQHQ10=; b=Yt661UtJ6JqApeYIF1kmeDaKSR5Hdm9fyk1zP0de/WL3UThjzPa96AtiIn5oAqw04kVong rblm/5dOF2f6UV0Z/eGh7sND7/rXg2iAMmDs7umvI0oG2vjbI+C2AmrsInHCnPyVWBmkxV HXFHT7qwsGmo9AFw60swfqaxg02Fd717B4cj7Qx8hsoCd1MGCGwG0b0Wl+4DUZl5InU+tc JIB1Fzy5ZJw6kxF+1gi7qPNiVTyczbGkUf62RAlj4HwtJCnExInhLlxKT35GzKY9JYtIQS A39/dFZ6VkuYFLDOLZY3AE6p2RgdRLR29BdznHDhkPIgxn+UT5L1vRHcizA/FA== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Fri, 27 Jun 2025 11:09:01 +0200 Subject: [PATCH net-next v2 15/18] net: macb: Add "mobileye,eyeq5-gem" compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250627-macb-v2-15-ff8207d0bb77@bootlin.com> References: <20250627-macb-v2-0-ff8207d0bb77@bootlin.com> In-Reply-To: <20250627-macb-v2-0-ff8207d0bb77@bootlin.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Nicolas Ferre , Claudiu Beznea , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Samuel Holland , Richard Cochran , Russell King , Thomas Bogendoerfer , Vladimir Kondratiev , Gregory CLEMENT , Cyrille Pitchen , Harini Katakam , Rafal Ozieblo , Haavard Skinnemoen , Jeff Garzik Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-mips@vger.kernel.org, Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.14.2 X-GND-State: clean X-GND-Score: -100 X-GND-Cause: gggruggvucftvghtrhhoucdtuddrgeeffedrtdefgddvieeiucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuifetpfffkfdpucggtfgfnhhsuhgsshgtrhhisggvnecuuegrihhlohhuthemuceftddunecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenucfjughrpefhfffugggtgffkfhgjvfevofesthekredtredtjeenucfhrhhomhepvfhhrohoucfnvggsrhhunhcuoehthhgvohdrlhgvsghruhhnsegsohhothhlihhnrdgtohhmqeenucggtffrrghtthgvrhhnpeelvefhkeeufedvkefghefhgfdukeejlefgtdehtdeivddtteetgedvieelieeuhfenucfkphepvdgrtddumegtsgdugeemheehieemjegrtddtmeeiieegsgemfhdtfhhfmehfvgdutdemlegvfhgunecuvehluhhsthgvrhfuihiivgepuddtnecurfgrrhgrmhepihhnvghtpedvrgdtudemtggsudegmeehheeimeejrgdttdemieeigegsmehftdhffhemfhgvuddtmeelvghfugdphhgvlhhopegludelvddrudeikedruddtrddvudegngdpmhgrihhlfhhrohhmpehthhgvohdrlhgvsghruhhnsegsohhothhlihhnrdgtohhmpdhnsggprhgtphhtthhopeefvddprhgtphhtthhopehrihgthhgrrhgutghotghhrhgrnhesghhmrghilhdrtghomhdprhgtphhtthhopehnvghtuggvvhesvhhgvghrrdhkvghrnhgvlhdrohhrghdprhgtphhtthhopehvlhgrughimhhirhdrkhhonhgurhgrthhivghvsehmohgsihhlvgihvgdrt ghomhdprhgtphhtthhopegrohhusegvvggtshdrsggvrhhkvghlvgihrdgvughupdhrtghpthhtohepphgruhhlrdifrghlmhhslhgvhiesshhifhhivhgvrdgtohhmpdhrtghpthhtoheplhhinhhugidqkhgvrhhnvghlsehvghgvrhdrkhgvrhhnvghlrdhorhhgpdhrtghpthhtohepthhssghoghgvnhgusegrlhhphhgrrdhfrhgrnhhkvghnrdguvgdprhgtphhtthhopehprggsvghnihesrhgvughhrghtrdgtohhm X-GND-Sasl: theo.lebrun@bootlin.com Add support for the two GEM instances inside Mobileye EyeQ5 SoCs, using compatible "mobileye,eyeq5-gem". With it, add a custom init sequence that accesses two system-controller registers. Noteworthy: NET_IP_ALIGN=3D2 on MIPS but the hardware does not align and low bits aren't configurable, so we cannot respect the requested IP header alignment. Signed-off-by: Th=C3=A9o Lebrun --- drivers/net/ethernet/cadence/macb_main.c | 80 ++++++++++++++++++++++++++++= ++++ 1 file changed, 80 insertions(+) diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/etherne= t/cadence/macb_main.c index f9a3a5caebcafe3d9197a3bc7681b64734d7ac93..ed394e5d1ec9b1748282f144862= 8d5006f3b0971 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -31,6 +32,7 @@ #include #include #include +#include #include #include #include @@ -4957,6 +4959,72 @@ static int init_reset_optional(struct platform_devic= e *pdev) return ret; } =20 +#define EYEQ5_OLB_GP_TX_SWRST_DIS BIT(0) // Tx SW reset +#define EYEQ5_OLB_GP_TX_M_CLKE BIT(1) // Tx M clock enable +#define EYEQ5_OLB_GP_SYS_SWRST_DIS BIT(2) // Sys SW reset +#define EYEQ5_OLB_GP_SYS_M_CLKE BIT(3) // Sys clock enable +#define EYEQ5_OLB_GP_SGMII_MODE BIT(4) // SGMII mode +#define EYEQ5_OLB_GP_RGMII_DRV GENMASK(8, 5) // RGMII mode + +#define EYEQ5_OLB_SGMII_PWR_EN BIT(0) +#define EYEQ5_OLB_SGMII_RST_DIS BIT(1) +#define EYEQ5_OLB_SGMII_PLL_EN BIT(2) +#define EYEQ5_OLB_SGMII_SIG_DET_SW BIT(3) +#define EYEQ5_OLB_SGMII_PWR_STATE BIT(4) +#define EYEQ5_OLB_SGMII_PLL_ACK BIT(18) + +static int eyeq5_init(struct platform_device *pdev) +{ + struct device *dev =3D &pdev->dev; + struct net_device *netdev =3D platform_get_drvdata(pdev); + struct macb *bp =3D netdev_priv(netdev); + struct device_node *np =3D dev->of_node; + unsigned int gp, sgmii; + struct regmap *regmap; + unsigned int args[2]; + unsigned int reg; + int ret; + + regmap =3D syscon_regmap_lookup_by_phandle_args(np, "mobileye,olb", 2, ar= gs); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + gp =3D args[0]; + sgmii =3D args[1]; + + /* Forced reset */ + regmap_write(regmap, gp, 0); + regmap_write(regmap, sgmii, 0); + usleep_range(5, 20); + + if (bp->phy_interface =3D=3D PHY_INTERFACE_MODE_SGMII) { + regmap_write(regmap, gp, EYEQ5_OLB_GP_SGMII_MODE); + + reg =3D EYEQ5_OLB_SGMII_PWR_EN | EYEQ5_OLB_SGMII_RST_DIS | + EYEQ5_OLB_SGMII_PLL_EN; + regmap_write(regmap, sgmii, reg); + + ret =3D regmap_read_poll_timeout(regmap, sgmii, reg, + reg & EYEQ5_OLB_SGMII_PLL_ACK, + 1, 100); + if (ret) + return dev_err_probe(dev, ret, "PLL timeout"); + + reg =3D EYEQ5_OLB_SGMII_PWR_STATE | EYEQ5_OLB_SGMII_SIG_DET_SW; + regmap_update_bits(regmap, sgmii, reg, reg); + } + + reg =3D phy_interface_mode_is_rgmii(bp->phy_interface) ? 0x9 : 0x0; + regmap_update_bits(regmap, gp, EYEQ5_OLB_GP_RGMII_DRV, + FIELD_PREP(EYEQ5_OLB_GP_RGMII_DRV, reg)); + + reg =3D EYEQ5_OLB_GP_TX_SWRST_DIS | EYEQ5_OLB_GP_TX_M_CLKE | + EYEQ5_OLB_GP_SYS_SWRST_DIS | EYEQ5_OLB_GP_SYS_M_CLKE; + regmap_update_bits(regmap, gp, reg, reg); + + return macb_init(pdev); +} + static const struct macb_usrio_config sama7g5_usrio =3D { .mii =3D 0, .rmii =3D 1, @@ -5109,6 +5177,17 @@ static const struct macb_config versal_config =3D { .usrio =3D &macb_default_usrio, }; =20 +static const struct macb_config eyeq5_config =3D { + .caps =3D MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO | + MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_QUEUE_DISABLE | + MACB_CAPS_NO_LSO, + .dma_burst_length =3D 16, + .clk_init =3D macb_clk_init, + .init =3D eyeq5_init, + .jumbo_max_len =3D 10240, + .usrio =3D &macb_default_usrio, +}; + static const struct of_device_id macb_dt_ids[] =3D { { .compatible =3D "cdns,at91sam9260-macb", .data =3D &at91sam9260_config = }, { .compatible =3D "cdns,macb" }, @@ -5129,6 +5208,7 @@ static const struct of_device_id macb_dt_ids[] =3D { { .compatible =3D "microchip,mpfs-macb", .data =3D &mpfs_config }, { .compatible =3D "microchip,sama7g5-gem", .data =3D &sama7g5_gem_config = }, { .compatible =3D "microchip,sama7g5-emac", .data =3D &sama7g5_emac_confi= g }, + { .compatible =3D "mobileye,eyeq5-gem", .data =3D &eyeq5_config }, { .compatible =3D "xlnx,zynqmp-gem", .data =3D &zynqmp_config}, { .compatible =3D "xlnx,zynq-gem", .data =3D &zynq_config }, { .compatible =3D "xlnx,versal-gem", .data =3D &versal_config}, --=20 2.50.0