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Fri, 27 Jun 2025 03:20:42 -0700 (PDT) From: Pawel Zalewski Date: Fri, 27 Jun 2025 11:20:35 +0100 Subject: [PATCH v2 1/3] leds/leds-is31fl32xx: add support for is31fl3236a Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250627-leds-is31fl3236a-v2-1-f6ef7495ce65@thegoodpenguin.co.uk> References: <20250627-leds-is31fl3236a-v2-0-f6ef7495ce65@thegoodpenguin.co.uk> In-Reply-To: <20250627-leds-is31fl3236a-v2-0-f6ef7495ce65@thegoodpenguin.co.uk> To: Lee Jones , Pavel Machek , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-leds@vger.kernel.org, linux-kernel@vger.kernel.org, Pavel Machek , devicetree@vger.kernel.org, Pawel Zalewski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1751019641; l=4935; i=pzalewski@thegoodpenguin.co.uk; s=20250625; h=from:subject:message-id; bh=jL/YtnZUBwUm3r8kPPjqfuJQkAPEMLB/FpIfnfB7Kmo=; b=7CGhMlMkL1Y/uOXcbcJl3otoIY5jEsO0VoijKJBMZRvJFnX5tq3r0nHhGm4US407AHQrbwuMo 4I5VzxJE9nVAzckCT4mbVPpW4Iu/D9TTavAwosLQ9GpnbUpB5gx+q37 X-Developer-Key: i=pzalewski@thegoodpenguin.co.uk; a=ed25519; pk=hHrwBom/yjrVTqpEvKpVXLYfxr6nqBNP16RkQopIRrI= Add an additional and optional control register for setting the output PWM frequency to 22kHz. The default is 3kHz and this option puts the operational frequency outside of the audible range. Signed-off-by: Pawel Zalewski --- drivers/leds/leds-is31fl32xx.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/drivers/leds/leds-is31fl32xx.c b/drivers/leds/leds-is31fl32xx.c index 8793330dd4142f49f15d6ee9d87468c08509859f..b3f25854f97eac0f87c5be762b1= d8e3afaaecc21 100644 --- a/drivers/leds/leds-is31fl32xx.c +++ b/drivers/leds/leds-is31fl32xx.c @@ -32,6 +32,8 @@ #define IS31FL3216_CONFIG_SSD_ENABLE BIT(7) #define IS31FL3216_CONFIG_SSD_DISABLE 0 =20 +#define IS31FL32XX_PWM_FREQUENCY_22kHz 0x01 + struct is31fl32xx_priv; struct is31fl32xx_led_data { struct led_classdev cdev; @@ -53,6 +55,7 @@ struct is31fl32xx_priv { * @pwm_update_reg : address of PWM Update register * @global_control_reg : address of Global Control register (optional) * @reset_reg : address of Reset register (optional) + * @output_frequency_setting_reg: address of output frequency register (op= tional) * @pwm_register_base : address of first PWM register * @pwm_registers_reversed: : true if PWM registers count down instead of = up * @led_control_register_base : address of first LED control register (opt= ional) @@ -76,6 +79,7 @@ struct is31fl32xx_chipdef { u8 pwm_update_reg; u8 global_control_reg; u8 reset_reg; + u8 output_frequency_setting_reg; u8 pwm_register_base; bool pwm_registers_reversed; u8 led_control_register_base; @@ -90,6 +94,19 @@ static const struct is31fl32xx_chipdef is31fl3236_cdef = =3D { .pwm_update_reg =3D 0x25, .global_control_reg =3D 0x4a, .reset_reg =3D 0x4f, + .output_frequency_setting_reg =3D IS31FL32XX_REG_NONE, + .pwm_register_base =3D 0x01, + .led_control_register_base =3D 0x26, + .enable_bits_per_led_control_register =3D 1, +}; + +static const struct is31fl32xx_chipdef is31fl3236a_cdef =3D { + .channels =3D 36, + .shutdown_reg =3D 0x00, + .pwm_update_reg =3D 0x25, + .global_control_reg =3D 0x4a, + .reset_reg =3D 0x4f, + .output_frequency_setting_reg =3D 0x4b, .pwm_register_base =3D 0x01, .led_control_register_base =3D 0x26, .enable_bits_per_led_control_register =3D 1, @@ -101,6 +118,7 @@ static const struct is31fl32xx_chipdef is31fl3235_cdef = =3D { .pwm_update_reg =3D 0x25, .global_control_reg =3D 0x4a, .reset_reg =3D 0x4f, + .output_frequency_setting_reg =3D IS31FL32XX_REG_NONE, .pwm_register_base =3D 0x05, .led_control_register_base =3D 0x2a, .enable_bits_per_led_control_register =3D 1, @@ -112,6 +130,7 @@ static const struct is31fl32xx_chipdef is31fl3218_cdef = =3D { .pwm_update_reg =3D 0x16, .global_control_reg =3D IS31FL32XX_REG_NONE, .reset_reg =3D 0x17, + .output_frequency_setting_reg =3D IS31FL32XX_REG_NONE, .pwm_register_base =3D 0x01, .led_control_register_base =3D 0x13, .enable_bits_per_led_control_register =3D 6, @@ -126,6 +145,7 @@ static const struct is31fl32xx_chipdef is31fl3216_cdef = =3D { .pwm_update_reg =3D 0xB0, .global_control_reg =3D IS31FL32XX_REG_NONE, .reset_reg =3D IS31FL32XX_REG_NONE, + .output_frequency_setting_reg =3D IS31FL32XX_REG_NONE, .pwm_register_base =3D 0x10, .pwm_registers_reversed =3D true, .led_control_register_base =3D 0x01, @@ -363,8 +383,21 @@ static struct is31fl32xx_led_data *is31fl32xx_find_led= _data( static int is31fl32xx_parse_dt(struct device *dev, struct is31fl32xx_priv *priv) { + const struct is31fl32xx_chipdef *cdef =3D priv->cdef; int ret =3D 0; =20 + if ((cdef->output_frequency_setting_reg !=3D IS31FL32XX_REG_NONE) && + of_property_read_bool(dev_of_node(dev), "issi,22kHz-pwm")) { + + ret =3D is31fl32xx_write(priv, cdef->output_frequency_setting_reg, + IS31FL32XX_PWM_FREQUENCY_22kHz); + + if (ret) { + dev_err(dev, "Failed to write output PWM frequency register\n"); + return ret; + } + } + for_each_available_child_of_node_scoped(dev_of_node(dev), child) { struct led_init_data init_data =3D {}; struct is31fl32xx_led_data *led_data =3D @@ -405,6 +438,7 @@ static int is31fl32xx_parse_dt(struct device *dev, =20 static const struct of_device_id of_is31fl32xx_match[] =3D { { .compatible =3D "issi,is31fl3236", .data =3D &is31fl3236_cdef, }, + { .compatible =3D "issi,is31fl3236a", .data =3D &is31fl3236a_cdef, }, { .compatible =3D "issi,is31fl3235", .data =3D &is31fl3235_cdef, }, { .compatible =3D "issi,is31fl3218", .data =3D &is31fl3218_cdef, }, { .compatible =3D "si-en,sn3218", .data =3D &is31fl3218_cdef, }, @@ -466,6 +500,7 @@ static void is31fl32xx_remove(struct i2c_client *client) */ static const struct i2c_device_id is31fl32xx_id[] =3D { { "is31fl3236" }, + { "is31fl3236a" }, { "is31fl3235" }, { "is31fl3218" }, { "sn3218" }, --=20 2.48.1 From nobody Wed Oct 8 13:25:00 2025 Received: from mail-wr1-f44.google.com (mail-wr1-f44.google.com [209.85.221.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AC7942BDC11 for ; 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Fri, 27 Jun 2025 03:20:43 -0700 (PDT) Received: from [127.0.1.1] ([2a00:23c7:1d1a:9c01:1a4a:198c:c191:f3d7]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a88c7e7524sm2331700f8f.12.2025.06.27.03.20.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Jun 2025 03:20:43 -0700 (PDT) From: Pawel Zalewski Date: Fri, 27 Jun 2025 11:20:36 +0100 Subject: [PATCH v2 2/3] dt-bindings: leds: is31fl32xx: convert the binding to yaml Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250627-leds-is31fl3236a-v2-2-f6ef7495ce65@thegoodpenguin.co.uk> References: <20250627-leds-is31fl3236a-v2-0-f6ef7495ce65@thegoodpenguin.co.uk> In-Reply-To: <20250627-leds-is31fl3236a-v2-0-f6ef7495ce65@thegoodpenguin.co.uk> To: Lee Jones , Pavel Machek , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-leds@vger.kernel.org, linux-kernel@vger.kernel.org, Pavel Machek , devicetree@vger.kernel.org, Pawel Zalewski , Lucca Fachinetti X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1751019641; l=4978; i=pzalewski@thegoodpenguin.co.uk; s=20250625; h=from:subject:message-id; bh=Y6HqHEdvYmDTfde8WCMrHIoL7OYunCUZmqOz72jZEQg=; b=Lw6Z+9WTPTahGM8jLLuckyw+9mV6swF+niWSYrARAE+0fRjRLzmHfxPpnRj/nH7b2ZvbcP066 +2sC7LDpNcoD/JO+9P4RgapkEvzx58zeyl/9qQtfU/3LPHQf/qcYXtp X-Developer-Key: i=pzalewski@thegoodpenguin.co.uk; a=ed25519; pk=hHrwBom/yjrVTqpEvKpVXLYfxr6nqBNP16RkQopIRrI= From: Lucca Fachinetti Keep the old maintainers field as is. Add datasheets for reference, NB that I was not able to find an up-to-date, funtional direct URL for si-en products datasheet so they were skipped. Co-developed-by: Pawel Zalewski Signed-off-by: Pawel Zalewski Signed-off-by: Lucca Fachinetti --- .../devicetree/bindings/leds/leds-is31fl3236.yaml | 101 +++++++++++++++++= ++++ .../devicetree/bindings/leds/leds-is31fl32xx.txt | 52 ----------- 2 files changed, 101 insertions(+), 52 deletions(-) diff --git a/Documentation/devicetree/bindings/leds/leds-is31fl3236.yaml b/= Documentation/devicetree/bindings/leds/leds-is31fl3236.yaml new file mode 100644 index 0000000000000000000000000000000000000000..f26340850647d1c642fb345b7cf= 90764200e13ee --- /dev/null +++ b/Documentation/devicetree/bindings/leds/leds-is31fl3236.yaml @@ -0,0 +1,101 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/leds/leds-is31fl3236.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: is31fl32xx and Si-En SN32xx IC LED driver + +maintainers: + - Pavel Machek + - Lee Jones + +description: | + The is31fl32xx/SN32xx family of LED drivers are I2C devices with multiple + constant-current channels, each with independent 256-level PWM control. + Each LED is represented as a sub-node of the device. + + For more product information please see the links below: + https://www.lumissil.com/assets/pdf/core/IS31FL3236_DS.pdf + https://www.lumissil.com/assets/pdf/core/IS31FL3236A_DS.pdf + https://www.lumissil.com/assets/pdf/core/IS31FL3235_DS.pdf + https://www.lumissil.com/assets/pdf/core/IS31FL3218_DS.pdf + https://www.lumissil.com/assets/pdf/core/IS31FL3216_DS.pdf + +properties: + compatible: + enum: + - issi,is31fl3236 + - issi,is31fl3236a + - issi,is31fl3235 + - issi,is31fl3218 + - issi,is31fl3216 + - si-en,sn3218 + - si-en,sn3216 + + reg: + maxItems: 1 + + '#address-cells': + const: 1 + + "#size-cells": + const: 0 + +patternProperties: + "^led@[1-9][0-9]*$": + type: object + $ref: common.yaml# + additionalProperties: false + + properties: + reg: + minItems: 1 + description: + LED channel number (1..N) + + label: true + + linux,default-trigger: true + + required: + - reg + +required: + - compatible + - reg + - "#size-cells" + - "#address-cells" + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells =3D <1>; + #size-cells =3D <0>; + + s31fl3236: led-controller@3c { + compatible =3D "issi,is31fl3236"; + reg =3D <0x3c>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + led@1 { + reg =3D <1>; + label =3D "EB:blue:usr0"; + }; + led@2 { + reg =3D <2>; + label =3D "EB:blue:usr1"; + }; + led@3 { + reg =3D <3>; + label =3D "EB:blue:usr35"; + }; + }; + }; +... + diff --git a/Documentation/devicetree/bindings/leds/leds-is31fl32xx.txt b/D= ocumentation/devicetree/bindings/leds/leds-is31fl32xx.txt deleted file mode 100644 index 926c2117942c4dc200fcd68156864f544b11a326..000000000000000000000000000= 0000000000000 --- a/Documentation/devicetree/bindings/leds/leds-is31fl32xx.txt +++ /dev/null @@ -1,52 +0,0 @@ -Binding for ISSI IS31FL32xx and Si-En SN32xx LED Drivers - -The IS31FL32xx/SN32xx family of LED drivers are I2C devices with multiple -constant-current channels, each with independent 256-level PWM control. -Each LED is represented as a sub-node of the device. - -Required properties: -- compatible: one of - issi,is31fl3236 - issi,is31fl3235 - issi,is31fl3218 - issi,is31fl3216 - si-en,sn3218 - si-en,sn3216 -- reg: I2C slave address -- address-cells : must be 1 -- size-cells : must be 0 - -LED sub-node properties: -- reg : LED channel number (1..N) -- label : (optional) - see Documentation/devicetree/bindings/leds/common.txt -- linux,default-trigger : (optional) - see Documentation/devicetree/bindings/leds/common.txt - - -Example: - -is31fl3236: led-controller@3c { - compatible =3D "issi,is31fl3236"; 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Fri, 27 Jun 2025 03:20:44 -0700 (PDT) Received: from [127.0.1.1] ([2a00:23c7:1d1a:9c01:1a4a:198c:c191:f3d7]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a88c7e7524sm2331700f8f.12.2025.06.27.03.20.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Jun 2025 03:20:44 -0700 (PDT) From: Pawel Zalewski Date: Fri, 27 Jun 2025 11:20:37 +0100 Subject: [PATCH v2 3/3] dt-bindings: leds: is31fl3236: add issi,22kHz-pwm property Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250627-leds-is31fl3236a-v2-3-f6ef7495ce65@thegoodpenguin.co.uk> References: <20250627-leds-is31fl3236a-v2-0-f6ef7495ce65@thegoodpenguin.co.uk> In-Reply-To: <20250627-leds-is31fl3236a-v2-0-f6ef7495ce65@thegoodpenguin.co.uk> To: Lee Jones , Pavel Machek , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-leds@vger.kernel.org, linux-kernel@vger.kernel.org, Pavel Machek , devicetree@vger.kernel.org, Pawel Zalewski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1751019641; l=1100; i=pzalewski@thegoodpenguin.co.uk; s=20250625; h=from:subject:message-id; bh=pC0l6WHANk7+BDn4DSC1TDZ/W9QIUe5+pxJCXm1fLz0=; b=37L+LM2vw4vz1KW53lZHMXE5vyMJwCaux/OoJrnYWkR7OK4MA9KkFhQrj9SsHiTziBPHg7JRi q2gGD9QZRBPCM5BpWv8kpMgb391bih/Sc/uIMZG4H4jlPafGui/Ckxd X-Developer-Key: i=pzalewski@thegoodpenguin.co.uk; a=ed25519; pk=hHrwBom/yjrVTqpEvKpVXLYfxr6nqBNP16RkQopIRrI= Add an additional and optional control property for setting the output PWM frequency to 22kHz. The default is 3kHz and this option puts the operational frequency outside of the audible range. Signed-off-by: Pawel Zalewski --- Documentation/devicetree/bindings/leds/leds-is31fl3236.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/leds/leds-is31fl3236.yaml b/= Documentation/devicetree/bindings/leds/leds-is31fl3236.yaml index f26340850647d1c642fb345b7cf90764200e13ee..cea93f4d8fe0bcc80d6932be1f3= 46bad321bcd38 100644 --- a/Documentation/devicetree/bindings/leds/leds-is31fl3236.yaml +++ b/Documentation/devicetree/bindings/leds/leds-is31fl3236.yaml @@ -42,6 +42,12 @@ properties: "#size-cells": const: 0 =20 + issi,22kHz-pwm: + type: boolean + description: + When present, the chip's PWM will operate at ~22kHz as opposed + to ~3kHz to move the operating frequency out of the audible range. + patternProperties: "^led@[1-9][0-9]*$": type: object --=20 2.48.1