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Fri, 27 Jun 2025 03:22:10 -0700 (PDT) From: James Clark Date: Fri, 27 Jun 2025 11:21:37 +0100 Subject: [PATCH v4 1/6] spi: spi-fsl-dspi: Clear completion counter before initiating transfer Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250627-james-nxp-spi-dma-v4-1-178dba20c120@linaro.org> References: <20250627-james-nxp-spi-dma-v4-0-178dba20c120@linaro.org> In-Reply-To: <20250627-james-nxp-spi-dma-v4-0-178dba20c120@linaro.org> To: Vladimir Oltean , Mark Brown , Vladimir Oltean , Arnd Bergmann , Larisa Grigore , Frank Li , Christoph Hellwig Cc: linux-spi@vger.kernel.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org, James Clark X-Mailer: b4 0.14.0 In target mode, extra interrupts can be received between the end of a transfer and halting the module if the host continues sending more data. If the interrupt from this occurs after the reinit_completion() then the completion counter is left at a non-zero value. The next unrelated transfer initiated by userspace will then complete immediately without waiting for the interrupt or writing to the RX buffer. Fix it by resetting the counter before the transfer so that lingering values are cleared. This is done after clearing the FIFOs and the status register but before the transfer is initiated, so no interrupts should be received at this point resulting in other race conditions. Fixes: 4f5ee75ea171 ("spi: spi-fsl-dspi: Replace interruptible wait queue w= ith a simple completion") Signed-off-by: James Clark Reviewed-by: Frank Li --- drivers/spi/spi-fsl-dspi.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index 04c88d090c4d..4bd4377551b5 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -1122,11 +1122,20 @@ static int dspi_transfer_one_message(struct spi_con= troller *ctlr, if (dspi->devtype_data->trans_mode =3D=3D DSPI_DMA_MODE) { status =3D dspi_dma_xfer(dspi); } else { + /* + * Reinitialize the completion before transferring data + * to avoid the case where it might remain in the done + * state due to a spurious interrupt from a previous + * transfer. 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Fri, 27 Jun 2025 03:22:11 -0700 (PDT) Received: from ho-tower-lan.lan ([37.18.136.128]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4538a3a5599sm47250955e9.13.2025.06.27.03.22.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Jun 2025 03:22:11 -0700 (PDT) From: James Clark Date: Fri, 27 Jun 2025 11:21:38 +0100 Subject: [PATCH v4 2/6] spi: spi-fsl-dspi: Store status directly in cur_msg->status Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250627-james-nxp-spi-dma-v4-2-178dba20c120@linaro.org> References: <20250627-james-nxp-spi-dma-v4-0-178dba20c120@linaro.org> In-Reply-To: <20250627-james-nxp-spi-dma-v4-0-178dba20c120@linaro.org> To: Vladimir Oltean , Mark Brown , Vladimir Oltean , Arnd Bergmann , Larisa Grigore , Frank Li , Christoph Hellwig Cc: linux-spi@vger.kernel.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org, James Clark X-Mailer: b4 0.14.0 This will allow us to return a status from the interrupt handler in a later commit and avoids copying it at the end of dspi_transfer_one_message(). For consistency make polling and DMA modes use the same mechanism. Refactor dspi_rxtx() and dspi_poll() to not return -EINPROGRESS because this isn't actually a status that was ever returned to the core layer but some internal state. Wherever that was used we can look at dspi->len instead. No functional changes intended. Signed-off-by: James Clark --- drivers/spi/spi-fsl-dspi.c | 70 ++++++++++++++++++++++++------------------= ---- 1 file changed, 36 insertions(+), 34 deletions(-) diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index 4bd4377551b5..65567745fe9a 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -591,11 +591,10 @@ static int dspi_next_xfer_dma_submit(struct fsl_dspi = *dspi) =20 static void dspi_setup_accel(struct fsl_dspi *dspi); =20 -static int dspi_dma_xfer(struct fsl_dspi *dspi) +static void dspi_dma_xfer(struct fsl_dspi *dspi) { struct spi_message *message =3D dspi->cur_msg; struct device *dev =3D &dspi->pdev->dev; - int ret =3D 0; =20 /* * dspi->len gets decremented by dspi_pop_tx_pushr in @@ -612,14 +611,12 @@ static int dspi_dma_xfer(struct fsl_dspi *dspi) message->actual_length +=3D dspi->words_in_flight * dspi->oper_word_size; =20 - ret =3D dspi_next_xfer_dma_submit(dspi); - if (ret) { + message->status =3D dspi_next_xfer_dma_submit(dspi); + if (message->status) { dev_err(dev, "DMA transfer failed\n"); break; } } - - return ret; } =20 static int dspi_request_dma(struct fsl_dspi *dspi, phys_addr_t phy_addr) @@ -986,36 +983,40 @@ static void dspi_fifo_write(struct fsl_dspi *dspi) dspi->progress, !dspi->irq); } =20 -static int dspi_rxtx(struct fsl_dspi *dspi) +static void dspi_rxtx(struct fsl_dspi *dspi) { dspi_fifo_read(dspi); =20 if (!dspi->len) /* Success! */ - return 0; + return; =20 dspi_fifo_write(dspi); - - return -EINPROGRESS; } =20 -static int dspi_poll(struct fsl_dspi *dspi) +static void dspi_poll(struct fsl_dspi *dspi) { - int tries =3D 1000; + int tries; u32 spi_sr; =20 - do { - regmap_read(dspi->regmap, SPI_SR, &spi_sr); - regmap_write(dspi->regmap, SPI_SR, spi_sr); + while (dspi->len) { + for (tries =3D 1000; tries > 0; --tries) { + regmap_read(dspi->regmap, SPI_SR, &spi_sr); + regmap_write(dspi->regmap, SPI_SR, spi_sr); =20 - if (spi_sr & SPI_SR_CMDTCF) - break; - } while (--tries); + if (spi_sr & SPI_SR_CMDTCF) + break; + } =20 - if (!tries) - return -ETIMEDOUT; + if (!tries) { + dspi->cur_msg->status =3D -ETIMEDOUT; + return; + } =20 - return dspi_rxtx(dspi); + dspi_rxtx(dspi); + } + + dspi->cur_msg->status =3D 0; } =20 static irqreturn_t dspi_interrupt(int irq, void *dev_id) @@ -1029,8 +1030,13 @@ static irqreturn_t dspi_interrupt(int irq, void *dev= _id) if (!(spi_sr & SPI_SR_CMDTCF)) return IRQ_NONE; =20 - if (dspi_rxtx(dspi) =3D=3D 0) + dspi_rxtx(dspi); + + if (!dspi->len) { + if (dspi->cur_msg) + WRITE_ONCE(dspi->cur_msg->status, 0); complete(&dspi->xfer_done); + } =20 return IRQ_HANDLED; } @@ -1060,7 +1066,6 @@ static int dspi_transfer_one_message(struct spi_contr= oller *ctlr, struct spi_device *spi =3D message->spi; struct spi_transfer *transfer; bool cs =3D false; - int status =3D 0; u32 val =3D 0; bool cs_change =3D false; =20 @@ -1120,7 +1125,7 @@ static int dspi_transfer_one_message(struct spi_contr= oller *ctlr, dspi->progress, !dspi->irq); =20 if (dspi->devtype_data->trans_mode =3D=3D DSPI_DMA_MODE) { - status =3D dspi_dma_xfer(dspi); + dspi_dma_xfer(dspi); } else { /* * Reinitialize the completion before transferring data @@ -1134,15 +1139,12 @@ static int dspi_transfer_one_message(struct spi_con= troller *ctlr, =20 dspi_fifo_write(dspi); =20 - if (dspi->irq) { + if (dspi->irq) wait_for_completion(&dspi->xfer_done); - } else { - do { - status =3D dspi_poll(dspi); - } while (status =3D=3D -EINPROGRESS); - } + else + dspi_poll(dspi); } - if (status) + if (READ_ONCE(message->status)) break; =20 spi_transfer_delay_exec(transfer); @@ -1151,7 +1153,8 @@ static int dspi_transfer_one_message(struct spi_contr= oller *ctlr, dspi_deassert_cs(spi, &cs); } =20 - if (status || !cs_change) { + dspi->cur_msg =3D NULL; + if (message->status || !cs_change) { /* Put DSPI in stop mode */ regmap_update_bits(dspi->regmap, SPI_MCR, SPI_MCR_HALT, SPI_MCR_HALT); @@ -1160,10 +1163,9 @@ static int dspi_transfer_one_message(struct spi_cont= roller *ctlr, ; } =20 - message->status =3D status; spi_finalize_current_message(ctlr); =20 - return status; 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Fri, 27 Jun 2025 03:22:12 -0700 (PDT) From: James Clark Date: Fri, 27 Jun 2025 11:21:39 +0100 Subject: [PATCH v4 3/6] spi: spi-fsl-dspi: Stub out DMA functions Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250627-james-nxp-spi-dma-v4-3-178dba20c120@linaro.org> References: <20250627-james-nxp-spi-dma-v4-0-178dba20c120@linaro.org> In-Reply-To: <20250627-james-nxp-spi-dma-v4-0-178dba20c120@linaro.org> To: Vladimir Oltean , Mark Brown , Vladimir Oltean , Arnd Bergmann , Larisa Grigore , Frank Li , Christoph Hellwig Cc: linux-spi@vger.kernel.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org, James Clark X-Mailer: b4 0.14.0 This will allow the build to succeed with !CONFIG_HAS_DMA, either due to a randconfig build test or when the target only uses one of the non-DMA transfer modes which this driver supports. Signed-off-by: James Clark --- drivers/spi/spi-fsl-dspi.c | 34 ++++++++++++++++++++++++---------- 1 file changed, 24 insertions(+), 10 deletions(-) diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index 65567745fe9a..feff475dddfc 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -373,6 +373,8 @@ struct fsl_dspi { void (*dev_to_host)(struct fsl_dspi *dspi, u32 rxdata); }; =20 +static void dspi_setup_accel(struct fsl_dspi *dspi); + static bool is_s32g_dspi(struct fsl_dspi *data) { return data->devtype_data =3D=3D &devtype_data[S32G] || @@ -468,6 +470,16 @@ static u32 dspi_pop_tx(struct fsl_dspi *dspi) return txdata; } =20 +/* Push one word to the RX buffer from the POPR register (RX FIFO) */ +static void dspi_push_rx(struct fsl_dspi *dspi, u32 rxdata) +{ + if (!dspi->rx) + return; + dspi->dev_to_host(dspi, rxdata); +} + +#if IS_ENABLED(CONFIG_DMA_ENGINE) + /* Prepare one TX FIFO entry (txdata plus cmd) */ static u32 dspi_pop_tx_pushr(struct fsl_dspi *dspi) { @@ -481,14 +493,6 @@ static u32 dspi_pop_tx_pushr(struct fsl_dspi *dspi) return cmd << 16 | data; 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Fri, 27 Jun 2025 03:22:13 -0700 (PDT) Received: from ho-tower-lan.lan ([37.18.136.128]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4538a3a5599sm47250955e9.13.2025.06.27.03.22.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Jun 2025 03:22:13 -0700 (PDT) From: James Clark Date: Fri, 27 Jun 2025 11:21:40 +0100 Subject: [PATCH v4 4/6] spi: spi-fsl-dspi: Use non-coherent memory for DMA Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250627-james-nxp-spi-dma-v4-4-178dba20c120@linaro.org> References: <20250627-james-nxp-spi-dma-v4-0-178dba20c120@linaro.org> In-Reply-To: <20250627-james-nxp-spi-dma-v4-0-178dba20c120@linaro.org> To: Vladimir Oltean , Mark Brown , Vladimir Oltean , Arnd Bergmann , Larisa Grigore , Frank Li , Christoph Hellwig Cc: linux-spi@vger.kernel.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org, James Clark X-Mailer: b4 0.14.0 Using coherent memory here isn't functionally necessary, we're only either sending data to the device or reading from it. This means explicit synchronizations are only required around those points and the change is fairly trivial. This gives us around a 10% increase in throughput for large DMA transfers and no loss for small transfers. Suggested-by: Arnd Bergmann Signed-off-by: James Clark Reviewed-by: Frank Li --- drivers/spi/spi-fsl-dspi.c | 55 +++++++++++++++++++++++++++++-------------= ---- 1 file changed, 35 insertions(+), 20 deletions(-) diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index feff475dddfc..e7856f9c9440 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -493,11 +493,19 @@ static u32 dspi_pop_tx_pushr(struct fsl_dspi *dspi) return cmd << 16 | data; } =20 +static int dspi_dma_transfer_size(struct fsl_dspi *dspi) +{ + return dspi->words_in_flight * DMA_SLAVE_BUSWIDTH_4_BYTES; +} + static void dspi_tx_dma_callback(void *arg) { struct fsl_dspi *dspi =3D arg; struct fsl_dspi_dma *dma =3D dspi->dma; + struct device *dev =3D &dspi->pdev->dev; =20 + dma_sync_single_for_cpu(dev, dma->tx_dma_phys, + dspi_dma_transfer_size(dspi), DMA_TO_DEVICE); complete(&dma->cmd_tx_complete); } =20 @@ -505,9 +513,13 @@ static void dspi_rx_dma_callback(void *arg) { struct fsl_dspi *dspi =3D arg; struct fsl_dspi_dma *dma =3D dspi->dma; + struct device *dev =3D &dspi->pdev->dev; int i; =20 if (dspi->rx) { + dma_sync_single_for_cpu(dev, dma->rx_dma_phys, + dspi_dma_transfer_size(dspi), + DMA_FROM_DEVICE); for (i =3D 0; i < dspi->words_in_flight; i++) dspi_push_rx(dspi, dspi->dma->rx_dma_buf[i]); } @@ -517,6 +529,7 @@ static void dspi_rx_dma_callback(void *arg) =20 static int dspi_next_xfer_dma_submit(struct fsl_dspi *dspi) { + size_t size =3D dspi_dma_transfer_size(dspi); struct device *dev =3D &dspi->pdev->dev; struct fsl_dspi_dma *dma =3D dspi->dma; int time_left; @@ -525,10 +538,9 @@ static int dspi_next_xfer_dma_submit(struct fsl_dspi *= dspi) for (i =3D 0; i < dspi->words_in_flight; i++) dspi->dma->tx_dma_buf[i] =3D dspi_pop_tx_pushr(dspi); =20 + dma_sync_single_for_device(dev, dma->tx_dma_phys, size, DMA_TO_DEVICE); dma->tx_desc =3D dmaengine_prep_slave_single(dma->chan_tx, - dma->tx_dma_phys, - dspi->words_in_flight * - DMA_SLAVE_BUSWIDTH_4_BYTES, + dma->tx_dma_phys, size, DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT | DMA_CTRL_ACK); if (!dma->tx_desc) { @@ -543,10 +555,10 @@ static int dspi_next_xfer_dma_submit(struct fsl_dspi = *dspi) return -EINVAL; } =20 + dma_sync_single_for_device(dev, dma->rx_dma_phys, size, + DMA_FROM_DEVICE); dma->rx_desc =3D dmaengine_prep_slave_single(dma->chan_rx, - dma->rx_dma_phys, - dspi->words_in_flight * - DMA_SLAVE_BUSWIDTH_4_BYTES, + dma->rx_dma_phys, size, DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT | DMA_CTRL_ACK); if (!dma->rx_desc) { @@ -643,17 +655,17 @@ static int dspi_request_dma(struct fsl_dspi *dspi, ph= ys_addr_t phy_addr) goto err_tx_channel; } =20 - dma->tx_dma_buf =3D dma_alloc_coherent(dma->chan_tx->device->dev, - dma_bufsize, &dma->tx_dma_phys, - GFP_KERNEL); + dma->tx_dma_buf =3D dma_alloc_noncoherent(dma->chan_tx->device->dev, + dma_bufsize, &dma->tx_dma_phys, + DMA_TO_DEVICE, GFP_KERNEL); if (!dma->tx_dma_buf) { ret =3D -ENOMEM; goto err_tx_dma_buf; } =20 - dma->rx_dma_buf =3D dma_alloc_coherent(dma->chan_rx->device->dev, - dma_bufsize, &dma->rx_dma_phys, - GFP_KERNEL); + dma->rx_dma_buf =3D dma_alloc_noncoherent(dma->chan_rx->device->dev, + dma_bufsize, &dma->rx_dma_phys, + DMA_FROM_DEVICE, GFP_KERNEL); if (!dma->rx_dma_buf) { ret =3D -ENOMEM; goto err_rx_dma_buf; @@ -688,11 +700,12 @@ static int dspi_request_dma(struct fsl_dspi *dspi, ph= ys_addr_t phy_addr) return 0; =20 err_slave_config: - dma_free_coherent(dma->chan_rx->device->dev, - dma_bufsize, dma->rx_dma_buf, dma->rx_dma_phys); + dma_free_noncoherent(dma->chan_rx->device->dev, dma_bufsize, + dma->rx_dma_buf, dma->rx_dma_phys, + DMA_FROM_DEVICE); err_rx_dma_buf: - dma_free_coherent(dma->chan_tx->device->dev, - dma_bufsize, dma->tx_dma_buf, dma->tx_dma_phys); + dma_free_noncoherent(dma->chan_tx->device->dev, dma_bufsize, + dma->tx_dma_buf, dma->tx_dma_phys, DMA_TO_DEVICE); err_tx_dma_buf: dma_release_channel(dma->chan_tx); err_tx_channel: @@ -713,14 +726,16 @@ static void dspi_release_dma(struct fsl_dspi *dspi) return; =20 if (dma->chan_tx) { - dma_free_coherent(dma->chan_tx->device->dev, dma_bufsize, - dma->tx_dma_buf, dma->tx_dma_phys); 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Fri, 27 Jun 2025 03:22:14 -0700 (PDT) Received: from ho-tower-lan.lan ([37.18.136.128]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4538a3a5599sm47250955e9.13.2025.06.27.03.22.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Jun 2025 03:22:13 -0700 (PDT) From: James Clark Date: Fri, 27 Jun 2025 11:21:41 +0100 Subject: [PATCH v4 5/6] spi: spi-fsl-dspi: Increase DMA buffer size Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250627-james-nxp-spi-dma-v4-5-178dba20c120@linaro.org> References: <20250627-james-nxp-spi-dma-v4-0-178dba20c120@linaro.org> In-Reply-To: <20250627-james-nxp-spi-dma-v4-0-178dba20c120@linaro.org> To: Vladimir Oltean , Mark Brown , Vladimir Oltean , Arnd Bergmann , Larisa Grigore , Frank Li , Christoph Hellwig Cc: linux-spi@vger.kernel.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org, James Clark X-Mailer: b4 0.14.0 From: Larisa Grigore When the device is configured as a target, the host won't stop sending data while we're draining the buffer which leads to FIFO underflows and corruption. Increase the DMA buffer size to the maximum words that edma can transfer once to reduce the chance of this happening. While we're here, also change the buffer size for host mode back to a page as it was before commit a957499bd437 ("spi: spi-fsl-dspi: Fix bits-per-word acceleration in DMA mode"). dma_alloc_noncoherent() allocations are backed by a full page anyway, so we might as well use it all. Signed-off-by: Larisa Grigore Signed-off-by: James Clark --- drivers/spi/spi-fsl-dspi.c | 42 ++++++++++++++++++++++++++++++++++++++---- 1 file changed, 38 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index e7856f9c9440..46d3cae9efed 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -493,6 +493,39 @@ static u32 dspi_pop_tx_pushr(struct fsl_dspi *dspi) return cmd << 16 | data; } =20 +static int dspi_dma_bufsize(struct fsl_dspi *dspi) +{ + if (spi_controller_is_target(dspi->ctlr)) { + /* + * In target mode we have to be ready to receive the maximum + * that can possibly be transferred at once by EDMA without any + * FIFO underflows. This is CITER * SSIZE, where SSIZE is a max + * of 4 when transferring to a peripheral. + */ + return GENMASK(14, 0) * DMA_SLAVE_BUSWIDTH_4_BYTES; + } + + return PAGE_SIZE; +} + +static int dspi_dma_max_datawords(struct fsl_dspi *dspi) +{ + /* + * Transfers look like this so we always use a full DMA word regardless + * of SPI word size: + * + * 31 16 15 0 + * ----------------------------------------- + * | CONTROL WORD | 16-bit DATA | + * ----------------------------------------- + * or + * ----------------------------------------- + * | CONTROL WORD | UNUSED | 8-bit DATA | + * ----------------------------------------- + */ + return dspi_dma_bufsize(dspi) / DMA_SLAVE_BUSWIDTH_4_BYTES; +} + static int dspi_dma_transfer_size(struct fsl_dspi *dspi) { return dspi->words_in_flight * DMA_SLAVE_BUSWIDTH_4_BYTES; @@ -608,6 +641,7 @@ static int dspi_next_xfer_dma_submit(struct fsl_dspi *d= spi) static void dspi_dma_xfer(struct fsl_dspi *dspi) { struct spi_message *message =3D dspi->cur_msg; + int max_words =3D dspi_dma_max_datawords(dspi); struct device *dev =3D &dspi->pdev->dev; =20 /* @@ -619,8 +653,8 @@ static void dspi_dma_xfer(struct fsl_dspi *dspi) dspi_setup_accel(dspi); =20 dspi->words_in_flight =3D dspi->len / dspi->oper_word_size; - if (dspi->words_in_flight > dspi->devtype_data->fifo_size) - dspi->words_in_flight =3D dspi->devtype_data->fifo_size; + if (dspi->words_in_flight > max_words) + dspi->words_in_flight =3D max_words; =20 message->actual_length +=3D dspi->words_in_flight * dspi->oper_word_size; @@ -635,7 +669,7 @@ static void dspi_dma_xfer(struct fsl_dspi *dspi) =20 static int dspi_request_dma(struct fsl_dspi *dspi, phys_addr_t phy_addr) { - int dma_bufsize =3D dspi->devtype_data->fifo_size * 2; + int dma_bufsize =3D dspi_dma_bufsize(dspi); struct device *dev =3D &dspi->pdev->dev; struct dma_slave_config cfg; struct fsl_dspi_dma *dma; @@ -719,7 +753,7 @@ static int dspi_request_dma(struct fsl_dspi *dspi, phys= _addr_t phy_addr) =20 static void dspi_release_dma(struct fsl_dspi *dspi) { - int dma_bufsize =3D dspi->devtype_data->fifo_size * 2; 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Fri, 27 Jun 2025 03:22:14 -0700 (PDT) From: James Clark Date: Fri, 27 Jun 2025 11:21:42 +0100 Subject: [PATCH v4 6/6] spi: spi-fsl-dspi: Report FIFO overflows as errors Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250627-james-nxp-spi-dma-v4-6-178dba20c120@linaro.org> References: <20250627-james-nxp-spi-dma-v4-0-178dba20c120@linaro.org> In-Reply-To: <20250627-james-nxp-spi-dma-v4-0-178dba20c120@linaro.org> To: Vladimir Oltean , Mark Brown , Vladimir Oltean , Arnd Bergmann , Larisa Grigore , Frank Li , Christoph Hellwig Cc: linux-spi@vger.kernel.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org, James Clark X-Mailer: b4 0.14.0 In target mode, the host sending more data than can be consumed would be a common problem for any message exceeding the FIFO or DMA buffer size. Cancel the whole message as soon as this condition is hit as the message will be corrupted. Only do this for target mode in a DMA transfer, it's not likely these flags will be set in host mode so it's not worth adding extra checks. In IRQ and polling modes we use the same transfer functions for hosts and targets so the error flags always get checked. This is slightly inconsistent but it's not worth doing the check conditionally because it may catch some host programming errors in the future. Signed-off-by: James Clark --- drivers/spi/spi-fsl-dspi.c | 27 ++++++++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index 46d3cae9efed..2c2a263c5276 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -478,6 +478,17 @@ static void dspi_push_rx(struct fsl_dspi *dspi, u32 rx= data) dspi->dev_to_host(dspi, rxdata); } =20 +static int dspi_fifo_error(struct fsl_dspi *dspi, u32 spi_sr) +{ + if (spi_sr & (SPI_SR_TFUF | SPI_SR_RFOF)) { + dev_err_ratelimited(&dspi->pdev->dev, "FIFO errors:%s%s\n", + spi_sr & SPI_SR_TFUF ? " TX underflow," : "", + spi_sr & SPI_SR_RFOF ? " RX overflow," : ""); + return -EIO; + } + return 0; +} + #if IS_ENABLED(CONFIG_DMA_ENGINE) =20 /* Prepare one TX FIFO entry (txdata plus cmd) */ @@ -566,6 +577,7 @@ static int dspi_next_xfer_dma_submit(struct fsl_dspi *d= spi) struct device *dev =3D &dspi->pdev->dev; struct fsl_dspi_dma *dma =3D dspi->dma; int time_left; + u32 spi_sr; int i; =20 for (i =3D 0; i < dspi->words_in_flight; i++) @@ -614,7 +626,8 @@ static int dspi_next_xfer_dma_submit(struct fsl_dspi *d= spi) =20 if (spi_controller_is_target(dspi->ctlr)) { wait_for_completion_interruptible(&dspi->dma->cmd_rx_complete); - return 0; + regmap_read(dspi->regmap, SPI_SR, &spi_sr); + return dspi_fifo_error(dspi, spi_sr); } =20 time_left =3D wait_for_completion_timeout(&dspi->dma->cmd_tx_complete, @@ -1067,6 +1080,9 @@ static void dspi_poll(struct fsl_dspi *dspi) regmap_read(dspi->regmap, SPI_SR, &spi_sr); regmap_write(dspi->regmap, SPI_SR, spi_sr); =20 + dspi->cur_msg->status =3D dspi_fifo_error(dspi, spi_sr); + if (dspi->cur_msg->status) + return; if (spi_sr & SPI_SR_CMDTCF) break; } @@ -1085,6 +1101,7 @@ static void dspi_poll(struct fsl_dspi *dspi) static irqreturn_t dspi_interrupt(int irq, void *dev_id) { struct fsl_dspi *dspi =3D (struct fsl_dspi *)dev_id; + int status; u32 spi_sr; =20 regmap_read(dspi->regmap, SPI_SR, &spi_sr); @@ -1093,6 +1110,14 @@ static irqreturn_t dspi_interrupt(int irq, void *dev= _id) if (!(spi_sr & SPI_SR_CMDTCF)) return IRQ_NONE; =20 + status =3D dspi_fifo_error(dspi, spi_sr); + if (status) { + if (dspi->cur_msg) + WRITE_ONCE(dspi->cur_msg->status, status); + complete(&dspi->xfer_done); + return IRQ_HANDLED; + } + dspi_rxtx(dspi); =20 if (!dspi->len) { --=20 2.34.1