From nobody Wed Oct 8 13:28:16 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 804A12C032C for ; Fri, 27 Jun 2025 11:52:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751025142; cv=none; b=d7Qq54OSlHoQ5PaWSSIo/Cfi8JjiJQ7cY0HXCSDP8yem0uHwrZZ8twmEiiYWApXekOi5u1bZN7BfwDZF9qdJ6pw9Z1REaFNYq9TRE1gunjp1AsJgZqBNKzXdtkF4IWTTEJY/oYLY4yCxTLjbx3h25N6jBCnCcTgE9GSxMmB+ANg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751025142; c=relaxed/simple; bh=u+1nafEkk9EBB23+tzbSoLdudRR4Y72Ha4gKlwB6mIg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Wxlifg0uAkd7+EcPC/azK9Yh2+xF0s8CP2GpRnY2NiUvvxF3HtNQRfo/0OGH3uRn9+oxZXSm90xNwvXKL7WYfQgLTe/6LBwFaM9zbQMyMiYnU/MjvjGKAA3uyBGs7/sF6bLUCkkhUubGKPslOctjYTKrbRJ38PDAkvsWcgMqx3U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9FCE722C7; Fri, 27 Jun 2025 04:52:02 -0700 (PDT) Received: from e132581.arm.com (e132581.arm.com [10.1.196.87]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 5DD5C3F58B; Fri, 27 Jun 2025 04:52:18 -0700 (PDT) From: Leo Yan Date: Fri, 27 Jun 2025 12:51:47 +0100 Subject: [PATCH v4 01/10] coresight: tmc: Support atclk Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250627-arm_cs_fix_clock_v4-v4-1-0ce0009c38f8@arm.com> References: <20250627-arm_cs_fix_clock_v4-v4-0-0ce0009c38f8@arm.com> In-Reply-To: <20250627-arm_cs_fix_clock_v4-v4-0-0ce0009c38f8@arm.com> To: Suzuki K Poulose , Mike Leach , James Clark , Anshuman Khandual , Alexander Shishkin , Greg Kroah-Hartman Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1751025136; l=3606; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=u+1nafEkk9EBB23+tzbSoLdudRR4Y72Ha4gKlwB6mIg=; b=n57p0vXfrKhe7qdph3Gte8I417UOPN47maz4U04A20yvL4nMpz+OdKbXDJKJNhljnIjT/uvfl gZTBGz4LXX6DNLw3M5LajCDxt1FKjVcRWB+b2Q63L1IpbvvmrUrwqBP X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= The atclk is an optional clock for the CoreSight TMC, but the driver misses to initialize it. In most cases, TMC shares the atclk clock with other CoreSight components. Since these components enable the clock before the TMC device is initialized, the TMC continues properly, which is why we don=E2=80=99t observe any lockup issues. This change enables atclk in probe of the TMC driver. Given the clock is optional, it is possible to return NULL if the clock does not exist. IS_ERR() is tolerant for this case. Dynamically disable and enable atclk during suspend and resume. The clock pointers will never be error values if the driver has successfully probed, and the case of a NULL pointer case will be handled by the clock core layer. The driver data is always valid after probe. Therefore, remove the related checks. Also in the resume flow adds error handling. Fixes: bc4bf7fe98da ("coresight-tmc: add CoreSight TMC driver") Reviewed-by: Anshuman Khandual Signed-off-by: Leo Yan Reviewed-by: Yeoreum Yun --- drivers/hwtracing/coresight/coresight-tmc-core.c | 22 +++++++++++++++++---= -- drivers/hwtracing/coresight/coresight-tmc.h | 2 ++ 2 files changed, 19 insertions(+), 5 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-tmc-core.c b/drivers/hwt= racing/coresight/coresight-tmc-core.c index 88afb16bb6bec395ba535155228d176250f38625..0b5e7635a084d226619e69189a2= ecbaff754ec43 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-core.c +++ b/drivers/hwtracing/coresight/coresight-tmc-core.c @@ -789,6 +789,10 @@ static int __tmc_probe(struct device *dev, struct reso= urce *res) struct coresight_desc desc =3D { 0 }; struct coresight_dev_list *dev_list =3D NULL; =20 + drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); + if (IS_ERR(drvdata->atclk)) + return PTR_ERR(drvdata->atclk); + ret =3D -ENOMEM; =20 /* Validity for the resource is already checked by the AMBA core */ @@ -1020,18 +1024,26 @@ static int tmc_runtime_suspend(struct device *dev) { struct tmc_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_disable_unprepare(drvdata->pclk); + clk_disable_unprepare(drvdata->atclk); + clk_disable_unprepare(drvdata->pclk); + return 0; } =20 static int tmc_runtime_resume(struct device *dev) { struct tmc_drvdata *drvdata =3D dev_get_drvdata(dev); + int ret; =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_prepare_enable(drvdata->pclk); - return 0; + ret =3D clk_prepare_enable(drvdata->pclk); + if (ret) + return ret; + + ret =3D clk_prepare_enable(drvdata->atclk); + if (ret) + clk_disable_unprepare(drvdata->pclk); + + return ret; } #endif =20 diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracin= g/coresight/coresight-tmc.h index 6541a27a018e6c3da8685e2e1c93b228d44e66fc..cbb4ba43915855a8acbb9205167= e87185c9a8c6c 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.h +++ b/drivers/hwtracing/coresight/coresight-tmc.h @@ -210,6 +210,7 @@ struct tmc_resrv_buf { =20 /** * struct tmc_drvdata - specifics associated to an TMC component + * @atclk: optional clock for the core parts of the TMC. * @pclk: APB clock if present, otherwise NULL * @base: memory mapped base address for this component. * @csdev: component vitals needed by the framework. @@ -244,6 +245,7 @@ struct tmc_resrv_buf { * Used by ETR/ETF. */ struct tmc_drvdata { + struct clk *atclk; struct clk *pclk; void __iomem *base; struct coresight_device *csdev; --=20 2.34.1 From nobody Wed Oct 8 13:28:16 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id C1DA52D8DAF for ; Fri, 27 Jun 2025 11:52:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751025144; cv=none; b=HpN3xazCR4kGn4D7ZsOyWbLhYKZCcbfMwoPiwk5RuV9fSefAaoUJ2ZLA42rYaiIw4J1mUbex1aHYcHayqYP778JQbwCGli7O1nvZc+VEZ+ec4qZ9uDdwFut9cOasvpv8bKDGQ2BiC0nXu1wvvtoWTnzSdjDau95yTEfrbbX985k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751025144; c=relaxed/simple; bh=W0RXauAdH0VFRZMmmyMoFf0LJ1iMqun6wq0yiJi/dQ0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=jMH0cSFYPKDo/llS+C2KuJ89ifhygDIHYS1IV4z8EkRCMjopbr8Z3FbxmqkPLznvPwPUJkovXEYxVoykn86n4YnXjdo8LWkQIGlY68rJEd5hvNxzU8QtN+t3mcck+Dj7iVh3c1TBFURhdNN4eNFBtJBwMBS0BLRU8glgDGFFtbs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8BBA51A00; Fri, 27 Jun 2025 04:52:04 -0700 (PDT) Received: from e132581.arm.com (e132581.arm.com [10.1.196.87]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 48F183F58B; Fri, 27 Jun 2025 04:52:20 -0700 (PDT) From: Leo Yan Date: Fri, 27 Jun 2025 12:51:48 +0100 Subject: [PATCH v4 02/10] coresight: catu: Support atclk Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250627-arm_cs_fix_clock_v4-v4-2-0ce0009c38f8@arm.com> References: <20250627-arm_cs_fix_clock_v4-v4-0-0ce0009c38f8@arm.com> In-Reply-To: <20250627-arm_cs_fix_clock_v4-v4-0-0ce0009c38f8@arm.com> To: Suzuki K Poulose , Mike Leach , James Clark , Anshuman Khandual , Alexander Shishkin , Greg Kroah-Hartman Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1751025136; l=2709; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=W0RXauAdH0VFRZMmmyMoFf0LJ1iMqun6wq0yiJi/dQ0=; b=V9SOV+ZgiBf81Mq8pYo3t0OYf4ewkgFSxBvjB8jv6PiT+zrGi4RgQQpa1oynTLgUSBGxsqo/y isnsSzqbfWnDYbOo04qEKcwI0qvQqyfhIIQqFfR2xb8gGNWrZzbhUo6 X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= The atclk is an optional clock for the CoreSight CATU, but the driver misses to initialize it. This change enables atclk in probe of the CATU driver, and dynamically control the clock during suspend and resume. The checks for driver data and clocks in suspend and resume are not needed, remove them. Add error handling in the resume function. Fixes: fcacb5c154ba ("coresight: Introduce support for Coresight Address Tr= anslation Unit") Reviewed-by: Anshuman Khandual Signed-off-by: Leo Yan Reviewed-by: Yeoreum Yun --- drivers/hwtracing/coresight/coresight-catu.c | 22 +++++++++++++++++----- drivers/hwtracing/coresight/coresight-catu.h | 1 + 2 files changed, 18 insertions(+), 5 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-catu.c b/drivers/hwtraci= ng/coresight/coresight-catu.c index 5058432233da1932f1965008fc1b98b560490414..af2a55f0c907c392d092a50612b= 23c115a1b0f5f 100644 --- a/drivers/hwtracing/coresight/coresight-catu.c +++ b/drivers/hwtracing/coresight/coresight-catu.c @@ -520,6 +520,10 @@ static int __catu_probe(struct device *dev, struct res= ource *res) struct coresight_platform_data *pdata =3D NULL; void __iomem *base; =20 + drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); + if (IS_ERR(drvdata->atclk)) + return PTR_ERR(drvdata->atclk); + catu_desc.name =3D coresight_alloc_device_name(&catu_devs, dev); if (!catu_desc.name) return -ENOMEM; @@ -668,18 +672,26 @@ static int catu_runtime_suspend(struct device *dev) { struct catu_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_disable_unprepare(drvdata->pclk); + clk_disable_unprepare(drvdata->atclk); + clk_disable_unprepare(drvdata->pclk); + return 0; } =20 static int catu_runtime_resume(struct device *dev) { struct catu_drvdata *drvdata =3D dev_get_drvdata(dev); + int ret; =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_prepare_enable(drvdata->pclk); - return 0; + ret =3D clk_prepare_enable(drvdata->pclk); + if (ret) + return ret; + + ret =3D clk_prepare_enable(drvdata->atclk); + if (ret) + clk_disable_unprepare(drvdata->pclk); + + return ret; } #endif =20 diff --git a/drivers/hwtracing/coresight/coresight-catu.h b/drivers/hwtraci= ng/coresight/coresight-catu.h index 755776cd19c5bb724845ca586ace1e0b29e72556..6e6b7aac206dcae9ff062355e50= 179637b4d1703 100644 --- a/drivers/hwtracing/coresight/coresight-catu.h +++ b/drivers/hwtracing/coresight/coresight-catu.h @@ -62,6 +62,7 @@ =20 struct catu_drvdata { struct clk *pclk; + struct clk *atclk; void __iomem *base; struct coresight_device *csdev; int irq; --=20 2.34.1 From nobody Wed Oct 8 13:28:16 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 70E022D3EFD for ; Fri, 27 Jun 2025 11:52:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751025146; cv=none; b=tyjg8rADocvHde9rOePEyJUfAYVxupXX2lqn199ZZwd3X/RrxKUUdiTSMlD4A3bg9BBu7xkERTRr7rXlj+uKnjdkwlOuT6JJt/NdzTylkaQTDStv1K732weZ4amF0sazIscUrkZhHFKkslR2xzBU23rgnYqoIhqXNXYH9PDZO3k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751025146; c=relaxed/simple; bh=U4nSKZsHj5YF1PoSUqIXvLt/NIwLr1ExyEPeP5GWn6M=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=PhCWNwSE8ScwLP6WqRrjI9Dtk2xTrW0aFjWxfHoFxxF79fFNxDYgkknz6c6T9m4EdhRE/aYDV/nLfSZejFKUn6PlcsPn2pcNArTHWTk9Km1QH3Z89Ok1eejjh9eCV/ZFleInKaOKyCgMpHjednzlYK2y87wPiBm+uI9zoFs50kg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 77B8F22C7; Fri, 27 Jun 2025 04:52:06 -0700 (PDT) Received: from e132581.arm.com (e132581.arm.com [10.1.196.87]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 34F283F58B; Fri, 27 Jun 2025 04:52:22 -0700 (PDT) From: Leo Yan Date: Fri, 27 Jun 2025 12:51:49 +0100 Subject: [PATCH v4 03/10] coresight: etm4x: Support atclk Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250627-arm_cs_fix_clock_v4-v4-3-0ce0009c38f8@arm.com> References: <20250627-arm_cs_fix_clock_v4-v4-0-0ce0009c38f8@arm.com> In-Reply-To: <20250627-arm_cs_fix_clock_v4-v4-0-0ce0009c38f8@arm.com> To: Suzuki K Poulose , Mike Leach , James Clark , Anshuman Khandual , Alexander Shishkin , Greg Kroah-Hartman Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1751025136; l=3430; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=U4nSKZsHj5YF1PoSUqIXvLt/NIwLr1ExyEPeP5GWn6M=; b=SEIMQQb8dHNUiqj1zD79NaD+i7dxGE0b1pvVE6JhfiKzSO7ejPKXygmQKrspd4yFUuphti64s QEBMVMTHbowAXRG0bov7ZZFtKFzGfa8YcRWMj45+oB+RnX0PmQyIxyV X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= The atclk is an optional clock for the CoreSight ETMv4, but the driver misses to initialize it. This change enables atclk in probe of the ETMv4 driver, and dynamically control the clock during suspend and resume. No need to check the driver data and clock pointer in the runtime suspend and resume, so remove checks. And add error handling in the resume function. Add a minor fix to the comment format when adding the atclk field. Fixes: 2e1cdfe184b5 ("coresight-etm4x: Adding CoreSight ETM4x driver") Reviewed-by: Anshuman Khandual Signed-off-by: Leo Yan Reviewed-by: Yeoreum Yun --- drivers/hwtracing/coresight/coresight-etm4x-core.c | 20 +++++++++++++++---= -- drivers/hwtracing/coresight/coresight-etm4x.h | 4 +++- 2 files changed, 18 insertions(+), 6 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/h= wtracing/coresight/coresight-etm4x-core.c index 42e5d37403addc6ec81f2e3184522d67d1677c04..205121c14d72ec2f6a193dccb94= b7cfd5c314e26 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -2215,6 +2215,10 @@ static int etm4_probe(struct device *dev) if (WARN_ON(!drvdata)) return -ENOMEM; =20 + drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); + if (IS_ERR(drvdata->atclk)) + return PTR_ERR(drvdata->atclk); + if (pm_save_enable =3D=3D PARAM_PM_SAVE_FIRMWARE) pm_save_enable =3D coresight_loses_context_with_cpu(dev) ? PARAM_PM_SAVE_SELF_HOSTED : PARAM_PM_SAVE_NEVER; @@ -2463,8 +2467,8 @@ static int etm4_runtime_suspend(struct device *dev) { struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata->pclk && !IS_ERR(drvdata->pclk)) - clk_disable_unprepare(drvdata->pclk); + clk_disable_unprepare(drvdata->atclk); + clk_disable_unprepare(drvdata->pclk); =20 return 0; } @@ -2472,11 +2476,17 @@ static int etm4_runtime_suspend(struct device *dev) static int etm4_runtime_resume(struct device *dev) { struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev); + int ret; + + ret =3D clk_prepare_enable(drvdata->pclk); + if (ret) + return ret; =20 - if (drvdata->pclk && !IS_ERR(drvdata->pclk)) - clk_prepare_enable(drvdata->pclk); + ret =3D clk_prepare_enable(drvdata->atclk); + if (ret) + clk_disable_unprepare(drvdata->pclk); =20 - return 0; + return ret; } #endif =20 diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtrac= ing/coresight/coresight-etm4x.h index ac649515054d905fa365203bd35f1d839b03292f..96c14ec26893a489a96c7acfe9b= a308e0e890917 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.h +++ b/drivers/hwtracing/coresight/coresight-etm4x.h @@ -919,7 +919,8 @@ struct etmv4_save_state { =20 /** * struct etm4_drvdata - specifics associated to an ETM component - * @pclk APB clock if present, otherwise NULL + * @pclk: APB clock if present, otherwise NULL + * @atclk: Optional clock for the core parts of the ETMv4. * @base: Memory mapped base address for this component. * @csdev: Component vitals needed by the framework. * @spinlock: Only one at a time pls. @@ -988,6 +989,7 @@ struct etmv4_save_state { */ struct etmv4_drvdata { struct clk *pclk; + struct clk *atclk; void __iomem *base; struct coresight_device *csdev; raw_spinlock_t spinlock; --=20 2.34.1 From nobody Wed Oct 8 13:28:16 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 131E42D97AB for ; Fri, 27 Jun 2025 11:52:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751025147; cv=none; b=RzVjWq52wqqugjkA1dUkxabCfQUn/mzD5/03LoTc8QEX5ivIN3O8o7EcXxxqy2E3/2z98OCdKQ4AbzujhwbGZ2jGNhgb4elw5Z8X0OOf0ButCBnbXWwFo0r3rpdLZA3Vr68FCwxVHj8IeZ6NfcPvpyMYrnawxCSxWvi1zy80Nx4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751025147; c=relaxed/simple; bh=GsN8h+TrCGwmrZyD7G2K3IdHVw/hlauPLGlafyymQ6c=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=OixqawYK63B+8vK+xWNgi7nYNbFwZAVl2C5O3TTFblZsp06yh8GptCt0DzKHabS0JKP0Hcd3f7jjq/FGyLt40OQ+4WXNJE0p7uDCG33eep3ziLWExCJJUEAuK1DhHILBaR6QabVQ4nc0KrN2A2HUSz4Z5nsoTHOGJUrio5GYdgg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8855F1A00; Fri, 27 Jun 2025 04:52:08 -0700 (PDT) Received: from e132581.arm.com (e132581.arm.com [10.1.196.87]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 20E923F58B; Fri, 27 Jun 2025 04:52:23 -0700 (PDT) From: Leo Yan Date: Fri, 27 Jun 2025 12:51:50 +0100 Subject: [PATCH v4 04/10] coresight: Appropriately disable programming clocks Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250627-arm_cs_fix_clock_v4-v4-4-0ce0009c38f8@arm.com> References: <20250627-arm_cs_fix_clock_v4-v4-0-0ce0009c38f8@arm.com> In-Reply-To: <20250627-arm_cs_fix_clock_v4-v4-0-0ce0009c38f8@arm.com> To: Suzuki K Poulose , Mike Leach , James Clark , Anshuman Khandual , Alexander Shishkin , Greg Kroah-Hartman Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1751025136; l=12372; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=GsN8h+TrCGwmrZyD7G2K3IdHVw/hlauPLGlafyymQ6c=; b=GzIApAarEJvYvZNkeNcBj/6bMaVGj0EG1gB+w7bURfgV2CjhnQ1jXu/SbCqiBfwq74ISZkmaQ wMvB2AyvnB7B5BK93lYiEb004Iz0V1TCFecBMI6DV73V3HsNv/Y8AT9 X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= Some CoreSight components have programming clocks (pclk) and are enabled using clk_get() and clk_prepare_enable(). However, in many cases, these clocks are not disabled when modules exit and only released by clk_put(). To fix the issue, this commit refactors coresight_get_enable_apb_pclk() by replacing clk_get() and clk_prepare_enable() with devm_clk_get_enabled() for enabling APB clock. Callers are updated to reuse the returned error value. With the change, programming clocks are managed as resources in driver model layer, allowing clock cleanup to be handled automatically. As a result, manual cleanup operations are no longer needed and are removed from the Coresight drivers. Fixes: 73d779a03a76 ("coresight: etm4x: Change etm4_platform_driver driver = for MMIO devices") Reviewed-by: Anshuman Khandual Signed-off-by: Leo Yan Reviewed-by: Yeoreum Yun --- drivers/hwtracing/coresight/coresight-catu.c | 9 ++------- drivers/hwtracing/coresight/coresight-cpu-debug.c | 6 +----- drivers/hwtracing/coresight/coresight-ctcu-core.c | 10 ++-------- drivers/hwtracing/coresight/coresight-etm4x-core.c | 9 ++------- drivers/hwtracing/coresight/coresight-funnel.c | 6 +----- drivers/hwtracing/coresight/coresight-replicator.c | 6 +----- drivers/hwtracing/coresight/coresight-stm.c | 4 +--- drivers/hwtracing/coresight/coresight-tmc-core.c | 4 +--- drivers/hwtracing/coresight/coresight-tpiu.c | 4 +--- include/linux/coresight.h | 16 +++------------- 10 files changed, 15 insertions(+), 59 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-catu.c b/drivers/hwtraci= ng/coresight/coresight-catu.c index af2a55f0c907c392d092a50612b23c115a1b0f5f..4c345ff2cff141ea63c2220393e= 5fdd00c449ca6 100644 --- a/drivers/hwtracing/coresight/coresight-catu.c +++ b/drivers/hwtracing/coresight/coresight-catu.c @@ -636,7 +636,7 @@ static int catu_platform_probe(struct platform_device *= pdev) =20 drvdata->pclk =3D coresight_get_enable_apb_pclk(&pdev->dev); if (IS_ERR(drvdata->pclk)) - return -ENODEV; + return PTR_ERR(drvdata->pclk); =20 pm_runtime_get_noresume(&pdev->dev); pm_runtime_set_active(&pdev->dev); @@ -645,11 +645,8 @@ static int catu_platform_probe(struct platform_device = *pdev) dev_set_drvdata(&pdev->dev, drvdata); ret =3D __catu_probe(&pdev->dev, res); pm_runtime_put(&pdev->dev); - if (ret) { + if (ret) pm_runtime_disable(&pdev->dev); - if (!IS_ERR_OR_NULL(drvdata->pclk)) - clk_put(drvdata->pclk); - } =20 return ret; } @@ -663,8 +660,6 @@ static void catu_platform_remove(struct platform_device= *pdev) =20 __catu_remove(&pdev->dev); pm_runtime_disable(&pdev->dev); - if (!IS_ERR_OR_NULL(drvdata->pclk)) - clk_put(drvdata->pclk); } =20 #ifdef CONFIG_PM diff --git a/drivers/hwtracing/coresight/coresight-cpu-debug.c b/drivers/hw= tracing/coresight/coresight-cpu-debug.c index a871d997330b09bdb741f35c59108b0b3252cc54..e39dfb886688e111eee95d4294f= 37fa85baccd14 100644 --- a/drivers/hwtracing/coresight/coresight-cpu-debug.c +++ b/drivers/hwtracing/coresight/coresight-cpu-debug.c @@ -699,7 +699,7 @@ static int debug_platform_probe(struct platform_device = *pdev) =20 drvdata->pclk =3D coresight_get_enable_apb_pclk(&pdev->dev); if (IS_ERR(drvdata->pclk)) - return -ENODEV; + return PTR_ERR(drvdata->pclk); =20 dev_set_drvdata(&pdev->dev, drvdata); pm_runtime_get_noresume(&pdev->dev); @@ -710,8 +710,6 @@ static int debug_platform_probe(struct platform_device = *pdev) if (ret) { pm_runtime_put_noidle(&pdev->dev); pm_runtime_disable(&pdev->dev); - if (!IS_ERR_OR_NULL(drvdata->pclk)) - clk_put(drvdata->pclk); } return ret; } @@ -725,8 +723,6 @@ static void debug_platform_remove(struct platform_devic= e *pdev) =20 __debug_remove(&pdev->dev); pm_runtime_disable(&pdev->dev); - if (!IS_ERR_OR_NULL(drvdata->pclk)) - clk_put(drvdata->pclk); } =20 #ifdef CONFIG_ACPI diff --git a/drivers/hwtracing/coresight/coresight-ctcu-core.c b/drivers/hw= tracing/coresight/coresight-ctcu-core.c index c6bafc96db963310b5e77a095953c83a172cfc7c..de279efe340581ceabfb9e1cd1e= 7fe4b5e4f826e 100644 --- a/drivers/hwtracing/coresight/coresight-ctcu-core.c +++ b/drivers/hwtracing/coresight/coresight-ctcu-core.c @@ -209,7 +209,7 @@ static int ctcu_probe(struct platform_device *pdev) =20 drvdata->apb_clk =3D coresight_get_enable_apb_pclk(dev); if (IS_ERR(drvdata->apb_clk)) - return -ENODEV; + return PTR_ERR(drvdata->apb_clk); =20 cfgs =3D of_device_get_match_data(dev); if (cfgs) { @@ -233,12 +233,8 @@ static int ctcu_probe(struct platform_device *pdev) desc.access =3D CSDEV_ACCESS_IOMEM(base); =20 drvdata->csdev =3D coresight_register(&desc); - if (IS_ERR(drvdata->csdev)) { - if (!IS_ERR_OR_NULL(drvdata->apb_clk)) - clk_put(drvdata->apb_clk); - + if (IS_ERR(drvdata->csdev)) return PTR_ERR(drvdata->csdev); - } =20 return 0; } @@ -275,8 +271,6 @@ static void ctcu_platform_remove(struct platform_device= *pdev) =20 ctcu_remove(pdev); pm_runtime_disable(&pdev->dev); - if (!IS_ERR_OR_NULL(drvdata->apb_clk)) - clk_put(drvdata->apb_clk); } =20 #ifdef CONFIG_PM diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/h= wtracing/coresight/coresight-etm4x-core.c index 205121c14d72ec2f6a193dccb94b7cfd5c314e26..1915da95b93d953a61778a71b48= 80c87b91fe17a 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -2303,14 +2303,12 @@ static int etm4_probe_platform_dev(struct platform_= device *pdev) =20 drvdata->pclk =3D coresight_get_enable_apb_pclk(&pdev->dev); if (IS_ERR(drvdata->pclk)) - return -ENODEV; + return PTR_ERR(drvdata->pclk); =20 if (res) { drvdata->base =3D devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(drvdata->base)) { - clk_put(drvdata->pclk); + if (IS_ERR(drvdata->base)) return PTR_ERR(drvdata->base); - } } =20 dev_set_drvdata(&pdev->dev, drvdata); @@ -2417,9 +2415,6 @@ static void etm4_remove_platform_dev(struct platform_= device *pdev) if (drvdata) etm4_remove_dev(drvdata); pm_runtime_disable(&pdev->dev); - - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_put(drvdata->pclk); } =20 static const struct amba_id etm4_ids[] =3D { diff --git a/drivers/hwtracing/coresight/coresight-funnel.c b/drivers/hwtra= cing/coresight/coresight-funnel.c index b1922dbe9292b02c91ca5730998e59ecdb08fdc7..36fc4e991458c112521c4261d73= f3e58e9a3f995 100644 --- a/drivers/hwtracing/coresight/coresight-funnel.c +++ b/drivers/hwtracing/coresight/coresight-funnel.c @@ -240,7 +240,7 @@ static int funnel_probe(struct device *dev, struct reso= urce *res) =20 drvdata->pclk =3D coresight_get_enable_apb_pclk(dev); if (IS_ERR(drvdata->pclk)) - return -ENODEV; + return PTR_ERR(drvdata->pclk); =20 /* * Map the device base for dynamic-funnel, which has been @@ -284,8 +284,6 @@ static int funnel_probe(struct device *dev, struct reso= urce *res) out_disable_clk: if (ret && !IS_ERR_OR_NULL(drvdata->atclk)) clk_disable_unprepare(drvdata->atclk); - if (ret && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_disable_unprepare(drvdata->pclk); return ret; } =20 @@ -355,8 +353,6 @@ static void funnel_platform_remove(struct platform_devi= ce *pdev) =20 funnel_remove(&pdev->dev); pm_runtime_disable(&pdev->dev); - if (!IS_ERR_OR_NULL(drvdata->pclk)) - clk_put(drvdata->pclk); } =20 static const struct of_device_id funnel_match[] =3D { diff --git a/drivers/hwtracing/coresight/coresight-replicator.c b/drivers/h= wtracing/coresight/coresight-replicator.c index 06efd2b01a0f71620eac71166567d14655b58403..6dd24eb10a94b0eb28f4f27afab= 845227e22b96c 100644 --- a/drivers/hwtracing/coresight/coresight-replicator.c +++ b/drivers/hwtracing/coresight/coresight-replicator.c @@ -247,7 +247,7 @@ static int replicator_probe(struct device *dev, struct = resource *res) =20 drvdata->pclk =3D coresight_get_enable_apb_pclk(dev); if (IS_ERR(drvdata->pclk)) - return -ENODEV; + return PTR_ERR(drvdata->pclk); =20 /* * Map the device base for dynamic-replicator, which has been @@ -296,8 +296,6 @@ static int replicator_probe(struct device *dev, struct = resource *res) out_disable_clk: if (ret && !IS_ERR_OR_NULL(drvdata->atclk)) clk_disable_unprepare(drvdata->atclk); - if (ret && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_disable_unprepare(drvdata->pclk); return ret; } =20 @@ -335,8 +333,6 @@ static void replicator_platform_remove(struct platform_= device *pdev) =20 replicator_remove(&pdev->dev); pm_runtime_disable(&pdev->dev); - if (!IS_ERR_OR_NULL(drvdata->pclk)) - clk_put(drvdata->pclk); } =20 #ifdef CONFIG_PM diff --git a/drivers/hwtracing/coresight/coresight-stm.c b/drivers/hwtracin= g/coresight/coresight-stm.c index e45c6c7204b4491e0f879bc7d5d445aa1d3118be..88ee453b2815444a550a2b932b2= 8367eb93336b8 100644 --- a/drivers/hwtracing/coresight/coresight-stm.c +++ b/drivers/hwtracing/coresight/coresight-stm.c @@ -851,7 +851,7 @@ static int __stm_probe(struct device *dev, struct resou= rce *res) =20 drvdata->pclk =3D coresight_get_enable_apb_pclk(dev); if (IS_ERR(drvdata->pclk)) - return -ENODEV; + return PTR_ERR(drvdata->pclk); dev_set_drvdata(dev, drvdata); =20 base =3D devm_ioremap_resource(dev, res); @@ -1033,8 +1033,6 @@ static void stm_platform_remove(struct platform_devic= e *pdev) =20 __stm_remove(&pdev->dev); pm_runtime_disable(&pdev->dev); - if (!IS_ERR_OR_NULL(drvdata->pclk)) - clk_put(drvdata->pclk); } =20 #ifdef CONFIG_ACPI diff --git a/drivers/hwtracing/coresight/coresight-tmc-core.c b/drivers/hwt= racing/coresight/coresight-tmc-core.c index 0b5e7635a084d226619e69189a2ecbaff754ec43..e867198b03e82892da7312c9dc1= c69676602c598 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-core.c +++ b/drivers/hwtracing/coresight/coresight-tmc-core.c @@ -991,7 +991,7 @@ static int tmc_platform_probe(struct platform_device *p= dev) =20 drvdata->pclk =3D coresight_get_enable_apb_pclk(&pdev->dev); if (IS_ERR(drvdata->pclk)) - return -ENODEV; + return PTR_ERR(drvdata->pclk); =20 dev_set_drvdata(&pdev->dev, drvdata); pm_runtime_get_noresume(&pdev->dev); @@ -1015,8 +1015,6 @@ static void tmc_platform_remove(struct platform_devic= e *pdev) =20 __tmc_remove(&pdev->dev); pm_runtime_disable(&pdev->dev); - if (!IS_ERR_OR_NULL(drvdata->pclk)) - clk_put(drvdata->pclk); } =20 #ifdef CONFIG_PM diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtraci= ng/coresight/coresight-tpiu.c index 3e01592884280819c16398cbb5e09cbaee5d3efb..b2559c6fac6d2f02e0038e583cd= 324d7165c5aee 100644 --- a/drivers/hwtracing/coresight/coresight-tpiu.c +++ b/drivers/hwtracing/coresight/coresight-tpiu.c @@ -153,7 +153,7 @@ static int __tpiu_probe(struct device *dev, struct reso= urce *res) =20 drvdata->pclk =3D coresight_get_enable_apb_pclk(dev); if (IS_ERR(drvdata->pclk)) - return -ENODEV; + return PTR_ERR(drvdata->pclk); dev_set_drvdata(dev, drvdata); =20 /* Validity for the resource is already checked by the AMBA core */ @@ -293,8 +293,6 @@ static void tpiu_platform_remove(struct platform_device= *pdev) =20 __tpiu_remove(&pdev->dev); pm_runtime_disable(&pdev->dev); - if (!IS_ERR_OR_NULL(drvdata->pclk)) - clk_put(drvdata->pclk); } =20 #ifdef CONFIG_ACPI diff --git a/include/linux/coresight.h b/include/linux/coresight.h index 4ac65c68bbf44b98db22c3dad2d83a224ce5278e..dd2b4cc7a2b70cf060a3207548f= e80e3824c489f 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -480,26 +480,16 @@ static inline bool is_coresight_device(void __iomem *= base) * Returns: * * clk - Clock is found and enabled - * NULL - clock is not found * ERROR - Clock is found but failed to enable */ static inline struct clk *coresight_get_enable_apb_pclk(struct device *dev) { struct clk *pclk; - int ret; =20 - pclk =3D clk_get(dev, "apb_pclk"); - if (IS_ERR(pclk)) { - pclk =3D clk_get(dev, "apb"); - if (IS_ERR(pclk)) - return NULL; - } + pclk =3D devm_clk_get_enabled(dev, "apb_pclk"); + if (IS_ERR(pclk)) + pclk =3D devm_clk_get_enabled(dev, "apb"); =20 - ret =3D clk_prepare_enable(pclk); - if (ret) { - clk_put(pclk); - return ERR_PTR(ret); - } return pclk; } =20 --=20 2.34.1 From nobody Wed Oct 8 13:28:16 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 32D382C15AF for ; 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dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7439B22C7; Fri, 27 Jun 2025 04:52:10 -0700 (PDT) Received: from e132581.arm.com (e132581.arm.com [10.1.196.87]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 317093F58B; Fri, 27 Jun 2025 04:52:26 -0700 (PDT) From: Leo Yan Date: Fri, 27 Jun 2025 12:51:51 +0100 Subject: [PATCH v4 05/10] coresight: Appropriately disable trace bus clocks Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250627-arm_cs_fix_clock_v4-v4-5-0ce0009c38f8@arm.com> References: <20250627-arm_cs_fix_clock_v4-v4-0-0ce0009c38f8@arm.com> In-Reply-To: <20250627-arm_cs_fix_clock_v4-v4-0-0ce0009c38f8@arm.com> To: Suzuki K Poulose , Mike Leach , James Clark , Anshuman Khandual , Alexander Shishkin , Greg Kroah-Hartman Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1751025136; l=9751; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=R8yXcLc5dSn9yMFhaxh3rhAjU3tKpIPpRldbC+BaQ3o=; b=TmcxyjQXWH9zZnoq8wjTlOYD4N7qtKNv5UW6hjdZbXPvxINeM/T79MATRnDkt+ZIouK3ht6Gf 7gtmTuofi6FCiHPBUXXcnCwNuCGTZ/wNSv1c+VeNDpnxbP88W8PRg5x X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= Some CoreSight components have trace bus clocks 'atclk' and are enabled using clk_prepare_enable(). These clocks are not disabled when modules exit. As atclk is optional, use devm_clk_get_optional_enabled() to manage it. The benefit is the driver model layer can automatically disable and release clocks. Check the returned value with IS_ERR() to detect errors but leave the NULL pointer case if the clock is not found. And remove the error handling codes which are no longer needed. Fixes: d1839e687773 ("coresight: etm: retrieve and handle atclk") Reviewed-by: Anshuman Khandual Signed-off-by: Leo Yan Reviewed-by: Yeoreum Yun --- drivers/hwtracing/coresight/coresight-etb10.c | 10 +++--- drivers/hwtracing/coresight/coresight-etm3x-core.c | 9 ++---- drivers/hwtracing/coresight/coresight-funnel.c | 36 +++++++-----------= ---- drivers/hwtracing/coresight/coresight-replicator.c | 34 ++++++------------= -- drivers/hwtracing/coresight/coresight-stm.c | 9 ++---- drivers/hwtracing/coresight/coresight-tpiu.c | 10 ++---- 6 files changed, 34 insertions(+), 74 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtrac= ing/coresight/coresight-etb10.c index d5efb085b30d36b51ca591c1b595ef82481f5569..8e81b41eb22264f17606050fa8d= a277aae05c5cc 100644 --- a/drivers/hwtracing/coresight/coresight-etb10.c +++ b/drivers/hwtracing/coresight/coresight-etb10.c @@ -730,12 +730,10 @@ static int etb_probe(struct amba_device *adev, const = struct amba_id *id) if (!drvdata) return -ENOMEM; =20 - drvdata->atclk =3D devm_clk_get(&adev->dev, "atclk"); /* optional */ - if (!IS_ERR(drvdata->atclk)) { - ret =3D clk_prepare_enable(drvdata->atclk); - if (ret) - return ret; - } + drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); + if (IS_ERR(drvdata->atclk)) + return PTR_ERR(drvdata->atclk); + dev_set_drvdata(dev, drvdata); =20 /* validity for the resource is already checked by the AMBA core */ diff --git a/drivers/hwtracing/coresight/coresight-etm3x-core.c b/drivers/h= wtracing/coresight/coresight-etm3x-core.c index 1c6204e1442211be6f3d7ca34bd2251ba796601b..baba2245b1dfb31f4bf19080e20= c33df3a5b854f 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm3x-core.c @@ -832,12 +832,9 @@ static int etm_probe(struct amba_device *adev, const s= truct amba_id *id) =20 spin_lock_init(&drvdata->spinlock); =20 - drvdata->atclk =3D devm_clk_get(&adev->dev, "atclk"); /* optional */ - if (!IS_ERR(drvdata->atclk)) { - ret =3D clk_prepare_enable(drvdata->atclk); - if (ret) - return ret; - } + drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); + if (IS_ERR(drvdata->atclk)) + return PTR_ERR(drvdata->atclk); =20 drvdata->cpu =3D coresight_get_cpu(dev); if (drvdata->cpu < 0) diff --git a/drivers/hwtracing/coresight/coresight-funnel.c b/drivers/hwtra= cing/coresight/coresight-funnel.c index 36fc4e991458c112521c4261d73f3e58e9a3f995..b044a4125310ba4f8c88df295ec= 3684ab266682f 100644 --- a/drivers/hwtracing/coresight/coresight-funnel.c +++ b/drivers/hwtracing/coresight/coresight-funnel.c @@ -213,7 +213,6 @@ ATTRIBUTE_GROUPS(coresight_funnel); =20 static int funnel_probe(struct device *dev, struct resource *res) { - int ret; void __iomem *base; struct coresight_platform_data *pdata =3D NULL; struct funnel_drvdata *drvdata; @@ -231,12 +230,9 @@ static int funnel_probe(struct device *dev, struct res= ource *res) if (!drvdata) return -ENOMEM; =20 - drvdata->atclk =3D devm_clk_get(dev, "atclk"); /* optional */ - if (!IS_ERR(drvdata->atclk)) { - ret =3D clk_prepare_enable(drvdata->atclk); - if (ret) - return ret; - } + drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); + if (IS_ERR(drvdata->atclk)) + return PTR_ERR(drvdata->atclk); =20 drvdata->pclk =3D coresight_get_enable_apb_pclk(dev); if (IS_ERR(drvdata->pclk)) @@ -248,10 +244,8 @@ static int funnel_probe(struct device *dev, struct res= ource *res) */ if (res) { base =3D devm_ioremap_resource(dev, res); - if (IS_ERR(base)) { - ret =3D PTR_ERR(base); - goto out_disable_clk; - } + if (IS_ERR(base)) + return PTR_ERR(base); drvdata->base =3D base; desc.groups =3D coresight_funnel_groups; desc.access =3D CSDEV_ACCESS_IOMEM(base); @@ -261,10 +255,9 @@ static int funnel_probe(struct device *dev, struct res= ource *res) dev_set_drvdata(dev, drvdata); =20 pdata =3D coresight_get_platform_data(dev); - if (IS_ERR(pdata)) { - ret =3D PTR_ERR(pdata); - goto out_disable_clk; - } + if (IS_ERR(pdata)) + return PTR_ERR(pdata); + dev->platform_data =3D pdata; =20 raw_spin_lock_init(&drvdata->spinlock); @@ -274,17 +267,10 @@ static int funnel_probe(struct device *dev, struct re= source *res) desc.pdata =3D pdata; desc.dev =3D dev; drvdata->csdev =3D coresight_register(&desc); - if (IS_ERR(drvdata->csdev)) { - ret =3D PTR_ERR(drvdata->csdev); - goto out_disable_clk; - } + if (IS_ERR(drvdata->csdev)) + return PTR_ERR(drvdata->csdev); =20 - ret =3D 0; - -out_disable_clk: - if (ret && !IS_ERR_OR_NULL(drvdata->atclk)) - clk_disable_unprepare(drvdata->atclk); - return ret; + return 0; } =20 static int funnel_remove(struct device *dev) diff --git a/drivers/hwtracing/coresight/coresight-replicator.c b/drivers/h= wtracing/coresight/coresight-replicator.c index 6dd24eb10a94b0eb28f4f27afab845227e22b96c..9e8bd36e7a9a2fd061f41c56242= ac2b11549daf5 100644 --- a/drivers/hwtracing/coresight/coresight-replicator.c +++ b/drivers/hwtracing/coresight/coresight-replicator.c @@ -219,7 +219,6 @@ static const struct attribute_group *replicator_groups[= ] =3D { =20 static int replicator_probe(struct device *dev, struct resource *res) { - int ret =3D 0; struct coresight_platform_data *pdata =3D NULL; struct replicator_drvdata *drvdata; struct coresight_desc desc =3D { 0 }; @@ -238,12 +237,9 @@ static int replicator_probe(struct device *dev, struct= resource *res) if (!drvdata) return -ENOMEM; =20 - drvdata->atclk =3D devm_clk_get(dev, "atclk"); /* optional */ - if (!IS_ERR(drvdata->atclk)) { - ret =3D clk_prepare_enable(drvdata->atclk); - if (ret) - return ret; - } + drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); + if (IS_ERR(drvdata->atclk)) + return PTR_ERR(drvdata->atclk); =20 drvdata->pclk =3D coresight_get_enable_apb_pclk(dev); if (IS_ERR(drvdata->pclk)) @@ -255,10 +251,8 @@ static int replicator_probe(struct device *dev, struct= resource *res) */ if (res) { base =3D devm_ioremap_resource(dev, res); - if (IS_ERR(base)) { - ret =3D PTR_ERR(base); - goto out_disable_clk; - } + if (IS_ERR(base)) + return PTR_ERR(base); drvdata->base =3D base; desc.groups =3D replicator_groups; desc.access =3D CSDEV_ACCESS_IOMEM(base); @@ -272,10 +266,8 @@ static int replicator_probe(struct device *dev, struct= resource *res) dev_set_drvdata(dev, drvdata); =20 pdata =3D coresight_get_platform_data(dev); - if (IS_ERR(pdata)) { - ret =3D PTR_ERR(pdata); - goto out_disable_clk; - } + if (IS_ERR(pdata)) + return PTR_ERR(pdata); dev->platform_data =3D pdata; =20 raw_spin_lock_init(&drvdata->spinlock); @@ -286,17 +278,11 @@ static int replicator_probe(struct device *dev, struc= t resource *res) desc.dev =3D dev; =20 drvdata->csdev =3D coresight_register(&desc); - if (IS_ERR(drvdata->csdev)) { - ret =3D PTR_ERR(drvdata->csdev); - goto out_disable_clk; - } + if (IS_ERR(drvdata->csdev)) + return PTR_ERR(drvdata->csdev); =20 replicator_reset(drvdata); - -out_disable_clk: - if (ret && !IS_ERR_OR_NULL(drvdata->atclk)) - clk_disable_unprepare(drvdata->atclk); - return ret; + return 0; } =20 static int replicator_remove(struct device *dev) diff --git a/drivers/hwtracing/coresight/coresight-stm.c b/drivers/hwtracin= g/coresight/coresight-stm.c index 88ee453b2815444a550a2b932b28367eb93336b8..57fbe3ad0fb20501d4e7e5c478d= 1e56e98685c40 100644 --- a/drivers/hwtracing/coresight/coresight-stm.c +++ b/drivers/hwtracing/coresight/coresight-stm.c @@ -842,12 +842,9 @@ static int __stm_probe(struct device *dev, struct reso= urce *res) if (!drvdata) return -ENOMEM; =20 - drvdata->atclk =3D devm_clk_get(dev, "atclk"); /* optional */ - if (!IS_ERR(drvdata->atclk)) { - ret =3D clk_prepare_enable(drvdata->atclk); - if (ret) - return ret; - } + drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); + if (IS_ERR(drvdata->atclk)) + return PTR_ERR(drvdata->atclk); =20 drvdata->pclk =3D coresight_get_enable_apb_pclk(dev); if (IS_ERR(drvdata->pclk)) diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtraci= ng/coresight/coresight-tpiu.c index b2559c6fac6d2f02e0038e583cd324d7165c5aee..8d6179c83e5d3194d1f90e10c88= fcc1faccf0cd7 100644 --- a/drivers/hwtracing/coresight/coresight-tpiu.c +++ b/drivers/hwtracing/coresight/coresight-tpiu.c @@ -128,7 +128,6 @@ static const struct coresight_ops tpiu_cs_ops =3D { =20 static int __tpiu_probe(struct device *dev, struct resource *res) { - int ret; void __iomem *base; struct coresight_platform_data *pdata =3D NULL; struct tpiu_drvdata *drvdata; @@ -144,12 +143,9 @@ static int __tpiu_probe(struct device *dev, struct res= ource *res) =20 spin_lock_init(&drvdata->spinlock); =20 - drvdata->atclk =3D devm_clk_get(dev, "atclk"); /* optional */ - if (!IS_ERR(drvdata->atclk)) { - ret =3D clk_prepare_enable(drvdata->atclk); - if (ret) - return ret; - } + drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); + if (IS_ERR(drvdata->atclk)) + return PTR_ERR(drvdata->atclk); =20 drvdata->pclk =3D coresight_get_enable_apb_pclk(dev); if (IS_ERR(drvdata->pclk)) --=20 2.34.1 From nobody Wed Oct 8 13:28:16 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 4BB4F2D9EC1 for ; Fri, 27 Jun 2025 11:52:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751025151; cv=none; b=auEaYFe+KRyqtjK2iTCfp3pXzK17Bfsu7c8ceh+RjrqgZ7EBDMzOdG/J8hufvGd1jH4tLhapfT1F9UGnjmF5pvS4gteN2RzVu48UXnP5qeAdhxhf5inqMCGzHu5dY7WWXUTSss9TpP6Y714Kko4E7X92+FwOz+5Vc1VlOJd7nMU= ARC-Message-Signature: i=1; a=rsa-sha256; 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Fri, 27 Jun 2025 04:52:27 -0700 (PDT) From: Leo Yan Date: Fri, 27 Jun 2025 12:51:52 +0100 Subject: [PATCH v4 06/10] coresight: Avoid enable programming clock duplicately Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250627-arm_cs_fix_clock_v4-v4-6-0ce0009c38f8@arm.com> References: <20250627-arm_cs_fix_clock_v4-v4-0-0ce0009c38f8@arm.com> In-Reply-To: <20250627-arm_cs_fix_clock_v4-v4-0-0ce0009c38f8@arm.com> To: Suzuki K Poulose , Mike Leach , James Clark , Anshuman Khandual , Alexander Shishkin , Greg Kroah-Hartman Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1751025136; l=1557; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=cuazPSya7V6vGGtK1ePheZ6n35wrfk3eIkvkqRNyloA=; b=VCkFsX6m41Kv+mHJlteDC2dQpF4mV74yWGfghjzC7StyXEkSS56z1DpTX5/ag0AklGtAuTOmI +X7XVN1Z6UHCNhT/SIfT5JLEcXAe7UFXMo9UMVcVGQSvI+lsIRTmWrd X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= The programming clock is enabled by AMBA bus driver before a dynamic probe. As a result, a CoreSight driver may redundantly enable the same clock. To avoid this, add a check for device type and skip enabling the programming clock for AMBA devices. The returned NULL pointer will be tolerated by the drivers. Fixes: 73d779a03a76 ("coresight: etm4x: Change etm4_platform_driver driver = for MMIO devices") Reviewed-by: Anshuman Khandual Signed-off-by: Leo Yan Reviewed-by: Yeoreum Yun --- include/linux/coresight.h | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/include/linux/coresight.h b/include/linux/coresight.h index dd2b4cc7a2b70cf060a3207548fe80e3824c489f..9afa1f76c78a3347e54d94fe9a9= ebed72e3fff8e 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -480,15 +480,18 @@ static inline bool is_coresight_device(void __iomem *= base) * Returns: * * clk - Clock is found and enabled + * NULL - Clock is not needed as it is managed by the AMBA bus driver * ERROR - Clock is found but failed to enable */ static inline struct clk *coresight_get_enable_apb_pclk(struct device *dev) { - struct clk *pclk; + struct clk *pclk =3D NULL; =20 - pclk =3D devm_clk_get_enabled(dev, "apb_pclk"); - if (IS_ERR(pclk)) - pclk =3D devm_clk_get_enabled(dev, "apb"); + if (!dev_is_amba(dev)) { + pclk =3D devm_clk_get_enabled(dev, "apb_pclk"); + if (IS_ERR(pclk)) + pclk =3D devm_clk_get_enabled(dev, "apb"); + } =20 return pclk; } --=20 2.34.1 From nobody Wed Oct 8 13:28:16 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 491312DBF77 for ; Fri, 27 Jun 2025 11:52:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751025154; cv=none; b=djR6Hkd7rp+B8xIGnv7oEtsQqxmlDyLEFpS57AIQPyClbnY1v4wAs+NhepB62jPETybBwIdlLRDkayKGkwKW523HTX6AYzd4x5DDSH3lrnT9lPLAnuSMhYim0o+rc7jZ4pXWniB15j/GSqI7pJmzRwEDumUL1H/fIVvaVvpgLvw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751025154; c=relaxed/simple; bh=WpczpQZj/Wb28bhrqX3rvG99XOBPc/AkeTq81hLWt7k=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=PM5eEXMQvG5Xk34Vrj5BW12IHVhTdjQcUqapMNt0X94kcVkVGeDTEr3HSrg8uqPzIgIWVDZtefQ4U+5Ydfqwg1aIvXNppPS7MKaaH6oCos/cg5KFcHfZOuHvIYKTZxmlvFfnOXGFx6A42QxBsWQHVuLZ2SBwSf5N+yH4UBunHfE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4DED022C7; Fri, 27 Jun 2025 04:52:14 -0700 (PDT) Received: from e132581.arm.com (e132581.arm.com [10.1.196.87]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0A2033F58B; Fri, 27 Jun 2025 04:52:29 -0700 (PDT) From: Leo Yan Date: Fri, 27 Jun 2025 12:51:53 +0100 Subject: [PATCH v4 07/10] coresight: Consolidate clock enabling Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250627-arm_cs_fix_clock_v4-v4-7-0ce0009c38f8@arm.com> References: <20250627-arm_cs_fix_clock_v4-v4-0-0ce0009c38f8@arm.com> In-Reply-To: <20250627-arm_cs_fix_clock_v4-v4-0-0ce0009c38f8@arm.com> To: Suzuki K Poulose , Mike Leach , James Clark , Anshuman Khandual , Alexander Shishkin , Greg Kroah-Hartman Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1751025136; l=15479; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=WpczpQZj/Wb28bhrqX3rvG99XOBPc/AkeTq81hLWt7k=; b=19v8TEHi78+HNrhFRBw9JB5g2Dcgpqxsl0HO5JxwNKb38bfOZKPXi9HyhQKmmVTDmMHliYM12 9EhvfYhy5NQCX69VznWMumUGzadzxt+3QlJwBuXnNK6CKVCj9dHHUEv X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= CoreSight drivers enable pclk and atclk conditionally. For example, pclk is only enabled in the static probe, while atclk is an optional clock that it is enabled for both dynamic and static probes, if it is present. In the current CoreSight drivers, these two clocks are initialized separately. This causes complex and duplicate codes. CoreSight drivers are refined so that clocks are initialized in one go. For this purpose, this commit renames coresight_get_enable_apb_pclk() to coresight_get_enable_clocks() and encapsulates clock initialization logic: - If a clock is initialized successfully, its clock pointer is assigned to the double pointer passed as an argument. - If pclk is skipped for an AMBA device, or if atclk is not found, the corresponding double pointer is set to NULL. The function returns Success (0) to guide callers can proceed with no error. - Otherwise, an error number is returned for failures. The function became complex, move it from the header to the CoreSight core layer and the symbol is exported. Added comments for recording details. Suggested-by: Suzuki K Poulose Signed-off-by: Leo Yan Reviewed-by: Anshuman Khandual Reviewed-by: Yeoreum Yun --- drivers/hwtracing/coresight/coresight-catu.c | 10 ++--- drivers/hwtracing/coresight/coresight-core.c | 46 ++++++++++++++++++= ++++ drivers/hwtracing/coresight/coresight-cpu-debug.c | 8 ++-- drivers/hwtracing/coresight/coresight-ctcu-core.c | 8 ++-- drivers/hwtracing/coresight/coresight-etm4x-core.c | 11 ++---- drivers/hwtracing/coresight/coresight-funnel.c | 11 ++---- drivers/hwtracing/coresight/coresight-replicator.c | 11 ++---- drivers/hwtracing/coresight/coresight-stm.c | 9 ++--- drivers/hwtracing/coresight/coresight-tmc-core.c | 10 ++--- drivers/hwtracing/coresight/coresight-tpiu.c | 10 ++--- include/linux/coresight.h | 23 +---------- 11 files changed, 81 insertions(+), 76 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-catu.c b/drivers/hwtraci= ng/coresight/coresight-catu.c index 4c345ff2cff141ea63c2220393e5fdd00c449ca6..0f476a0cbd740c233d039c5c411= ca192681e2023 100644 --- a/drivers/hwtracing/coresight/coresight-catu.c +++ b/drivers/hwtracing/coresight/coresight-catu.c @@ -520,9 +520,9 @@ static int __catu_probe(struct device *dev, struct reso= urce *res) struct coresight_platform_data *pdata =3D NULL; void __iomem *base; =20 - drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); - if (IS_ERR(drvdata->atclk)) - return PTR_ERR(drvdata->atclk); + ret =3D coresight_get_enable_clocks(dev, &drvdata->pclk, &drvdata->atclk); + if (ret) + return ret; =20 catu_desc.name =3D coresight_alloc_device_name(&catu_devs, dev); if (!catu_desc.name) @@ -634,10 +634,6 @@ static int catu_platform_probe(struct platform_device = *pdev) if (!drvdata) return -ENOMEM; =20 - drvdata->pclk =3D coresight_get_enable_apb_pclk(&pdev->dev); - if (IS_ERR(drvdata->pclk)) - return PTR_ERR(drvdata->pclk); - pm_runtime_get_noresume(&pdev->dev); pm_runtime_set_active(&pdev->dev); pm_runtime_enable(&pdev->dev); diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtraci= ng/coresight/coresight-core.c index fa758cc21827552a5c97b6bdd05d22dec4994b22..54455f8c025d3f838e9cd04e5de= 8bb45c5d47c7d 100644 --- a/drivers/hwtracing/coresight/coresight-core.c +++ b/drivers/hwtracing/coresight/coresight-core.c @@ -1698,6 +1698,52 @@ int coresight_etm_get_trace_id(struct coresight_devi= ce *csdev, enum cs_mode mode } EXPORT_SYMBOL_GPL(coresight_etm_get_trace_id); =20 +/* + * Attempt to find and enable programming clock (pclk) and trace clock (at= clk) + * for the given device. + * + * The AMBA bus driver will cover the pclk, to avoid duplicate operations, + * skip to get and enable the pclk for an AMBA device. + * + * atclk is an optional clock, it will be only enabled when it is existed. + * Otherwise, a NULL pointer will be returned to caller. + * + * Returns: '0' on Success; Error code otherwise. + */ +int coresight_get_enable_clocks(struct device *dev, struct clk **pclk, + struct clk **atclk) +{ + WARN_ON(!pclk); + + if (dev_is_amba(dev)) { + /* Don't enable pclk for an AMBA device */ + *pclk =3D NULL; + } else { + /* + * "apb_pclk" is the default clock name for an Arm Primecell + * peripheral, while "apb" is used only by the CTCU driver. + * + * For easier maintenance, CoreSight drivers should use + * "apb_pclk" as the programming clock name. + */ + *pclk =3D devm_clk_get_enabled(dev, "apb_pclk"); + if (IS_ERR(*pclk)) + *pclk =3D devm_clk_get_enabled(dev, "apb"); + if (IS_ERR(*pclk)) + return PTR_ERR(*pclk); + } + + /* Initialization of atclk is skipped if it is a NULL pointer. */ + if (atclk) { + *atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); + if (IS_ERR(*atclk)) + return PTR_ERR(*atclk); + } + + return 0; +} +EXPORT_SYMBOL_GPL(coresight_get_enable_clocks); + MODULE_LICENSE("GPL v2"); MODULE_AUTHOR("Pratik Patel "); MODULE_AUTHOR("Mathieu Poirier "); diff --git a/drivers/hwtracing/coresight/coresight-cpu-debug.c b/drivers/hw= tracing/coresight/coresight-cpu-debug.c index e39dfb886688e111eee95d4294f37fa85baccd14..5f6db2fb95d4623a0bab08828ae= 00442870abd7d 100644 --- a/drivers/hwtracing/coresight/coresight-cpu-debug.c +++ b/drivers/hwtracing/coresight/coresight-cpu-debug.c @@ -566,6 +566,10 @@ static int __debug_probe(struct device *dev, struct re= source *res) void __iomem *base; int ret; =20 + ret =3D coresight_get_enable_clocks(dev, &drvdata->pclk, NULL); + if (ret) + return ret; + drvdata->cpu =3D coresight_get_cpu(dev); if (drvdata->cpu < 0) return drvdata->cpu; @@ -697,10 +701,6 @@ static int debug_platform_probe(struct platform_device= *pdev) if (!drvdata) return -ENOMEM; =20 - drvdata->pclk =3D coresight_get_enable_apb_pclk(&pdev->dev); - if (IS_ERR(drvdata->pclk)) - return PTR_ERR(drvdata->pclk); - dev_set_drvdata(&pdev->dev, drvdata); pm_runtime_get_noresume(&pdev->dev); pm_runtime_set_active(&pdev->dev); diff --git a/drivers/hwtracing/coresight/coresight-ctcu-core.c b/drivers/hw= tracing/coresight/coresight-ctcu-core.c index de279efe340581ceabfb9e1cd1e7fe4b5e4f826e..75b5114ef652e4a47c53fbd2b78= 11c1bab575645 100644 --- a/drivers/hwtracing/coresight/coresight-ctcu-core.c +++ b/drivers/hwtracing/coresight/coresight-ctcu-core.c @@ -188,7 +188,7 @@ static int ctcu_probe(struct platform_device *pdev) const struct ctcu_config *cfgs; struct ctcu_drvdata *drvdata; void __iomem *base; - int i; + int i, ret; =20 desc.name =3D coresight_alloc_device_name(&ctcu_devs, dev); if (!desc.name) @@ -207,9 +207,9 @@ static int ctcu_probe(struct platform_device *pdev) if (IS_ERR(base)) return PTR_ERR(base); =20 - drvdata->apb_clk =3D coresight_get_enable_apb_pclk(dev); - if (IS_ERR(drvdata->apb_clk)) - return PTR_ERR(drvdata->apb_clk); + ret =3D coresight_get_enable_clocks(dev, &drvdata->apb_clk, NULL); + if (ret) + return ret; =20 cfgs =3D of_device_get_match_data(dev); if (cfgs) { diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/h= wtracing/coresight/coresight-etm4x-core.c index 1915da95b93d953a61778a71b4880c87b91fe17a..a742466ad0e14d2ceeeccddec5b= ba4f2160793c2 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -2211,13 +2211,14 @@ static int etm4_probe(struct device *dev) struct csdev_access access =3D { 0 }; struct etm4_init_arg init_arg =3D { 0 }; struct etm4_init_arg *delayed; + int ret; =20 if (WARN_ON(!drvdata)) return -ENOMEM; =20 - drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); - if (IS_ERR(drvdata->atclk)) - return PTR_ERR(drvdata->atclk); + ret =3D coresight_get_enable_clocks(dev, &drvdata->pclk, &drvdata->atclk); + if (ret) + return ret; =20 if (pm_save_enable =3D=3D PARAM_PM_SAVE_FIRMWARE) pm_save_enable =3D coresight_loses_context_with_cpu(dev) ? @@ -2301,10 +2302,6 @@ static int etm4_probe_platform_dev(struct platform_d= evice *pdev) if (!drvdata) return -ENOMEM; =20 - drvdata->pclk =3D coresight_get_enable_apb_pclk(&pdev->dev); - if (IS_ERR(drvdata->pclk)) - return PTR_ERR(drvdata->pclk); - if (res) { drvdata->base =3D devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(drvdata->base)) diff --git a/drivers/hwtracing/coresight/coresight-funnel.c b/drivers/hwtra= cing/coresight/coresight-funnel.c index b044a4125310ba4f8c88df295ec3684ab266682f..02e0dc678a32c3b1f32fc955bf8= 871142e3412e1 100644 --- a/drivers/hwtracing/coresight/coresight-funnel.c +++ b/drivers/hwtracing/coresight/coresight-funnel.c @@ -217,6 +217,7 @@ static int funnel_probe(struct device *dev, struct reso= urce *res) struct coresight_platform_data *pdata =3D NULL; struct funnel_drvdata *drvdata; struct coresight_desc desc =3D { 0 }; + int ret; =20 if (is_of_node(dev_fwnode(dev)) && of_device_is_compatible(dev->of_node, "arm,coresight-funnel")) @@ -230,13 +231,9 @@ static int funnel_probe(struct device *dev, struct res= ource *res) if (!drvdata) return -ENOMEM; =20 - drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); - if (IS_ERR(drvdata->atclk)) - return PTR_ERR(drvdata->atclk); - - drvdata->pclk =3D coresight_get_enable_apb_pclk(dev); - if (IS_ERR(drvdata->pclk)) - return PTR_ERR(drvdata->pclk); + ret =3D coresight_get_enable_clocks(dev, &drvdata->pclk, &drvdata->atclk); + if (ret) + return ret; =20 /* * Map the device base for dynamic-funnel, which has been diff --git a/drivers/hwtracing/coresight/coresight-replicator.c b/drivers/h= wtracing/coresight/coresight-replicator.c index 9e8bd36e7a9a2fd061f41c56242ac2b11549daf5..f1bbd12e63e0c130f945d8df34f= b2334bd21336f 100644 --- a/drivers/hwtracing/coresight/coresight-replicator.c +++ b/drivers/hwtracing/coresight/coresight-replicator.c @@ -223,6 +223,7 @@ static int replicator_probe(struct device *dev, struct = resource *res) struct replicator_drvdata *drvdata; struct coresight_desc desc =3D { 0 }; void __iomem *base; + int ret; =20 if (is_of_node(dev_fwnode(dev)) && of_device_is_compatible(dev->of_node, "arm,coresight-replicator")) @@ -237,13 +238,9 @@ static int replicator_probe(struct device *dev, struct= resource *res) if (!drvdata) return -ENOMEM; =20 - drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); - if (IS_ERR(drvdata->atclk)) - return PTR_ERR(drvdata->atclk); - - drvdata->pclk =3D coresight_get_enable_apb_pclk(dev); - if (IS_ERR(drvdata->pclk)) - return PTR_ERR(drvdata->pclk); + ret =3D coresight_get_enable_clocks(dev, &drvdata->pclk, &drvdata->atclk); + if (ret) + return ret; =20 /* * Map the device base for dynamic-replicator, which has been diff --git a/drivers/hwtracing/coresight/coresight-stm.c b/drivers/hwtracin= g/coresight/coresight-stm.c index 57fbe3ad0fb20501d4e7e5c478d1e56e98685c40..a931282ec0eaf1b2a5db8ccc8f2= 1789441cd634d 100644 --- a/drivers/hwtracing/coresight/coresight-stm.c +++ b/drivers/hwtracing/coresight/coresight-stm.c @@ -842,13 +842,10 @@ static int __stm_probe(struct device *dev, struct res= ource *res) if (!drvdata) return -ENOMEM; =20 - drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); - if (IS_ERR(drvdata->atclk)) - return PTR_ERR(drvdata->atclk); + ret =3D coresight_get_enable_clocks(dev, &drvdata->pclk, &drvdata->atclk); + if (ret) + return ret; =20 - drvdata->pclk =3D coresight_get_enable_apb_pclk(dev); - if (IS_ERR(drvdata->pclk)) - return PTR_ERR(drvdata->pclk); dev_set_drvdata(dev, drvdata); =20 base =3D devm_ioremap_resource(dev, res); diff --git a/drivers/hwtracing/coresight/coresight-tmc-core.c b/drivers/hwt= racing/coresight/coresight-tmc-core.c index e867198b03e82892da7312c9dc1c69676602c598..ead3f5358d411b1d9e45f87986b= d85cbe5be720a 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-core.c +++ b/drivers/hwtracing/coresight/coresight-tmc-core.c @@ -789,9 +789,9 @@ static int __tmc_probe(struct device *dev, struct resou= rce *res) struct coresight_desc desc =3D { 0 }; struct coresight_dev_list *dev_list =3D NULL; =20 - drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); - if (IS_ERR(drvdata->atclk)) - return PTR_ERR(drvdata->atclk); + ret =3D coresight_get_enable_clocks(dev, &drvdata->pclk, &drvdata->atclk); + if (ret) + return ret; =20 ret =3D -ENOMEM; =20 @@ -989,10 +989,6 @@ static int tmc_platform_probe(struct platform_device *= pdev) if (!drvdata) return -ENOMEM; =20 - drvdata->pclk =3D coresight_get_enable_apb_pclk(&pdev->dev); - if (IS_ERR(drvdata->pclk)) - return PTR_ERR(drvdata->pclk); - dev_set_drvdata(&pdev->dev, drvdata); pm_runtime_get_noresume(&pdev->dev); pm_runtime_set_active(&pdev->dev); diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtraci= ng/coresight/coresight-tpiu.c index 8d6179c83e5d3194d1f90e10c88fcc1faccf0cd7..5e47d761e1c4e99072eeb492c1e= ac7dd4285a591 100644 --- a/drivers/hwtracing/coresight/coresight-tpiu.c +++ b/drivers/hwtracing/coresight/coresight-tpiu.c @@ -132,6 +132,7 @@ static int __tpiu_probe(struct device *dev, struct reso= urce *res) struct coresight_platform_data *pdata =3D NULL; struct tpiu_drvdata *drvdata; struct coresight_desc desc =3D { 0 }; + int ret; =20 desc.name =3D coresight_alloc_device_name(&tpiu_devs, dev); if (!desc.name) @@ -143,13 +144,10 @@ static int __tpiu_probe(struct device *dev, struct re= source *res) =20 spin_lock_init(&drvdata->spinlock); =20 - drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); - if (IS_ERR(drvdata->atclk)) - return PTR_ERR(drvdata->atclk); + ret =3D coresight_get_enable_clocks(dev, &drvdata->pclk, &drvdata->atclk); + if (ret) + return ret; =20 - drvdata->pclk =3D coresight_get_enable_apb_pclk(dev); - if (IS_ERR(drvdata->pclk)) - return PTR_ERR(drvdata->pclk); dev_set_drvdata(dev, drvdata); =20 /* Validity for the resource is already checked by the AMBA core */ diff --git a/include/linux/coresight.h b/include/linux/coresight.h index 9afa1f76c78a3347e54d94fe9a9ebed72e3fff8e..96cc814c1886f02bf802918b3cc= b457b245bdbd6 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -474,27 +474,6 @@ static inline bool is_coresight_device(void __iomem *b= ase) return cid =3D=3D CORESIGHT_CID; } =20 -/* - * Attempt to find and enable "APB clock" for the given device - * - * Returns: - * - * clk - Clock is found and enabled - * NULL - Clock is not needed as it is managed by the AMBA bus driver - * ERROR - Clock is found but failed to enable - */ -static inline struct clk *coresight_get_enable_apb_pclk(struct device *dev) -{ - struct clk *pclk =3D NULL; - - if (!dev_is_amba(dev)) { - pclk =3D devm_clk_get_enabled(dev, "apb_pclk"); - if (IS_ERR(pclk)) - pclk =3D devm_clk_get_enabled(dev, "apb"); - } - - return pclk; -} =20 #define CORESIGHT_PIDRn(i) (0xFE0 + ((i) * 4)) =20 @@ -726,4 +705,6 @@ void coresight_remove_driver(struct amba_driver *amba_d= rv, struct platform_driver *pdev_drv); int coresight_etm_get_trace_id(struct coresight_device *csdev, enum cs_mod= e mode, struct coresight_device *sink); +int coresight_get_enable_clocks(struct device *dev, struct clk **pclk, + struct clk **atclk); #endif /* _LINUX_COREISGHT_H */ --=20 2.34.1 From nobody Wed Oct 8 13:28:16 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id DC1B12BF011 for ; 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dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 393E91A00; Fri, 27 Jun 2025 04:52:16 -0700 (PDT) Received: from e132581.arm.com (e132581.arm.com [10.1.196.87]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id EB0703F58B; Fri, 27 Jun 2025 04:52:31 -0700 (PDT) From: Leo Yan Date: Fri, 27 Jun 2025 12:51:54 +0100 Subject: [PATCH v4 08/10] coresight: Refactor driver data allocation Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250627-arm_cs_fix_clock_v4-v4-8-0ce0009c38f8@arm.com> References: <20250627-arm_cs_fix_clock_v4-v4-0-0ce0009c38f8@arm.com> In-Reply-To: <20250627-arm_cs_fix_clock_v4-v4-0-0ce0009c38f8@arm.com> To: Suzuki K Poulose , Mike Leach , James Clark , Anshuman Khandual , Alexander Shishkin , Greg Kroah-Hartman Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1751025136; l=6103; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=qCJIDHlKgLxVVrOHq7iV9Oickr7qzW4eb+saKaVMpCA=; b=/yOmOXE0EpVTbZZ/v2wdZ6bRrIyUBlfR30WcISMGimxVGxYIVOBfz/st7QGgBJxiDwSWSTwg5 4M8s80vQPZ2DRo2nFkGry95BFuzO9S+Y9ueGOJEYW799aytXVsn/0Lm X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= The driver data no longer needs to be allocated separately in the static and dynamic probes. Moved the allocation into the low-level functions to avoid code duplication. Signed-off-by: Leo Yan Reviewed-by: Anshuman Khandual Reviewed-by: Yeoreum Yun --- drivers/hwtracing/coresight/coresight-catu.c | 20 +++++++------------- drivers/hwtracing/coresight/coresight-cpu-debug.c | 21 +++++++------------= -- drivers/hwtracing/coresight/coresight-tmc-core.c | 20 +++++++------------- 3 files changed, 21 insertions(+), 40 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-catu.c b/drivers/hwtraci= ng/coresight/coresight-catu.c index 0f476a0cbd740c233d039c5c411ca192681e2023..a3ccb7034ae14d7339bc2549bcc= adf11e28c45e2 100644 --- a/drivers/hwtracing/coresight/coresight-catu.c +++ b/drivers/hwtracing/coresight/coresight-catu.c @@ -515,11 +515,17 @@ static int __catu_probe(struct device *dev, struct re= source *res) { int ret =3D 0; u32 dma_mask; - struct catu_drvdata *drvdata =3D dev_get_drvdata(dev); + struct catu_drvdata *drvdata; struct coresight_desc catu_desc; struct coresight_platform_data *pdata =3D NULL; void __iomem *base; =20 + drvdata =3D devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); + if (!drvdata) + return -ENOMEM; + + dev_set_drvdata(dev, drvdata); + ret =3D coresight_get_enable_clocks(dev, &drvdata->pclk, &drvdata->atclk); if (ret) return ret; @@ -580,14 +586,8 @@ static int __catu_probe(struct device *dev, struct res= ource *res) =20 static int catu_probe(struct amba_device *adev, const struct amba_id *id) { - struct catu_drvdata *drvdata; int ret; =20 - drvdata =3D devm_kzalloc(&adev->dev, sizeof(*drvdata), GFP_KERNEL); - if (!drvdata) - return -ENOMEM; - - amba_set_drvdata(adev, drvdata); ret =3D __catu_probe(&adev->dev, &adev->res); if (!ret) pm_runtime_put(&adev->dev); @@ -627,18 +627,12 @@ static struct amba_driver catu_driver =3D { static int catu_platform_probe(struct platform_device *pdev) { struct resource *res =3D platform_get_resource(pdev, IORESOURCE_MEM, 0); - struct catu_drvdata *drvdata; int ret =3D 0; =20 - drvdata =3D devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL); - if (!drvdata) - return -ENOMEM; - pm_runtime_get_noresume(&pdev->dev); pm_runtime_set_active(&pdev->dev); pm_runtime_enable(&pdev->dev); =20 - dev_set_drvdata(&pdev->dev, drvdata); ret =3D __catu_probe(&pdev->dev, res); pm_runtime_put(&pdev->dev); if (ret) diff --git a/drivers/hwtracing/coresight/coresight-cpu-debug.c b/drivers/hw= tracing/coresight/coresight-cpu-debug.c index 5f6db2fb95d4623a0bab08828ae00442870abd7d..3edfb5d3d02056afcaab4da575d= 1101c68aeac80 100644 --- a/drivers/hwtracing/coresight/coresight-cpu-debug.c +++ b/drivers/hwtracing/coresight/coresight-cpu-debug.c @@ -562,10 +562,16 @@ static void debug_func_exit(void) =20 static int __debug_probe(struct device *dev, struct resource *res) { - struct debug_drvdata *drvdata =3D dev_get_drvdata(dev); + struct debug_drvdata *drvdata; void __iomem *base; int ret; =20 + drvdata =3D devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); + if (!drvdata) + return -ENOMEM; + + dev_set_drvdata(dev, drvdata); + ret =3D coresight_get_enable_clocks(dev, &drvdata->pclk, NULL); if (ret) return ret; @@ -629,13 +635,6 @@ static int __debug_probe(struct device *dev, struct re= source *res) =20 static int debug_probe(struct amba_device *adev, const struct amba_id *id) { - struct debug_drvdata *drvdata; - - drvdata =3D devm_kzalloc(&adev->dev, sizeof(*drvdata), GFP_KERNEL); - if (!drvdata) - return -ENOMEM; - - amba_set_drvdata(adev, drvdata); return __debug_probe(&adev->dev, &adev->res); } =20 @@ -694,14 +693,8 @@ static struct amba_driver debug_driver =3D { static int debug_platform_probe(struct platform_device *pdev) { struct resource *res =3D platform_get_resource(pdev, IORESOURCE_MEM, 0); - struct debug_drvdata *drvdata; int ret =3D 0; =20 - drvdata =3D devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL); - if (!drvdata) - return -ENOMEM; - - dev_set_drvdata(&pdev->dev, drvdata); pm_runtime_get_noresume(&pdev->dev); pm_runtime_set_active(&pdev->dev); pm_runtime_enable(&pdev->dev); diff --git a/drivers/hwtracing/coresight/coresight-tmc-core.c b/drivers/hwt= racing/coresight/coresight-tmc-core.c index ead3f5358d411b1d9e45f87986bd85cbe5be720a..e5ab4a0323354d826c831f68c71= d81808cbcd8ff 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-core.c +++ b/drivers/hwtracing/coresight/coresight-tmc-core.c @@ -785,10 +785,16 @@ static int __tmc_probe(struct device *dev, struct res= ource *res) u32 devid; void __iomem *base; struct coresight_platform_data *pdata =3D NULL; - struct tmc_drvdata *drvdata =3D dev_get_drvdata(dev); + struct tmc_drvdata *drvdata; struct coresight_desc desc =3D { 0 }; struct coresight_dev_list *dev_list =3D NULL; =20 + drvdata =3D devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); + if (!drvdata) + return -ENOMEM; + + dev_set_drvdata(dev, drvdata); + ret =3D coresight_get_enable_clocks(dev, &drvdata->pclk, &drvdata->atclk); if (ret) return ret; @@ -898,14 +904,8 @@ static int __tmc_probe(struct device *dev, struct reso= urce *res) =20 static int tmc_probe(struct amba_device *adev, const struct amba_id *id) { - struct tmc_drvdata *drvdata; int ret; =20 - drvdata =3D devm_kzalloc(&adev->dev, sizeof(*drvdata), GFP_KERNEL); - if (!drvdata) - return -ENOMEM; - - amba_set_drvdata(adev, drvdata); ret =3D __tmc_probe(&adev->dev, &adev->res); if (!ret) pm_runtime_put(&adev->dev); @@ -982,14 +982,8 @@ static struct amba_driver tmc_driver =3D { static int tmc_platform_probe(struct platform_device *pdev) { struct resource *res =3D platform_get_resource(pdev, IORESOURCE_MEM, 0); - struct tmc_drvdata *drvdata; int ret =3D 0; =20 - drvdata =3D devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL); - if (!drvdata) - return -ENOMEM; - - dev_set_drvdata(&pdev->dev, drvdata); pm_runtime_get_noresume(&pdev->dev); pm_runtime_set_active(&pdev->dev); pm_runtime_enable(&pdev->dev); --=20 2.34.1 From nobody Wed Oct 8 13:28:16 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id AC4DE2DCC1A for ; Fri, 27 Jun 2025 11:52:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751025157; cv=none; b=pfEW9UVYkJC/qMlS2FsWWpJHnoZC6FfkXJMjOG1jMKrh+H5zOdupvAKpMhVcnV2aGSBcZu92fuZN4vXBHSYLA91oYmDdUDod3grM8i2dipF5EXX0Jup7DRU4PcoKjPKJUw6CbGrtml+kBqjtas7PJYqeWScyWZOtAlY87iDARtQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751025157; c=relaxed/simple; bh=n87S/2oSxpnOkHLiSzhmE46RIApYY231MlBT/6pX/wo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=NkgRRDUB94JZv9bw3wZNSdjMlCpRdBstXqrtFezc9GlAKGN5DH3wo6GiNUDApmiJ89qAz7fRpxaq8Y5pSvBEp9DUwJPcGdpgkWQqQ+M15EHcd80OwFr0y718WhDX87oc7JnOf0uMTEEtVziq2dAs7iYpcaon/pH/uJfNefukGrY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 25E1922C7; Fri, 27 Jun 2025 04:52:18 -0700 (PDT) Received: from e132581.arm.com (e132581.arm.com [10.1.196.87]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D6A813F58B; Fri, 27 Jun 2025 04:52:33 -0700 (PDT) From: Leo Yan Date: Fri, 27 Jun 2025 12:51:55 +0100 Subject: [PATCH v4 09/10] coresight: Make clock sequence consistent Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250627-arm_cs_fix_clock_v4-v4-9-0ce0009c38f8@arm.com> References: <20250627-arm_cs_fix_clock_v4-v4-0-0ce0009c38f8@arm.com> In-Reply-To: <20250627-arm_cs_fix_clock_v4-v4-0-0ce0009c38f8@arm.com> To: Suzuki K Poulose , Mike Leach , James Clark , Anshuman Khandual , Alexander Shishkin , Greg Kroah-Hartman Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1751025136; l=3530; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=n87S/2oSxpnOkHLiSzhmE46RIApYY231MlBT/6pX/wo=; b=r0plWUwY17xPYYj2d4wdSo08zRwttIV3zgPGRNmG8MTDPy5juWIxE4bdDU3yApkKCFR1gTaZs 4RlTB8Bdk4JAMJ4n8eytPWW/JFMe6z4Vvy66QgjSfiIkbXVKE8wLo7S X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= Since atclk is enabled after pclk during the probe phase, this commit maintains the same sequence for the runtime resume flow. Reviewed-by: Anshuman Khandual Signed-off-by: Leo Yan Reviewed-by: Yeoreum Yun --- drivers/hwtracing/coresight/coresight-funnel.c | 6 +++--- drivers/hwtracing/coresight/coresight-replicator.c | 6 +++--- drivers/hwtracing/coresight/coresight-stm.c | 6 +++--- drivers/hwtracing/coresight/coresight-tpiu.c | 6 +++--- 4 files changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-funnel.c b/drivers/hwtra= cing/coresight/coresight-funnel.c index 02e0dc678a32c3b1f32fc955bf8871142e3412e1..9dcfc5ce8845d9e01bb956dddab= 0d64de51ec397 100644 --- a/drivers/hwtracing/coresight/coresight-funnel.c +++ b/drivers/hwtracing/coresight/coresight-funnel.c @@ -297,11 +297,11 @@ static int funnel_runtime_resume(struct device *dev) { struct funnel_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_prepare_enable(drvdata->atclk); - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) clk_prepare_enable(drvdata->pclk); + + if (drvdata && !IS_ERR(drvdata->atclk)) + clk_prepare_enable(drvdata->atclk); return 0; } #endif diff --git a/drivers/hwtracing/coresight/coresight-replicator.c b/drivers/h= wtracing/coresight/coresight-replicator.c index f1bbd12e63e0c130f945d8df34fb2334bd21336f..e53095603b0c0419bc96a66b23d= 15bb54e75e634 100644 --- a/drivers/hwtracing/coresight/coresight-replicator.c +++ b/drivers/hwtracing/coresight/coresight-replicator.c @@ -335,11 +335,11 @@ static int replicator_runtime_resume(struct device *d= ev) { struct replicator_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_prepare_enable(drvdata->atclk); - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) clk_prepare_enable(drvdata->pclk); + + if (drvdata && !IS_ERR(drvdata->atclk)) + clk_prepare_enable(drvdata->atclk); return 0; } #endif diff --git a/drivers/hwtracing/coresight/coresight-stm.c b/drivers/hwtracin= g/coresight/coresight-stm.c index a931282ec0eaf1b2a5db8ccc8f21789441cd634d..ed68d8280b1945f38d1294a5b5f= 557a614c90c94 100644 --- a/drivers/hwtracing/coresight/coresight-stm.c +++ b/drivers/hwtracing/coresight/coresight-stm.c @@ -969,11 +969,11 @@ static int stm_runtime_resume(struct device *dev) { struct stm_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_prepare_enable(drvdata->atclk); - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) clk_prepare_enable(drvdata->pclk); + + if (drvdata && !IS_ERR(drvdata->atclk)) + clk_prepare_enable(drvdata->atclk); return 0; } #endif diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtraci= ng/coresight/coresight-tpiu.c index 5e47d761e1c4e99072eeb492c1eac7dd4285a591..1c5c2a82971490888c45508c68b= 516ab7dbf3eeb 100644 --- a/drivers/hwtracing/coresight/coresight-tpiu.c +++ b/drivers/hwtracing/coresight/coresight-tpiu.c @@ -218,11 +218,11 @@ static int tpiu_runtime_resume(struct device *dev) { struct tpiu_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_prepare_enable(drvdata->atclk); - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) clk_prepare_enable(drvdata->pclk); + + if (drvdata && !IS_ERR(drvdata->atclk)) + clk_prepare_enable(drvdata->atclk); return 0; } #endif --=20 2.34.1 From nobody Wed Oct 8 13:28:16 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id F14652DD60B for ; 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dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1195022C7; Fri, 27 Jun 2025 04:52:20 -0700 (PDT) Received: from e132581.arm.com (e132581.arm.com [10.1.196.87]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C33923F58B; Fri, 27 Jun 2025 04:52:35 -0700 (PDT) From: Leo Yan Date: Fri, 27 Jun 2025 12:51:56 +0100 Subject: [PATCH v4 10/10] coresight: Refactor runtime PM Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250627-arm_cs_fix_clock_v4-v4-10-0ce0009c38f8@arm.com> References: <20250627-arm_cs_fix_clock_v4-v4-0-0ce0009c38f8@arm.com> In-Reply-To: <20250627-arm_cs_fix_clock_v4-v4-0-0ce0009c38f8@arm.com> To: Suzuki K Poulose , Mike Leach , James Clark , Anshuman Khandual , Alexander Shishkin , Greg Kroah-Hartman Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1751025136; l=10063; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=5G8gBFpNW2vXqakN/LsRuIlJrPxA0zzJ+yjMlr07hNQ=; b=LwpiJg85OGtKQMjisBSSastPUjLhCOkrbieDqbQ85jXbThPksGe5F+s3kVb8wHsIC28nurf3j qEJgmtaUypUDUeNZh3xGzfhILhwhhAarIlTIPJ67rvRA3WlOjIHJsnH X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= The validation for driver data pointers and clock pointers are redundant in the runtime PM callbacks. After a driver's probing, its driver data and clocks have been initialized successfully, this ensures it is safe to access driver data and clocks in the runtime PM callbacks. A corner case is a clock pointer is NULL, in this case, the clock core layer can handle it properly. So remove these redundant checking. In runtime resume, respect values returned from clock function and add error handling. Reviewed-by: Anshuman Khandual Signed-off-by: Leo Yan Reviewed-by: Yeoreum Yun --- drivers/hwtracing/coresight/coresight-cpu-debug.c | 8 +++----- drivers/hwtracing/coresight/coresight-ctcu-core.c | 8 ++------ drivers/hwtracing/coresight/coresight-etb10.c | 8 ++------ drivers/hwtracing/coresight/coresight-etm3x-core.c | 8 ++------ drivers/hwtracing/coresight/coresight-funnel.c | 21 +++++++++++-------= --- drivers/hwtracing/coresight/coresight-replicator.c | 20 +++++++++++-------= -- drivers/hwtracing/coresight/coresight-stm.c | 20 +++++++++++-------= -- drivers/hwtracing/coresight/coresight-tpiu.c | 20 +++++++++++-------= -- 8 files changed, 53 insertions(+), 60 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-cpu-debug.c b/drivers/hw= tracing/coresight/coresight-cpu-debug.c index 3edfb5d3d02056afcaab4da575d1101c68aeac80..5f21366406aae03edef9e4fb737= e19941afb9ac2 100644 --- a/drivers/hwtracing/coresight/coresight-cpu-debug.c +++ b/drivers/hwtracing/coresight/coresight-cpu-debug.c @@ -731,8 +731,8 @@ static int debug_runtime_suspend(struct device *dev) { struct debug_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_disable_unprepare(drvdata->pclk); + clk_disable_unprepare(drvdata->pclk); + return 0; } =20 @@ -740,9 +740,7 @@ static int debug_runtime_resume(struct device *dev) { struct debug_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_prepare_enable(drvdata->pclk); - return 0; + return clk_prepare_enable(drvdata->pclk); } #endif =20 diff --git a/drivers/hwtracing/coresight/coresight-ctcu-core.c b/drivers/hw= tracing/coresight/coresight-ctcu-core.c index 75b5114ef652e4a47c53fbd2b7811c1bab575645..c586495e9a088a63cec481a82fd= 9f4ec7c645160 100644 --- a/drivers/hwtracing/coresight/coresight-ctcu-core.c +++ b/drivers/hwtracing/coresight/coresight-ctcu-core.c @@ -278,8 +278,7 @@ static int ctcu_runtime_suspend(struct device *dev) { struct ctcu_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->apb_clk)) - clk_disable_unprepare(drvdata->apb_clk); + clk_disable_unprepare(drvdata->apb_clk); =20 return 0; } @@ -288,10 +287,7 @@ static int ctcu_runtime_resume(struct device *dev) { struct ctcu_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->apb_clk)) - clk_prepare_enable(drvdata->apb_clk); - - return 0; + return clk_prepare_enable(drvdata->apb_clk); } #endif =20 diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtrac= ing/coresight/coresight-etb10.c index 8e81b41eb22264f17606050fa8da277aae05c5cc..35db1b6093d154d67dc567df42f= 838e2ba3d1d58 100644 --- a/drivers/hwtracing/coresight/coresight-etb10.c +++ b/drivers/hwtracing/coresight/coresight-etb10.c @@ -809,8 +809,7 @@ static int etb_runtime_suspend(struct device *dev) { struct etb_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_disable_unprepare(drvdata->atclk); + clk_disable_unprepare(drvdata->atclk); =20 return 0; } @@ -819,10 +818,7 @@ static int etb_runtime_resume(struct device *dev) { struct etb_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_prepare_enable(drvdata->atclk); - - return 0; + return clk_prepare_enable(drvdata->atclk); } #endif =20 diff --git a/drivers/hwtracing/coresight/coresight-etm3x-core.c b/drivers/h= wtracing/coresight/coresight-etm3x-core.c index baba2245b1dfb31f4bf19080e20c33df3a5b854f..45630a1cd32fbd05ec8b2a6979f= 0174cacce365e 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm3x-core.c @@ -925,8 +925,7 @@ static int etm_runtime_suspend(struct device *dev) { struct etm_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_disable_unprepare(drvdata->atclk); + clk_disable_unprepare(drvdata->atclk); =20 return 0; } @@ -935,10 +934,7 @@ static int etm_runtime_resume(struct device *dev) { struct etm_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_prepare_enable(drvdata->atclk); - - return 0; + return clk_prepare_enable(drvdata->atclk); } #endif =20 diff --git a/drivers/hwtracing/coresight/coresight-funnel.c b/drivers/hwtra= cing/coresight/coresight-funnel.c index 9dcfc5ce8845d9e01bb956dddab0d64de51ec397..3b248e54471a38f501777fe162f= ea850d1c851b3 100644 --- a/drivers/hwtracing/coresight/coresight-funnel.c +++ b/drivers/hwtracing/coresight/coresight-funnel.c @@ -284,11 +284,8 @@ static int funnel_runtime_suspend(struct device *dev) { struct funnel_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_disable_unprepare(drvdata->atclk); - - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_disable_unprepare(drvdata->pclk); + clk_disable_unprepare(drvdata->atclk); + clk_disable_unprepare(drvdata->pclk); =20 return 0; } @@ -296,13 +293,17 @@ static int funnel_runtime_suspend(struct device *dev) static int funnel_runtime_resume(struct device *dev) { struct funnel_drvdata *drvdata =3D dev_get_drvdata(dev); + int ret; + + ret =3D clk_prepare_enable(drvdata->pclk); + if (ret) + return ret; =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_prepare_enable(drvdata->pclk); + ret =3D clk_prepare_enable(drvdata->atclk); + if (ret) + clk_disable_unprepare(drvdata->pclk); =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_prepare_enable(drvdata->atclk); - return 0; + return ret; } #endif =20 diff --git a/drivers/hwtracing/coresight/coresight-replicator.c b/drivers/h= wtracing/coresight/coresight-replicator.c index e53095603b0c0419bc96a66b23d15bb54e75e634..e6472658235dc479cec91ac18f3= 737f76f8c74f0 100644 --- a/drivers/hwtracing/coresight/coresight-replicator.c +++ b/drivers/hwtracing/coresight/coresight-replicator.c @@ -323,24 +323,26 @@ static int replicator_runtime_suspend(struct device *= dev) { struct replicator_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_disable_unprepare(drvdata->atclk); + clk_disable_unprepare(drvdata->atclk); + clk_disable_unprepare(drvdata->pclk); =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_disable_unprepare(drvdata->pclk); return 0; } =20 static int replicator_runtime_resume(struct device *dev) { struct replicator_drvdata *drvdata =3D dev_get_drvdata(dev); + int ret; =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_prepare_enable(drvdata->pclk); + ret =3D clk_prepare_enable(drvdata->pclk); + if (ret) + return ret; =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_prepare_enable(drvdata->atclk); - return 0; + ret =3D clk_prepare_enable(drvdata->atclk); + if (ret) + clk_disable_unprepare(drvdata->pclk); + + return ret; } #endif =20 diff --git a/drivers/hwtracing/coresight/coresight-stm.c b/drivers/hwtracin= g/coresight/coresight-stm.c index ed68d8280b1945f38d1294a5b5f557a614c90c94..28230bbc9df2afec7b426e2fd4d= 4e4066f51e143 100644 --- a/drivers/hwtracing/coresight/coresight-stm.c +++ b/drivers/hwtracing/coresight/coresight-stm.c @@ -957,24 +957,26 @@ static int stm_runtime_suspend(struct device *dev) { struct stm_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_disable_unprepare(drvdata->atclk); + clk_disable_unprepare(drvdata->atclk); + clk_disable_unprepare(drvdata->pclk); =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_disable_unprepare(drvdata->pclk); return 0; } =20 static int stm_runtime_resume(struct device *dev) { struct stm_drvdata *drvdata =3D dev_get_drvdata(dev); + int ret; =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_prepare_enable(drvdata->pclk); + ret =3D clk_prepare_enable(drvdata->pclk); + if (ret) + return ret; =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_prepare_enable(drvdata->atclk); - return 0; + ret =3D clk_prepare_enable(drvdata->atclk); + if (ret) + clk_disable_unprepare(drvdata->pclk); + + return ret; } #endif =20 diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtraci= ng/coresight/coresight-tpiu.c index 1c5c2a82971490888c45508c68b516ab7dbf3eeb..9463afdbda8ad74eee78c72185f= e7603f81b7888 100644 --- a/drivers/hwtracing/coresight/coresight-tpiu.c +++ b/drivers/hwtracing/coresight/coresight-tpiu.c @@ -206,24 +206,26 @@ static int tpiu_runtime_suspend(struct device *dev) { struct tpiu_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_disable_unprepare(drvdata->atclk); + clk_disable_unprepare(drvdata->atclk); + clk_disable_unprepare(drvdata->pclk); =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_disable_unprepare(drvdata->pclk); return 0; } =20 static int tpiu_runtime_resume(struct device *dev) { struct tpiu_drvdata *drvdata =3D dev_get_drvdata(dev); + int ret; =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_prepare_enable(drvdata->pclk); + ret =3D clk_prepare_enable(drvdata->pclk); + if (ret) + return ret; =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_prepare_enable(drvdata->atclk); - return 0; + ret =3D clk_prepare_enable(drvdata->atclk); + if (ret) + clk_disable_unprepare(drvdata->pclk); + + return ret; } #endif =20 --=20 2.34.1