From nobody Wed Oct 8 16:38:08 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4375B2EA48F for ; Thu, 26 Jun 2025 16:49:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.19 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750956597; cv=none; b=IC0gr5VAwj/4tlfEMaQfU3nQs51JtcKihoncibGzJuhEVABRAw5+H6i0F+At2UCvesLwOmOs5aV0ygpJ2uLeGWvlOj7xqi47KTxXQsXBgcwcZumNQDVFH3CrCu9gOLa61rLh2+69tRjpsM+g9i4n6ukIrwOLgEfiEjaJR247CYs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750956597; c=relaxed/simple; bh=Zv1eHL7bD5PZfEzAa30P++8w0+X3h9FO+wtSQI3RpE4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ZRbBW08YRqLJ2XZSeYZ5QGd77jWeOKomOuj1dbbHbDEhItFJHzVaS8U26pT4aQZ78P9m3BdqDawfg37n2Adxj3SffbabLPYqNAB2SWAQIGdNWHSg06/ZSJR/eZTDpzF3x/rllv+b/+c7zwSvRKKL6pR7uGMDuWBXC6LdRjDAVbs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=niNqdodf; arc=none smtp.client-ip=198.175.65.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="niNqdodf" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1750956596; x=1782492596; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Zv1eHL7bD5PZfEzAa30P++8w0+X3h9FO+wtSQI3RpE4=; b=niNqdodfxcPJlKKea9LOLswS3h/Vr7BdJAg6bCbvZQkv8rC+yiUNHcDa xybZING+I/pcjVST/B9exSPuL7FJ8DgEZhGIQbmthBVlVRFJvf8kJW2Dk yGNYRgiPJTSeLLQbcBR8G9E3hYuldqCvv8/2wEFl/V+LKkLkMKSjp3Sol 2lSxWinYzooi6LJARlJ+XaqZx6/UE0XMGL9tYKH/xsfPdJ0tI6q9rBFrF MqT7xKHecUKVaZf3eelu71AGR3oUKfE8rIhSJxuHZuM6IW+1wiLzCIE0Y FC0Ix9f10UlOxt3PykEqx8Du7I4/BohPg3v8NB+4c9zdYsW5K06gougk6 A==; X-CSE-ConnectionGUID: fLoR6P7fRG6M1Dw9DYKK/A== X-CSE-MsgGUID: cVW7knxVRQWA04Sm+nzlQg== X-IronPort-AV: E=McAfee;i="6800,10657,11476"; a="53136355" X-IronPort-AV: E=Sophos;i="6.16,268,1744095600"; d="scan'208";a="53136355" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by orvoesa111.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Jun 2025 09:49:53 -0700 X-CSE-ConnectionGUID: SVCo2lWfQAaKIzc+qBRz+A== X-CSE-MsgGUID: YrHU+dhiRKeQ8jeCe9CP2g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.16,268,1744095600"; d="scan'208";a="153069177" Received: from agluck-desk3.sc.intel.com ([172.25.103.51]) by orviesa008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Jun 2025 09:49:52 -0700 From: Tony Luck To: Fenghua Yu , Reinette Chatre , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , Drew Fustini , Dave Martin , Anil Keshavamurthy , Chen Yu Cc: x86@kernel.org, linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v6 06/30] x86/resctrl: Move L3 initialization out of domain_add_cpu_mon() Date: Thu, 26 Jun 2025 09:49:15 -0700 Message-ID: <20250626164941.106341-7-tony.luck@intel.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250626164941.106341-1-tony.luck@intel.com> References: <20250626164941.106341-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" To prepare for additional types of monitoring domains, move all the L3 resource monitoring domain initialization out of domain_add_cpu_mon() and into a new helper function l3_mon_domain_setup() (name chosen as the partner of existing l3_mon_domain_free()). Signed-off-by: Tony Luck --- arch/x86/kernel/cpu/resctrl/core.c | 55 ++++++++++++++++++------------ 1 file changed, 33 insertions(+), 22 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resct= rl/core.c index 420e4eb7c160..20b6f2bbf858 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -496,34 +496,13 @@ static void domain_add_cpu_ctrl(int cpu, struct rdt_r= esource *r) } } =20 -static void domain_add_cpu_mon(int cpu, struct rdt_resource *r) +static void l3_mon_domain_setup(int cpu, int id, struct rdt_resource *r, s= truct list_head *add_pos) { - int id =3D get_domain_id_from_scope(cpu, r->mon_scope); - struct list_head *add_pos =3D NULL; struct rdt_hw_mon_domain *hw_dom; - struct rdt_domain_hdr *hdr; struct rdt_mon_domain *d; struct cacheinfo *ci; int err; =20 - lockdep_assert_held(&domain_list_lock); - - if (id < 0) { - pr_warn_once("Can't find monitor domain id for CPU:%d scope:%d for resou= rce %s\n", - cpu, r->mon_scope, r->name); - return; - } - - hdr =3D resctrl_find_domain(&r->mon_domains, id, &add_pos); - if (hdr) { - if (!domain_header_is_valid(hdr, RESCTRL_MON_DOMAIN, r->rid)) - return; - d =3D container_of(hdr, struct rdt_mon_domain, hdr); - - cpumask_set_cpu(cpu, &d->hdr.cpu_mask); - return; - } - hw_dom =3D kzalloc_node(sizeof(*hw_dom), GFP_KERNEL, cpu_to_node(cpu)); if (!hw_dom) return; @@ -558,6 +537,38 @@ static void domain_add_cpu_mon(int cpu, struct rdt_res= ource *r) } } =20 +static void domain_add_cpu_mon(int cpu, struct rdt_resource *r) +{ + int id =3D get_domain_id_from_scope(cpu, r->mon_scope); + struct list_head *add_pos =3D NULL; + struct rdt_domain_hdr *hdr; + + lockdep_assert_held(&domain_list_lock); + + if (id < 0) { + pr_warn_once("Can't find monitor domain id for CPU:%d scope:%d for resou= rce %s\n", + cpu, r->mon_scope, r->name); + return; + } + + hdr =3D resctrl_find_domain(&r->mon_domains, id, &add_pos); + if (hdr) { + if (!domain_header_is_valid(hdr, RESCTRL_MON_DOMAIN, r->rid)) + return; + cpumask_set_cpu(cpu, &hdr->cpu_mask); + + return; + } + + switch (r->rid) { + case RDT_RESOURCE_L3: + l3_mon_domain_setup(cpu, id, r, add_pos); + break; + default: + WARN_ON_ONCE(1); + } +} + static void domain_add_cpu(int cpu, struct rdt_resource *r) { if (r->alloc_capable) --=20 2.49.0