From nobody Wed Oct 8 19:25:21 2025 Received: from mailout4.samsung.com (mailout4.samsung.com [203.254.224.34]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 59492202C5D for ; Thu, 26 Jun 2025 02:37:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=203.254.224.34 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750905451; cv=none; b=QFAehLqkXap5EwjD5l+J5X525VsJkmllAvTpZDv75slKKAMnwHXnZGodACEAwiaap/5XTD90YyFpL//LJY9eCNJBEU3B6AMYq5Z8SP0A+qn3x3cxoL+zVS4wEVOJ862iwCmnXi8Zea+Fbv/ijBuv8mDyYTbCN77d77DxdK3YP04= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750905451; c=relaxed/simple; bh=4E/O2MffaVbZtLs8LTBh1jaRthJzsoiP+MZapckqc4Y=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:MIME-Version: Content-Type:References; b=Uyif421l8LQBozFGFGEEFpm2xnPvA6LiNZAdiOvqk/e/yYvUMqyvjOCISMJX2FBZN+OQs5nEEH3T6PtTjl0pX2xs/C/D7Px/NXGd012C51EBdG3tNBj1vQptghvkS1BBKmC7imsgfy4rnDomO17k80YGb7KvRVlGl7/sX8S6o60= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com; spf=pass smtp.mailfrom=samsung.com; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b=GKoFCgME; arc=none smtp.client-ip=203.254.224.34 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=samsung.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b="GKoFCgME" Received: from epcas5p4.samsung.com (unknown [182.195.41.42]) by mailout4.samsung.com (KnoxPortal) with ESMTP id 20250626023727epoutp0417a6b5ccc6e17f5e9ed25c8d053bc374~Mdzpgwkje2534825348epoutp04i for ; Thu, 26 Jun 2025 02:37:27 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout4.samsung.com 20250626023727epoutp0417a6b5ccc6e17f5e9ed25c8d053bc374~Mdzpgwkje2534825348epoutp04i DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1750905447; bh=oCjJPMBrsTZ0lEVw44tKYRd0FGCL7YY4EZJtpYnUOU8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GKoFCgMExCp/ExtL6ZnZ6QOuaMr0cMoKy0Dt/N29oM7zDG93zhnTcDf7cCaz15quv X1Vr30+qBqpmwqgpC48+ZGURg4F+3Knt0MUCgPr2GnCTj8+LXaMtVNNQ6y/hSQglEA QFZhsKPurwyxVdMcuMkoiEgTyRmBcgw1pkPJqZ5A= Received: from epsnrtp03.localdomain (unknown [182.195.42.155]) by epcas5p4.samsung.com (KnoxPortal) with ESMTPS id 20250626023726epcas5p4afb783bf2def49582295a91ff5c3983c~MdzozS-At0277702777epcas5p4R; Thu, 26 Jun 2025 02:37:26 +0000 (GMT) Received: from epcas5p1.samsung.com (unknown [182.195.38.183]) by epsnrtp03.localdomain (Postfix) with ESMTP id 4bSNBY0kQTz3hhT9; Thu, 26 Jun 2025 02:37:25 +0000 (GMT) Received: from epsmtip2.samsung.com (unknown [182.195.34.31]) by epcas5p3.samsung.com (KnoxPortal) with ESMTPA id 20250625165305epcas5p31ee49285a57e2fb88a005ec1dfed4199~MV1bs_I-z0056800568epcas5p3N; Wed, 25 Jun 2025 16:53:05 +0000 (GMT) Received: from cheetah.samsungds.net (unknown [107.109.115.53]) by epsmtip2.samsung.com (KnoxPortal) with ESMTPA id 20250625165303epsmtip25d7b64d4dc2f8317a860099aa1b13b66~MV1Y9u-jp1746917469epsmtip2O; Wed, 25 Jun 2025 16:53:02 +0000 (GMT) From: Shradha Todi To: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-fsd@tesla.com Cc: manivannan.sadhasivam@linaro.org, lpieralisi@kernel.org, kw@linux.com, robh@kernel.org, bhelgaas@google.com, jingoohan1@gmail.com, krzk+dt@kernel.org, conor+dt@kernel.org, alim.akhtar@samsung.com, vkoul@kernel.org, kishon@kernel.org, arnd@arndb.de, m.szyprowski@samsung.com, jh80.chung@samsung.com, pankaj.dubey@samsung.com, Shradha Todi Subject: [PATCH v2 04/10] PCI: exynos: Add platform device private data Date: Wed, 25 Jun 2025 22:22:23 +0530 Message-ID: <20250625165229.3458-5-shradha.t@samsung.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250625165229.3458-1-shradha.t@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250625165305epcas5p31ee49285a57e2fb88a005ec1dfed4199 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P cpgsPolicy: CPGSC10-541,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250625165305epcas5p31ee49285a57e2fb88a005ec1dfed4199 References: <20250625165229.3458-1-shradha.t@samsung.com> In order to extend this driver to all Samsung manufactured SoCs having DWC PCIe controller, add private data structure which will hold platform device specific information. It holds function ops like DWC host ops, DWC generic ops, and PCI read/write ops which will be used as driver data for different compatibles. Suggested-by: Pankaj Dubey Signed-off-by: Shradha Todi --- drivers/pci/controller/dwc/pci-exynos.c | 32 ++++++++++++++++++++----- 1 file changed, 26 insertions(+), 6 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-exynos.c b/drivers/pci/controll= er/dwc/pci-exynos.c index b4ec167b0583..c830b20d54f0 100644 --- a/drivers/pci/controller/dwc/pci-exynos.c +++ b/drivers/pci/controller/dwc/pci-exynos.c @@ -49,9 +49,16 @@ #define EXYNOS_PCIE_ELBI_SLV_ARMISC 0x120 #define EXYNOS_PCIE_ELBI_SLV_DBI_ENABLE BIT(21) =20 +struct samsung_pcie_pdata { + struct pci_ops *pci_ops; + const struct dw_pcie_ops *dwc_ops; + const struct dw_pcie_host_ops *host_ops; +}; + struct exynos_pcie { struct dw_pcie pci; void __iomem *elbi_base; + const struct samsung_pcie_pdata *pdata; struct clk_bulk_data *clks; struct phy *phy; struct regulator_bulk_data supplies[2]; @@ -220,7 +227,7 @@ static int exynos_pcie_host_init(struct dw_pcie_rp *pp) struct dw_pcie *pci =3D to_dw_pcie_from_pp(pp); struct exynos_pcie *ep =3D to_exynos_pcie(pci); =20 - pp->bridge->ops =3D &exynos_pci_ops; + pp->bridge->ops =3D ep->pdata->pci_ops; =20 exynos_pcie_assert_core_reset(ep); =20 @@ -268,7 +275,7 @@ static int exynos_add_pcie_port(struct exynos_pcie *ep, return 0; } =20 -static const struct dw_pcie_ops dw_pcie_ops =3D { +static const struct dw_pcie_ops exynos_dw_pcie_ops =3D { .read_dbi =3D exynos_pcie_read_dbi, .write_dbi =3D exynos_pcie_write_dbi, .link_up =3D exynos_pcie_link_up, @@ -279,6 +286,7 @@ static int exynos_pcie_probe(struct platform_device *pd= ev) { struct device *dev =3D &pdev->dev; struct exynos_pcie *ep; + const struct samsung_pcie_pdata *pdata; struct device_node *np =3D dev->of_node; int ret; =20 @@ -286,8 +294,11 @@ static int exynos_pcie_probe(struct platform_device *p= dev) if (!ep) return -ENOMEM; =20 + pdata =3D of_device_get_match_data(dev); + + ep->pdata =3D pdata; ep->pci.dev =3D dev; - ep->pci.ops =3D &dw_pcie_ops; + ep->pci.ops =3D pdata->dwc_ops; =20 ep->phy =3D devm_of_phy_get(dev, np, NULL); if (IS_ERR(ep->phy)) @@ -363,9 +374,9 @@ static int exynos_pcie_resume_noirq(struct device *dev) return ret; =20 /* exynos_pcie_host_init controls ep->phy */ - exynos_pcie_host_init(pp); + ep->pdata->host_ops->init(pp); dw_pcie_setup_rc(pp); - exynos_pcie_start_link(pci); + ep->pdata->dwc_ops->start_link(pci); return dw_pcie_wait_for_link(pci); } =20 @@ -374,8 +385,17 @@ static const struct dev_pm_ops exynos_pcie_pm_ops =3D { exynos_pcie_resume_noirq) }; =20 +static const struct samsung_pcie_pdata exynos_5433_pcie_rc_pdata =3D { + .dwc_ops =3D &exynos_dw_pcie_ops, + .pci_ops =3D &exynos_pci_ops, + .host_ops =3D &exynos_pcie_host_ops, +}; + static const struct of_device_id exynos_pcie_of_match[] =3D { - { .compatible =3D "samsung,exynos5433-pcie", }, + { + .compatible =3D "samsung,exynos5433-pcie", + .data =3D (void *) &exynos_5433_pcie_rc_pdata, + }, { }, }; =20 --=20 2.49.0