From nobody Wed Oct 8 20:55:24 2025 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4B5A12882CA; Wed, 25 Jun 2025 09:01:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750842075; cv=none; b=cD0YfHFJ6W72B6W9uXDxgEXRgnwnZ9fHn+usQuCFFzbjBlB47saiJSLoEGAaf40ji2gJlkbPn+6GW6lx59dNWWFC0aesf2amV8RV+/NNh7X6odPMWzrL1Tdf7AFK0S5D+Q5ejduPcU2eizPOlyKEETsLhmLrLjBeqAtrS9YjxJM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750842075; c=relaxed/simple; bh=Hdun12DdYTdPIZbnZ4Yn4Y16GPlB00xNhWWZLdSwj7U=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=kPNc56+d543QDZd3XJj1PWaK5QZxdBFlv8W4r8xXBzt8NUus1LxUzjIBimFERrwdVGYGIozjPYAxNDPqX6viMiqpBUXuktDxiDexg1gfycOOsbhKrJObiJf9bVxDt6U6NCOoo5aF/F6Oix75jXPFf49b7+Barnef41wEVms9CUg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=qualcomm.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=Eb2LOIra; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="Eb2LOIra" Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 55P5NtYW032017; Wed, 25 Jun 2025 09:01:02 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=ZLiDwEUBDmI Nu3QIbIzsmiMSL//kYBDCwn7Iema8vQg=; b=Eb2LOIraXTjIH9dWBYd7jo9c6x7 EiuIdID7hjO3Jy2guNqjQW1aPwYikxC3Gt0E4z3SM9h8zEFtJT+xlulrjXcJw8wQ Si/M1OiSb97m+4UGYs0Fqm2ctGZI9TuKhZhZxmu2pHwQMTgSH+Ns2tArbOEsTib8 KFM8xx6D6d3/S19XKGsWhiHK+izWrWhZqkABBbqz0012BhAI7m8ejPpiz+1lHo9k 0YfOXK+Oi6SZHTnrUVGZEyNDeU+HqwHFCydDvgWY55+ESvj9xrUwHWsVPDlgbe45 eDyzmdAta1CBOEf2b+nvMwaPm30FtKL+QSTCIVoxO5CAJ8LWSgQtq1wSIlQ== Received: from aptaippmta02.qualcomm.com (tpe-colo-wan-fw-bordernet.qualcomm.com [103.229.16.4]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 47esa4reha-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 25 Jun 2025 09:01:02 +0000 (GMT) Received: from pps.filterd (APTAIPPMTA02.qualcomm.com [127.0.0.1]) by APTAIPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTP id 55P910tN019619; Wed, 25 Jun 2025 09:01:00 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APTAIPPMTA02.qualcomm.com (PPS) with ESMTPS id 47dntmas9m-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 25 Jun 2025 09:01:00 +0000 Received: from APTAIPPMTA02.qualcomm.com (APTAIPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 55P90xk5019591; Wed, 25 Jun 2025 09:00:59 GMT Received: from cse-cd02-lnx.ap.qualcomm.com (cse-cd02-lnx.qualcomm.com [10.64.75.246]) by APTAIPPMTA02.qualcomm.com (PPS) with ESMTPS id 55P90xcH019583 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 25 Jun 2025 09:00:59 +0000 Received: by cse-cd02-lnx.ap.qualcomm.com (Postfix, from userid 4438065) id 1FE513861; Wed, 25 Jun 2025 17:00:58 +0800 (CST) From: Ziyue Zhang To: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, jingoohan1@gmail.com, mani@kernel.org, lpieralisi@kernel.org, kwilczynski@kernel.org, bhelgaas@google.com, johan+linaro@kernel.org, vkoul@kernel.org, kishon@kernel.org, neil.armstrong@linaro.org, abel.vesa@linaro.org, kw@linux.com Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-phy@lists.infradead.org, qiang.yu@oss.qualcomm.com, quic_krichai@quicinc.com, quic_vbadigan@quicinc.com, Ziyue Zhang Subject: [PATCH v3 3/4] arm64: dts: qcom: sa8775p: remove aux clock from pcie phy Date: Wed, 25 Jun 2025 17:00:47 +0800 Message-Id: <20250625090048.624399-4-quic_ziyuzhan@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250625090048.624399-1-quic_ziyuzhan@quicinc.com> References: <20250625090048.624399-1-quic_ziyuzhan@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Authority-Analysis: v=2.4 cv=eLYTjGp1 c=1 sm=1 tr=0 ts=685bbace cx=c_pps a=nuhDOHQX5FNHPW3J6Bj6AA==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=6IFa9wvqVegA:10 a=COk6AnOGAAAA:8 a=9zbhvFfKP0O2o0OFYOYA:9 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: DHgjNmR9fMGZTP_nSd-BC-VoYqRDDlzU X-Proofpoint-ORIG-GUID: DHgjNmR9fMGZTP_nSd-BC-VoYqRDDlzU X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNjI1MDA2NyBTYWx0ZWRfX5D57gvE6r2pe WqMIGFWcq2XrXFRbpw3zta5OkiDykGUaOnD0q2LD4bVJTUBFhzgkRLWvf5Oi0CjPtRNzVr6cZ5i 1UyL43ZQrNwAmppjKAZfXFjjs4HEqsfvlzSrPpgHBfhnEotHOvgGb38kOx6q43BUggWqSbjd+9f c4UMn+ORWEByeeTNwcNsgNupGm/GQqsl8xMfMlN+uAePvce4uB8Ai65DVvcZEKq7ixcFp/c8ydA mseiXupvuDOadbz2TeVmQm9vA+CWkSrwskr0qYhTx+DFNyfSpfZbQgvVeKHZ/vUJuleO5pMAyca nJSc55us9owuldI+Oc+sPtcjSiUsG9igIDWRqKZ6paE6xv0RfVtaB43D9racUp4yV2ALv2KZyf+ SAfx0/bmk2/izrAdB719Q36ZEtCwMllEqfxLr8yU4kQqRFugvIZ8R1qOnIHlCq1wAu/WqE9Y X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.7,FMLib:17.12.80.40 definitions=2025-06-25_02,2025-06-23_07,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 priorityscore=1501 mlxscore=0 clxscore=1015 mlxlogscore=999 suspectscore=0 bulkscore=0 impostorscore=0 lowpriorityscore=0 malwarescore=0 adultscore=0 spamscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2506250067 Content-Type: text/plain; charset="utf-8" gcc_aux_clk is used in PCIe RC and it is not required in pcie phy, in pcie phy it should be gcc_phy_aux_clk, so remove gcc_aux_clk and replace it with gcc_phy_aux_clk. Signed-off-by: Ziyue Zhang --- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 28 +++++++++++++++------------ 1 file changed, 16 insertions(+), 12 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qc= om/sa8775p.dtsi index fed34717460f..731bd80fc806 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -7707,16 +7707,18 @@ pcie0_phy: phy@1c04000 { compatible =3D "qcom,sa8775p-qmp-gen4x2-pcie-phy"; reg =3D <0x0 0x1c04000 0x0 0x2000>; =20 - clocks =3D <&gcc GCC_PCIE_0_AUX_CLK>, + clocks =3D <&gcc GCC_PCIE_0_PHY_AUX_CLK>, <&gcc GCC_PCIE_0_CFG_AHB_CLK>, <&gcc GCC_PCIE_CLKREF_EN>, <&gcc GCC_PCIE_0_PHY_RCHNG_CLK>, <&gcc GCC_PCIE_0_PIPE_CLK>, - <&gcc GCC_PCIE_0_PIPEDIV2_CLK>, - <&gcc GCC_PCIE_0_PHY_AUX_CLK>; - - clock-names =3D "aux", "cfg_ahb", "ref", "rchng", "pipe", - "pipediv2", "phy_aux"; + <&gcc GCC_PCIE_0_PIPEDIV2_CLK>; + clock-names =3D "aux", + "cfg_ahb", + "ref", + "rchng", + "pipe", + "pipediv2"; =20 assigned-clocks =3D <&gcc GCC_PCIE_0_PHY_RCHNG_CLK>; assigned-clock-rates =3D <100000000>; @@ -7873,16 +7875,18 @@ pcie1_phy: phy@1c14000 { compatible =3D "qcom,sa8775p-qmp-gen4x4-pcie-phy"; reg =3D <0x0 0x1c14000 0x0 0x4000>; =20 - clocks =3D <&gcc GCC_PCIE_1_AUX_CLK>, + clocks =3D <&gcc GCC_PCIE_1_PHY_AUX_CLK>, <&gcc GCC_PCIE_1_CFG_AHB_CLK>, <&gcc GCC_PCIE_CLKREF_EN>, <&gcc GCC_PCIE_1_PHY_RCHNG_CLK>, <&gcc GCC_PCIE_1_PIPE_CLK>, - <&gcc GCC_PCIE_1_PIPEDIV2_CLK>, - <&gcc GCC_PCIE_1_PHY_AUX_CLK>; - - clock-names =3D "aux", "cfg_ahb", "ref", "rchng", "pipe", - "pipediv2", "phy_aux"; + <&gcc GCC_PCIE_1_PIPEDIV2_CLK>; + clock-names =3D "aux", + "cfg_ahb", + "ref", + "rchng", + "pipe", + "pipediv2"; =20 assigned-clocks =3D <&gcc GCC_PCIE_1_PHY_RCHNG_CLK>; assigned-clock-rates =3D <100000000>; --=20 2.34.1