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Wed, 25 Jun 2025 06:39:46 +0000 (GMT) From: Andrew Donnellan To: linuxppc-dev@lists.ozlabs.org, pasha.tatashin@soleen.com, akpm@linux-foundation.org Cc: linux-kernel@vger.kernel.org, x86@kernel.org, linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, sweettea-kernel@dorminy.me, christophe.leroy@csgroup.eu, mingo@kernel.org Subject: [PATCH v15 13/13] powerpc: mm: Support page table check Date: Wed, 25 Jun 2025 16:37:53 +1000 Message-ID: <20250625063753.77511-14-ajd@linux.ibm.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250625063753.77511-1-ajd@linux.ibm.com> References: <20250625063753.77511-1-ajd@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNjI1MDA1MyBTYWx0ZWRfXziz8tLuz+0HD j2btD5W9BWfTk54yQsllWw00sjqmwRNCO+PBDovCxD+25nx6n+mn/oUAD02DTZSQ3iY2JEsyMYM y8jDyGPiXZqoch+DezWLUf+v7hZ4GCOWLO+1pzGdsFqVbPBsWnn0F7nxdA5Xz7KwIChLM/5gGuw /XF/v+fuTq77VPLztL/RkMl/7nJZzNTv0EYc2JlD/hCXtr05qhhICt+ldqLtMXTewVlSPWwLiJG o70E+D+ec+3FYNtPFMmBCEkWOBlJjFG03+33ZckaxExaf38TQwzYG/e6DzhrKTkNUIbFoYhz/ca 8RNeOMnY7LzedcHZCxngZiELjFwy9fm4jZzPXLw8TtY5wnUQ5c50NdPOaVPgRsKg23E8VEGkYiH LSYogWXGnGxEgy4JwPojmdRBPpf7C+ePhvv5dyF12XZVEdArhXHUz71bqjHZ8tx/JRIJRzlP X-Proofpoint-GUID: L2X7dRi2faP1Q6bNV9YOO_B6WzYeZIuH X-Proofpoint-ORIG-GUID: L2X7dRi2faP1Q6bNV9YOO_B6WzYeZIuH X-Authority-Analysis: v=2.4 cv=combk04i c=1 sm=1 tr=0 ts=685ba5fd cx=c_pps a=bLidbwmWQ0KltjZqbj+ezA==:117 a=bLidbwmWQ0KltjZqbj+ezA==:17 a=6IFa9wvqVegA:10 a=VnNF1IyMAAAA:8 a=1UX6Do5GAAAA:8 a=7ipKWUHlAAAA:8 a=X4bsUGyFbWMdYzZSxZoA:9 a=Et2XPkok5AAZYJIKzHr1:22 a=gpc5p9EgBqZVLdJeV_V1:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.7,FMLib:17.12.80.40 definitions=2025-06-25_01,2025-06-23_07,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 spamscore=0 adultscore=0 mlxlogscore=886 clxscore=1015 impostorscore=0 suspectscore=0 mlxscore=0 phishscore=0 lowpriorityscore=0 bulkscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2506250053 Content-Type: text/plain; charset="utf-8" From: Rohan McLure On creation and clearing of a page table mapping, instrument such calls by invoking page_table_check_pte_set and page_table_check_pte_clear respectively. These calls serve as a sanity check against illegal mappings. Enable ARCH_SUPPORTS_PAGE_TABLE_CHECK for all platforms. See also: riscv support in commit 3fee229a8eb9 ("riscv/mm: enable ARCH_SUPPORTS_PAGE_TABLE_CHECK") arm64 in commit 42b2547137f5 ("arm64/mm: enable ARCH_SUPPORTS_PAGE_TABLE_CHECK") x86_64 in commit d283d422c6c4 ("x86: mm: add x86_64 support for page table check") [ajd@linux.ibm.com: rebase] Reviewed-by: Christophe Leroy Signed-off-by: Rohan McLure Reviewed-by: Pasha Tatashin Signed-off-by: Andrew Donnellan --- arch/powerpc/Kconfig | 1 + arch/powerpc/include/asm/book3s/32/pgtable.h | 7 ++- arch/powerpc/include/asm/book3s/64/pgtable.h | 45 +++++++++++++++----- arch/powerpc/include/asm/nohash/pgtable.h | 8 +++- arch/powerpc/mm/book3s64/hash_pgtable.c | 4 ++ arch/powerpc/mm/book3s64/pgtable.c | 11 +++-- arch/powerpc/mm/book3s64/radix_pgtable.c | 3 ++ arch/powerpc/mm/pgtable.c | 4 ++ 8 files changed, 68 insertions(+), 15 deletions(-) diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index c3e0cc83f120..be07827325cc 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -173,6 +173,7 @@ config PPC select ARCH_STACKWALK select ARCH_SUPPORTS_ATOMIC_RMW select ARCH_SUPPORTS_DEBUG_PAGEALLOC if PPC_BOOK3S || PPC_8xx + select ARCH_SUPPORTS_PAGE_TABLE_CHECK select ARCH_USE_BUILTIN_BSWAP select ARCH_USE_CMPXCHG_LOCKREF if PPC64 select ARCH_USE_MEMTEST diff --git a/arch/powerpc/include/asm/book3s/32/pgtable.h b/arch/powerpc/in= clude/asm/book3s/32/pgtable.h index b225967f85ea..68864a71ca5f 100644 --- a/arch/powerpc/include/asm/book3s/32/pgtable.h +++ b/arch/powerpc/include/asm/book3s/32/pgtable.h @@ -202,6 +202,7 @@ void unmap_kernel_page(unsigned long va); #ifndef __ASSEMBLY__ #include #include +#include =20 /* Bits to mask out from a PGD to get to the PUD page */ #define PGD_MASKED_BITS 0 @@ -315,7 +316,11 @@ static inline int __ptep_test_and_clear_young(struct m= m_struct *mm, static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long= addr, pte_t *ptep) { - return __pte(pte_update(mm, addr, ptep, ~_PAGE_HASHPTE, 0, 0)); + pte_t old_pte =3D __pte(pte_update(mm, addr, ptep, ~_PAGE_HASHPTE, 0, 0)); + + page_table_check_pte_clear(mm, addr, old_pte); + + return old_pte; } =20 #define __HAVE_ARCH_PTEP_SET_WRPROTECT diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h b/arch/powerpc/in= clude/asm/book3s/64/pgtable.h index 5de04302c6f4..b244bb558331 100644 --- a/arch/powerpc/include/asm/book3s/64/pgtable.h +++ b/arch/powerpc/include/asm/book3s/64/pgtable.h @@ -145,6 +145,8 @@ #define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_ROX) =20 #ifndef __ASSEMBLY__ +#include + /* * page table defines */ @@ -417,8 +419,11 @@ static inline void huge_ptep_set_wrprotect(struct mm_s= truct *mm, static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) { - unsigned long old =3D pte_update(mm, addr, ptep, ~0UL, 0, 0); - return __pte(old); + pte_t old_pte =3D __pte(pte_update(mm, addr, ptep, ~0UL, 0, 0)); + + page_table_check_pte_clear(mm, addr, old_pte); + + return old_pte; } =20 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL @@ -427,11 +432,16 @@ static inline pte_t ptep_get_and_clear_full(struct mm= _struct *mm, pte_t *ptep, int full) { if (full && radix_enabled()) { + pte_t old_pte; + /* * We know that this is a full mm pte clear and * hence can be sure there is no parallel set_pte. */ - return radix__ptep_get_and_clear_full(mm, addr, ptep, full); + old_pte =3D radix__ptep_get_and_clear_full(mm, addr, ptep, full); + page_table_check_pte_clear(mm, addr, old_pte); + + return old_pte; } return ptep_get_and_clear(mm, addr, ptep); } @@ -1308,19 +1318,34 @@ extern int pudp_test_and_clear_young(struct vm_area= _struct *vma, static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr, pmd_t *pmdp) { - if (radix_enabled()) - return radix__pmdp_huge_get_and_clear(mm, addr, pmdp); - return hash__pmdp_huge_get_and_clear(mm, addr, pmdp); + pmd_t old_pmd; + + if (radix_enabled()) { + old_pmd =3D radix__pmdp_huge_get_and_clear(mm, addr, pmdp); + } else { + old_pmd =3D hash__pmdp_huge_get_and_clear(mm, addr, pmdp); + } + + page_table_check_pmd_clear(mm, addr, old_pmd); + + return old_pmd; } =20 #define __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr, pud_t *pudp) { - if (radix_enabled()) - return radix__pudp_huge_get_and_clear(mm, addr, pudp); - BUG(); - return *pudp; + pud_t old_pud; + + if (radix_enabled()) { + old_pud =3D radix__pudp_huge_get_and_clear(mm, addr, pudp); + } else { + BUG(); + } + + page_table_check_pud_clear(mm, addr, old_pud); + + return old_pud; } =20 static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma, diff --git a/arch/powerpc/include/asm/nohash/pgtable.h b/arch/powerpc/inclu= de/asm/nohash/pgtable.h index a8bc4f24beb1..3a6630dca615 100644 --- a/arch/powerpc/include/asm/nohash/pgtable.h +++ b/arch/powerpc/include/asm/nohash/pgtable.h @@ -29,6 +29,8 @@ static inline pte_basic_t pte_update(struct mm_struct *mm= , unsigned long addr, p =20 #ifndef __ASSEMBLY__ =20 +#include + extern int icache_44x_need_flush; =20 #ifndef pte_huge_size @@ -122,7 +124,11 @@ static inline void ptep_set_wrprotect(struct mm_struct= *mm, unsigned long addr, static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long= addr, pte_t *ptep) { - return __pte(pte_update(mm, addr, ptep, ~0UL, 0, 0)); + pte_t old_pte =3D __pte(pte_update(mm, addr, ptep, ~0UL, 0, 0)); + + page_table_check_pte_clear(mm, addr, old_pte); + + return old_pte; } #define __HAVE_ARCH_PTEP_GET_AND_CLEAR =20 diff --git a/arch/powerpc/mm/book3s64/hash_pgtable.c b/arch/powerpc/mm/book= 3s64/hash_pgtable.c index 988948d69bc1..c1c25d46dd16 100644 --- a/arch/powerpc/mm/book3s64/hash_pgtable.c +++ b/arch/powerpc/mm/book3s64/hash_pgtable.c @@ -8,6 +8,7 @@ #include #include #include +#include #include =20 #include @@ -231,6 +232,9 @@ pmd_t hash__pmdp_collapse_flush(struct vm_area_struct *= vma, unsigned long addres =20 pmd =3D *pmdp; pmd_clear(pmdp); + + page_table_check_pmd_clear(vma->vm_mm, address, pmd); + /* * Wait for all pending hash_page to finish. This is needed * in case of subpage collapse. When we collapse normal pages diff --git a/arch/powerpc/mm/book3s64/pgtable.c b/arch/powerpc/mm/book3s64/= pgtable.c index 1468a815fa5e..73924e248087 100644 --- a/arch/powerpc/mm/book3s64/pgtable.c +++ b/arch/powerpc/mm/book3s64/pgtable.c @@ -10,6 +10,7 @@ #include #include #include +#include =20 #include #include @@ -128,6 +129,7 @@ void set_pmd_at(struct mm_struct *mm, unsigned long add= r, WARN_ON(!(pmd_leaf(pmd))); #endif trace_hugepage_set_pmd(addr, pmd_val(pmd)); + page_table_check_pmd_set(mm, addr, pmdp, pmd); return set_pte_at_unchecked(mm, addr, pmdp_ptep(pmdp), pmd_pte(pmd)); } =20 @@ -145,6 +147,7 @@ void set_pud_at(struct mm_struct *mm, unsigned long add= r, WARN_ON(!(pud_leaf(pud))); #endif trace_hugepage_set_pud(addr, pud_val(pud)); + page_table_check_pud_set(mm, addr, pudp, pud); return set_pte_at_unchecked(mm, addr, pudp_ptep(pudp), pud_pte(pud)); } =20 @@ -180,12 +183,14 @@ void serialize_against_pte_lookup(struct mm_struct *m= m) pmd_t pmdp_invalidate(struct vm_area_struct *vma, unsigned long address, pmd_t *pmdp) { - unsigned long old_pmd; + pmd_t old_pmd; =20 VM_WARN_ON_ONCE(!pmd_present(*pmdp)); - old_pmd =3D pmd_hugepage_update(vma->vm_mm, address, pmdp, _PAGE_PRESENT,= _PAGE_INVALID); + old_pmd =3D __pmd(pmd_hugepage_update(vma->vm_mm, address, pmdp, _PAGE_PR= ESENT, _PAGE_INVALID)); flush_pmd_tlb_range(vma, address, address + HPAGE_PMD_SIZE); - return __pmd(old_pmd); + page_table_check_pmd_clear(vma->vm_mm, address, old_pmd); + + return old_pmd; } =20 pud_t pudp_invalidate(struct vm_area_struct *vma, unsigned long address, diff --git a/arch/powerpc/mm/book3s64/radix_pgtable.c b/arch/powerpc/mm/boo= k3s64/radix_pgtable.c index 2a52089018a5..b0ad2afc0be0 100644 --- a/arch/powerpc/mm/book3s64/radix_pgtable.c +++ b/arch/powerpc/mm/book3s64/radix_pgtable.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -1468,6 +1469,8 @@ pmd_t radix__pmdp_collapse_flush(struct vm_area_struc= t *vma, unsigned long addre pmd =3D *pmdp; pmd_clear(pmdp); =20 + page_table_check_pmd_clear(vma->vm_mm, address, pmd); + radix__flush_tlb_collapsed_pmd(vma->vm_mm, address); =20 return pmd; diff --git a/arch/powerpc/mm/pgtable.c b/arch/powerpc/mm/pgtable.c index 4cc9af7961ca..ed46151ae1d9 100644 --- a/arch/powerpc/mm/pgtable.c +++ b/arch/powerpc/mm/pgtable.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -206,6 +207,9 @@ void set_ptes(struct mm_struct *mm, unsigned long addr,= pte_t *ptep, * and not hw_valid ptes. Hence there is no translation cache flush * involved that need to be batched. */ + + page_table_check_ptes_set(mm, addr, ptep, pte, nr); + for (;;) { =20 /* --=20 2.49.0