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Signed-off-by: Taniya Das --- arch/arm64/boot/dts/qcom/qcs615.dtsi | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qco= m/qcs615.dtsi index 5adf409d7ce7226042c759cc83ceca331097ae37..d06fc1c157454f635389ff0645f= cf4b378270dbc 100644 --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi @@ -36,6 +36,8 @@ cpu0: cpu@0 { capacity-dmips-mhz =3D <1024>; dynamic-power-coefficient =3D <100>; next-level-cache =3D <&l2_0>; + clocks =3D <&cpufreq_hw 0>; + qcom,freq-domain =3D <&cpufreq_hw 0>; #cooling-cells =3D <2>; =20 l2_0: l2-cache { @@ -56,6 +58,8 @@ cpu1: cpu@100 { capacity-dmips-mhz =3D <1024>; dynamic-power-coefficient =3D <100>; next-level-cache =3D <&l2_100>; + clocks =3D <&cpufreq_hw 0>; + qcom,freq-domain =3D <&cpufreq_hw 0>; =20 l2_100: l2-cache { compatible =3D "cache"; @@ -75,6 +79,8 @@ cpu2: cpu@200 { capacity-dmips-mhz =3D <1024>; dynamic-power-coefficient =3D <100>; next-level-cache =3D <&l2_200>; + clocks =3D <&cpufreq_hw 0>; + qcom,freq-domain =3D <&cpufreq_hw 0>; =20 l2_200: l2-cache { compatible =3D "cache"; @@ -94,6 +100,8 @@ cpu3: cpu@300 { capacity-dmips-mhz =3D <1024>; dynamic-power-coefficient =3D <100>; next-level-cache =3D <&l2_300>; + clocks =3D <&cpufreq_hw 0>; + qcom,freq-domain =3D <&cpufreq_hw 0>; =20 l2_300: l2-cache { compatible =3D "cache"; @@ -113,6 +121,8 @@ cpu4: cpu@400 { capacity-dmips-mhz =3D <1024>; dynamic-power-coefficient =3D <100>; next-level-cache =3D <&l2_400>; + clocks =3D <&cpufreq_hw 0>; + qcom,freq-domain =3D <&cpufreq_hw 0>; =20 l2_400: l2-cache { compatible =3D "cache"; @@ -132,6 +142,8 @@ cpu5: cpu@500 { capacity-dmips-mhz =3D <1024>; dynamic-power-coefficient =3D <100>; next-level-cache =3D <&l2_500>; + clocks =3D <&cpufreq_hw 0>; + qcom,freq-domain =3D <&cpufreq_hw 0>; =20 l2_500: l2-cache { compatible =3D "cache"; @@ -151,6 +163,8 @@ cpu6: cpu@600 { capacity-dmips-mhz =3D <1740>; dynamic-power-coefficient =3D <404>; next-level-cache =3D <&l2_600>; + clocks =3D <&cpufreq_hw 1>; + qcom,freq-domain =3D <&cpufreq_hw 1>; #cooling-cells =3D <2>; =20 l2_600: l2-cache { @@ -171,6 +185,8 @@ cpu7: cpu@700 { capacity-dmips-mhz =3D <1740>; dynamic-power-coefficient =3D <404>; next-level-cache =3D <&l2_700>; + clocks =3D <&cpufreq_hw 1>; + qcom,freq-domain =3D <&cpufreq_hw 1>; =20 l2_700: l2-cache { compatible =3D "cache"; @@ -3891,6 +3907,19 @@ glink_edge: glink-edge { qcom,remote-pid =3D <2>; }; }; + + cpufreq_hw: cpufreq@18323000 { + compatible =3D "qcom,sc7180-cpufreq-hw", "qcom,cpufreq-hw"; + reg =3D <0 0x18323000 0 0x1400>, <0 0x18325800 0 0x1400>; + reg-names =3D "freq-domain0", "freq-domain1"; + + clocks =3D <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; + clock-names =3D "xo", "alternate"; + + #freq-domain-cells =3D <1>; + #clock-cells =3D <1>; + }; + }; =20 arch_timer: timer { --=20 2.34.1