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X-CSE-ConnectionGUID: AhZgIOJERfil50n8LIfntw== X-CSE-MsgGUID: j+snhcXoROCfPAjH4NpPVQ== X-IronPort-AV: E=Sophos;i="6.16,263,1744095600"; d="scan'208";a="42713915" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 24 Jun 2025 21:56:38 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.44; Tue, 24 Jun 2025 21:56:37 -0700 Received: from [127.0.0.1] (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.44 via Frontend Transport; Tue, 24 Jun 2025 21:56:32 -0700 From: Dharma Balasubiramani Date: Wed, 25 Jun 2025 10:26:11 +0530 Subject: [PATCH v5 3/4] drm/bridge: microchip-lvds: add atomic pre_enable() and post_disable() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20250625-microchip-lvds-v5-3-624cf72b2651@microchip.com> References: <20250625-microchip-lvds-v5-0-624cf72b2651@microchip.com> In-Reply-To: <20250625-microchip-lvds-v5-0-624cf72b2651@microchip.com> To: Manikandan Muralidharan , Andrzej Hajda , Neil Armstrong , "Robert Foss" , Laurent Pinchart , Jonas Karlman , "Jernej Skrabec" , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter CC: , , "Dharma Balasubiramani" X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1750827371; l=2425; i=dharma.b@microchip.com; s=20240209; h=from:subject:message-id; bh=QE4zUYyP981F+5VE7+ZTFWVBH1tBQt/2P/4OLcHIcbw=; b=sQHGhpQdgAwF6+teRgSAuveZIlU9LLriIJHN6qLdE5xtUivcSM7MUiBjbL7qP4b03sWHlXvuP rZ8nQFzp4m2C4dfmzTTjezKPhGyZ8Ye+kkuTnDm6CSiMAwwPFJrOcke X-Developer-Key: i=dharma.b@microchip.com; a=ed25519; pk=kCq31LcpLAe9HDfIz9ZJ1U7T+osjOi7OZSbe0gqtyQ4= pm_runtime_get_sync() and clk_prepare_enable() must be outside the atomic context, hence move the sleepable operations accordingly. - atomic_pre_enable() handles pm_runtime and clock preparation - atomic_enable() enables the serializer based on panel format - atomic_disable() turns off the serializer - atomic_post_disable() disables clock and releases runtime PM Signed-off-by: Dharma Balasubiramani --- drivers/gpu/drm/bridge/microchip-lvds.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/bridge/microchip-lvds.c b/drivers/gpu/drm/brid= ge/microchip-lvds.c index c40c8717f026..b1800f78008c 100644 --- a/drivers/gpu/drm/bridge/microchip-lvds.c +++ b/drivers/gpu/drm/bridge/microchip-lvds.c @@ -111,8 +111,8 @@ static int mchp_lvds_attach(struct drm_bridge *bridge, bridge, flags); } =20 -static void mchp_lvds_atomic_enable(struct drm_bridge *bridge, - struct drm_atomic_state *state) +static void mchp_lvds_atomic_pre_enable(struct drm_bridge *bridge, + struct drm_atomic_state *state) { struct mchp_lvds *lvds =3D bridge_to_lvds(bridge); int ret; @@ -128,7 +128,12 @@ static void mchp_lvds_atomic_enable(struct drm_bridge = *bridge, dev_err(lvds->dev, "failed to get pm runtime: %d\n", ret); return; } +} =20 +static void mchp_lvds_atomic_enable(struct drm_bridge *bridge, + struct drm_atomic_state *state) +{ + struct mchp_lvds *lvds =3D bridge_to_lvds(bridge); lvds_serialiser_on(lvds); } =20 @@ -139,6 +144,12 @@ static void mchp_lvds_atomic_disable(struct drm_bridge= *bridge, =20 /* Turn off the serialiser */ lvds_writel(lvds, LVDSC_CR, 0); +} + +static void mchp_lvds_atomic_post_disable(struct drm_bridge *bridge, + struct drm_atomic_state *state) +{ + struct mchp_lvds *lvds =3D bridge_to_lvds(bridge); =20 pm_runtime_put(lvds->dev); clk_disable_unprepare(lvds->pclk); @@ -146,8 +157,10 @@ static void mchp_lvds_atomic_disable(struct drm_bridge= *bridge, =20 static const struct drm_bridge_funcs mchp_lvds_bridge_funcs =3D { .attach =3D mchp_lvds_attach, + .atomic_pre_enable =3D mchp_lvds_atomic_pre_enable, .atomic_enable =3D mchp_lvds_atomic_enable, .atomic_disable =3D mchp_lvds_atomic_disable, + .atomic_post_disable =3D mchp_lvds_atomic_post_disable, }; =20 static int mchp_lvds_probe(struct platform_device *pdev) --=20 2.43.0