From nobody Wed Oct 8 21:36:50 2025 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E8A1922D78A for ; Tue, 24 Jun 2025 09:24:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750757096; cv=none; b=moiFyhhOo6glmMkD8/7Y2S23rYW9N7CzCt13O3e4IvvyGAx2KZ9dtx5bOGmP2VSahtZ0HEVfWW8tnK7NmjD83NR1YLFrC8EFUdUL7vHqa+qDpTe66z2KzdfylFXXQHnnTXBldiV/EkGnvnphFTJ0TZGyo4vQ05zBxCbZVafvmUo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750757096; c=relaxed/simple; bh=7gZBvYYRlxzSRc55o32/rEUnTQMYgXtfaWD8NxSkwHE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=i9NNhJcOFYiphwxUdubB003A+Yxf0dgP3U7hrTBunNuqSMjc0APowiaC2ea0TrvyuqAmEY6p3Ii+njBO6mzRnhDISpG1S5Xah9XvwAOexPB7ImT7FkDHVKhtQPySc2B5ZqmLhhhOWg3HZVHqaXaRwR7ERS8oMh1brI9Oykd91yI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=HMaUoRvD; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="HMaUoRvD" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1750757094; x=1782293094; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=7gZBvYYRlxzSRc55o32/rEUnTQMYgXtfaWD8NxSkwHE=; b=HMaUoRvDBuZZ5EkIKifpEJDoHJkL7HFULNzU0r6wZ/ag5jsS9WuKupeR fECjmRanJOBC/g/TzJloFrLc2sTdoA1sWQH8nA2vO1obsjbnyFv6IUFTn JHBp9p+lIHo616loE5eVcBhgNAK00BtP6tO0qkfOM7E/pVIARq7gc82Ek A0ORwy3hcZS2dosSo6QKWTFaTHsfJAYDfJkKY9DUnEzlen0HH2hcXxFDA ZxyOIwulT7dXbGjCsAFwMzXIdq+VvK2zW4Z1hocSpwcFcjKQzUpjrVwIF z/bqTghBi7z6hHuCRRakIqrpSwp4jG2TkCQEl0ww73icoSkgnxLFHkc5f Q==; X-CSE-ConnectionGUID: kAMBk0q5SXCuhoUD0ewa8g== X-CSE-MsgGUID: Mj7RMdJNSLifHtOGFeQWnQ== X-IronPort-AV: E=Sophos;i="6.16,261,1744095600"; d="scan'208";a="42674600" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 24 Jun 2025 02:24:53 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.44; Tue, 24 Jun 2025 02:24:29 -0700 Received: from [127.0.0.1] (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.44 via Frontend Transport; Tue, 24 Jun 2025 02:24:23 -0700 From: Dharma Balasubiramani Date: Tue, 24 Jun 2025 14:54:14 +0530 Subject: [PATCH v4 1/3] drm/bridge: microchip-lvds: drop unused drm_panel Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20250624-microchip-lvds-v4-1-937d42a420e9@microchip.com> References: <20250624-microchip-lvds-v4-0-937d42a420e9@microchip.com> In-Reply-To: <20250624-microchip-lvds-v4-0-937d42a420e9@microchip.com> To: Manikandan Muralidharan , Andrzej Hajda , Neil Armstrong , "Robert Foss" , Laurent Pinchart , Jonas Karlman , "Jernej Skrabec" , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter CC: , , "Dharma Balasubiramani" X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1750757054; l=1327; i=dharma.b@microchip.com; s=20240209; h=from:subject:message-id; bh=7gZBvYYRlxzSRc55o32/rEUnTQMYgXtfaWD8NxSkwHE=; b=pP/KBQEgvhoGIWTSENdNu1+s9SK7oVhKMbWoKEl68GUKYKy9UlSKnn2vNY9N2zxLWBoJZ7YcF mzHnGVSjV1dDQsBMKo8f5FXbmPJy5vrmZzr7Ul99GVYOgtrZjWf6f+B X-Developer-Key: i=dharma.b@microchip.com; a=ed25519; pk=kCq31LcpLAe9HDfIz9ZJ1U7T+osjOi7OZSbe0gqtyQ4= Drop the drm_panel field of the mchp_lvds struct as it is unused. Signed-off-by: Dharma Balasubiramani --- drivers/gpu/drm/bridge/microchip-lvds.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/drivers/gpu/drm/bridge/microchip-lvds.c b/drivers/gpu/drm/brid= ge/microchip-lvds.c index 9f4ff82bc6b4..42751124b868 100644 --- a/drivers/gpu/drm/bridge/microchip-lvds.c +++ b/drivers/gpu/drm/bridge/microchip-lvds.c @@ -23,7 +23,6 @@ #include #include #include -#include #include #include #include @@ -56,7 +55,6 @@ struct mchp_lvds { struct device *dev; void __iomem *regs; struct clk *pclk; - struct drm_panel *panel; struct drm_bridge bridge; struct drm_bridge *panel_bridge; }; @@ -179,13 +177,8 @@ static int mchp_lvds_probe(struct platform_device *pde= v) "can't find port point, please init lvds panel port!\n"); return -ENODEV; } - - lvds->panel =3D of_drm_find_panel(port); of_node_put(port); =20 - if (IS_ERR(lvds->panel)) - return -EPROBE_DEFER; - lvds->panel_bridge =3D devm_drm_of_get_bridge(dev, dev->of_node, 1, 0); =20 if (IS_ERR(lvds->panel_bridge)) --=20 2.43.0 From nobody Wed Oct 8 21:36:50 2025 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 26E7122D78A for ; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20250624-microchip-lvds-v4-2-937d42a420e9@microchip.com> References: <20250624-microchip-lvds-v4-0-937d42a420e9@microchip.com> In-Reply-To: <20250624-microchip-lvds-v4-0-937d42a420e9@microchip.com> To: Manikandan Muralidharan , Andrzej Hajda , Neil Armstrong , "Robert Foss" , Laurent Pinchart , Jonas Karlman , "Jernej Skrabec" , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter CC: , , "Dharma Balasubiramani" X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1750757054; l=2189; i=dharma.b@microchip.com; s=20240209; h=from:subject:message-id; bh=Ein54qI7rmxnJ9OTf6MtXF+MZAoUwZCXJsSkm5CT8gQ=; b=92vmKg7GGXHMY1DbRPHHVGB6YwkchhJrwJe06eHgs5CaoCCeqg9/Lyawg2IVE81Meq7Uhcc6J ba97tJnmur+CHDYuxZqQyDsTDqnFI9Uf4GrTjtt9rPkvpDWhB006h2U X-Developer-Key: i=dharma.b@microchip.com; a=ed25519; pk=kCq31LcpLAe9HDfIz9ZJ1U7T+osjOi7OZSbe0gqtyQ4= Modernize the bridge ops to use atomic_enable/disable. Signed-off-by: Dharma Balasubiramani --- drivers/gpu/drm/bridge/microchip-lvds.c | 26 ++++++++++++++++++++++---- 1 file changed, 22 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/bridge/microchip-lvds.c b/drivers/gpu/drm/brid= ge/microchip-lvds.c index 42751124b868..e4ff46b03d54 100644 --- a/drivers/gpu/drm/bridge/microchip-lvds.c +++ b/drivers/gpu/drm/bridge/microchip-lvds.c @@ -111,7 +111,8 @@ static int mchp_lvds_attach(struct drm_bridge *bridge, bridge, flags); } =20 -static void mchp_lvds_enable(struct drm_bridge *bridge) +static void mchp_lvds_atomic_pre_enable(struct drm_bridge *bridge, + struct drm_atomic_state *state) { struct mchp_lvds *lvds =3D bridge_to_lvds(bridge); int ret; @@ -127,11 +128,26 @@ static void mchp_lvds_enable(struct drm_bridge *bridg= e) dev_err(lvds->dev, "failed to get pm runtime: %d\n", ret); return; } +} =20 +static void mchp_lvds_atomic_enable(struct drm_bridge *bridge, + struct drm_atomic_state *state) +{ + struct mchp_lvds *lvds =3D bridge_to_lvds(bridge); lvds_serialiser_on(lvds); } =20 -static void mchp_lvds_disable(struct drm_bridge *bridge) +static void mchp_lvds_atomic_disable(struct drm_bridge *bridge, + struct drm_atomic_state *state) +{ + struct mchp_lvds *lvds =3D bridge_to_lvds(bridge); + + /* Turn off the serialiser */ + lvds_writel(lvds, LVDSC_CR, 0); +} + +static void mchp_lvds_atomic_post_disable(struct drm_bridge *bridge, + struct drm_atomic_state *state) { struct mchp_lvds *lvds =3D bridge_to_lvds(bridge); =20 @@ -141,8 +157,10 @@ static void mchp_lvds_disable(struct drm_bridge *bridg= e) =20 static const struct drm_bridge_funcs mchp_lvds_bridge_funcs =3D { .attach =3D mchp_lvds_attach, - .enable =3D mchp_lvds_enable, - .disable =3D mchp_lvds_disable, + .atomic_pre_enable =3D mchp_lvds_atomic_pre_enable, + .atomic_enable =3D mchp_lvds_atomic_enable, + .atomic_disable =3D mchp_lvds_atomic_disable, + .atomic_post_disable =3D mchp_lvds_atomic_post_disable, }; =20 static int mchp_lvds_probe(struct platform_device *pdev) --=20 2.43.0 From nobody Wed Oct 8 21:36:50 2025 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3F954271440 for ; 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X-CSE-ConnectionGUID: kAMBk0q5SXCuhoUD0ewa8g== X-CSE-MsgGUID: RTHlKML7TziMPnVq5VuWLg== X-IronPort-AV: E=Sophos;i="6.16,261,1744095600"; d="scan'208";a="42674601" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 24 Jun 2025 02:24:54 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.44; Tue, 24 Jun 2025 02:24:41 -0700 Received: from [127.0.0.1] (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.44 via Frontend Transport; Tue, 24 Jun 2025 02:24:35 -0700 From: Dharma Balasubiramani Date: Tue, 24 Jun 2025 14:54:16 +0530 Subject: [PATCH v4 3/3] drm/bridge: microchip-lvds: fix bus format mismatch with VESA displays Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20250624-microchip-lvds-v4-3-937d42a420e9@microchip.com> References: <20250624-microchip-lvds-v4-0-937d42a420e9@microchip.com> In-Reply-To: <20250624-microchip-lvds-v4-0-937d42a420e9@microchip.com> To: Manikandan Muralidharan , Andrzej Hajda , Neil Armstrong , "Robert Foss" , Laurent Pinchart , Jonas Karlman , "Jernej Skrabec" , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter CC: , , "Dharma Balasubiramani" , Sandeep Sheriker M X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1750757054; l=3511; i=dharma.b@microchip.com; s=20240209; h=from:subject:message-id; bh=d8blF+pwGOzvN5a5pRJDPvXOWg+al/nOtmjJMwPEerE=; b=Dx906w6ttNzYlzdGDxTMFtBAZo1nTR9KV989/dvE4oUmqvjsQdiIgK0o6pvINvIM0VgcCa8KA F8VtroDvcHbAlQXhLTyTPdbTINU/EvMnvUerHvC6/tCJxljj6xCQURw X-Developer-Key: i=dharma.b@microchip.com; a=ed25519; pk=kCq31LcpLAe9HDfIz9ZJ1U7T+osjOi7OZSbe0gqtyQ4= The LVDS controller was hardcoded to JEIDA mapping, which leads to distorted output on panels expecting VESA mapping. Update the driver to dynamically select the appropriate mapping and pixel size based on the panel's advertised media bus format. This ensures compatibility with both JEIDA and VESA displays. Signed-off-by: Sandeep Sheriker M Signed-off-by: Dharma Balasubiramani --- drivers/gpu/drm/bridge/microchip-lvds.c | 38 +++++++++++++++++++++++++++--= ---- 1 file changed, 32 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/bridge/microchip-lvds.c b/drivers/gpu/drm/brid= ge/microchip-lvds.c index e4ff46b03d54..ce52b794a9c6 100644 --- a/drivers/gpu/drm/bridge/microchip-lvds.c +++ b/drivers/gpu/drm/bridge/microchip-lvds.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -40,9 +41,11 @@ =20 /* Bitfields in LVDSC_CFGR (Configuration Register) */ #define LVDSC_CFGR_PIXSIZE_24BITS 0 +#define LVDSC_CFGR_PIXSIZE_18BITS BIT(0) #define LVDSC_CFGR_DEN_POL_HIGH 0 #define LVDSC_CFGR_DC_UNBALANCED 0 #define LVDSC_CFGR_MAPPING_JEIDA BIT(6) +#define LVDSC_CFGR_MAPPING_VESA 0 =20 /*Bitfields in LVDSC_SR */ #define LVDSC_SR_CS BIT(0) @@ -74,9 +77,10 @@ static inline void lvds_writel(struct mchp_lvds *lvds, u= 32 offset, u32 val) writel_relaxed(val, lvds->regs + offset); } =20 -static void lvds_serialiser_on(struct mchp_lvds *lvds) +static void lvds_serialiser_on(struct mchp_lvds *lvds, u32 bus_format) { unsigned long timeout =3D jiffies + msecs_to_jiffies(LVDS_POLL_TIMEOUT_MS= ); + u8 map, pix_size; =20 /* The LVDSC registers can only be written if WPEN is cleared */ lvds_writel(lvds, LVDSC_WPMR, (LVDSC_WPMR_WPKEY_PSSWD & @@ -91,11 +95,24 @@ static void lvds_serialiser_on(struct mchp_lvds *lvds) usleep_range(1000, 2000); } =20 + switch (bus_format) { + case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG: + map =3D LVDSC_CFGR_MAPPING_JEIDA; + pix_size =3D LVDSC_CFGR_PIXSIZE_18BITS; + break; + case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG: + map =3D LVDSC_CFGR_MAPPING_VESA; + pix_size =3D LVDSC_CFGR_PIXSIZE_24BITS; + break; + default: + map =3D LVDSC_CFGR_MAPPING_JEIDA; + pix_size =3D LVDSC_CFGR_PIXSIZE_24BITS; + break; + } + /* Configure the LVDSC */ - lvds_writel(lvds, LVDSC_CFGR, (LVDSC_CFGR_MAPPING_JEIDA | - LVDSC_CFGR_DC_UNBALANCED | - LVDSC_CFGR_DEN_POL_HIGH | - LVDSC_CFGR_PIXSIZE_24BITS)); + lvds_writel(lvds, LVDSC_CFGR, map | LVDSC_CFGR_DC_UNBALANCED | + LVDSC_CFGR_DEN_POL_HIGH | pix_size); =20 /* Enable the LVDS serializer */ lvds_writel(lvds, LVDSC_CR, LVDSC_CR_SER_EN); @@ -134,7 +151,16 @@ static void mchp_lvds_atomic_enable(struct drm_bridge = *bridge, struct drm_atomic_state *state) { struct mchp_lvds *lvds =3D bridge_to_lvds(bridge); - lvds_serialiser_on(lvds); + struct drm_connector *connector; + + /* default to jeida-24 */ + u32 bus_format =3D MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA; + + connector =3D drm_atomic_get_new_connector_for_encoder(state, bridge->enc= oder); + if (connector && connector->display_info.num_bus_formats) + bus_format =3D connector->display_info.bus_formats[0]; + + lvds_serialiser_on(lvds, bus_format); } =20 static void mchp_lvds_atomic_disable(struct drm_bridge *bridge, --=20 2.43.0