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Mon, 23 Jun 2025 12:26:06 -0700 (PDT) From: Markus Schneider-Pargmann Date: Mon, 23 Jun 2025 21:24:30 +0200 Subject: [PATCH 3/3] clocksource/drivers/timer-ti-dm: Add clockevent support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250623-topic-ti-dm-clkevt-v6-16-v1-3-b00086761ee1@baylibre.com> References: <20250623-topic-ti-dm-clkevt-v6-16-v1-0-b00086761ee1@baylibre.com> In-Reply-To: <20250623-topic-ti-dm-clkevt-v6-16-v1-0-b00086761ee1@baylibre.com> To: Daniel Lezcano , Thomas Gleixner Cc: Vishal Mahaveer , Kevin Hilman , Dhruva Gole , Sebin Francis , Kendall Willis , Akashdeep Kaur , linux-kernel@vger.kernel.org, Markus Schneider-Pargmann X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=6658; i=msp@baylibre.com; h=from:subject:message-id; bh=XwwMkrgJbQ+iphWDh7a1A3iYblM9/iVX+IUeIy/8wrc=; b=owGbwMvMwCXWejAsc4KoVzDjabUkhozIVa6b1nHzFvuuE5l2+5prcPXkp5q3yh2MGFZ+WHPW1 Saj5zZTRykLgxgXg6yYIktnYmjaf/mdx5IXLdsMM4eVCWQIAxenAEzE/AfDX6E1+z8zFzyLjt+6 LT/HZ73Djvd790Xl2bw12OkofXWpQwDD/4zX57jMvaZ0/TL8+/xAoJ7y91nz+Walxq8XNxU3n3/ jORsA X-Developer-Key: i=msp@baylibre.com; a=openpgp; fpr=BADD88DB889FDC3E8A3D5FE612FA6A01E0A45B41 Add support for using the TI Dual-Mode Timer for clockevents. The second always on device with the "ti,timer-alwon" property is selected to be used for clockevents. The first one is used as clocksource. This allows clockevents to be setup independently of the CPU. Signed-off-by: Markus Schneider-Pargmann --- drivers/clocksource/timer-ti-dm.c | 138 ++++++++++++++++++++++++++++++++++= ++-- 1 file changed, 133 insertions(+), 5 deletions(-) diff --git a/drivers/clocksource/timer-ti-dm.c b/drivers/clocksource/timer-= ti-dm.c index 085609ba2d249dcc8f53c8aaa831d8fbe69b3753..a17e3e81508793a46cdee815bde= 3ad17fedd55e7 100644 --- a/drivers/clocksource/timer-ti-dm.c +++ b/drivers/clocksource/timer-ti-dm.c @@ -21,8 +21,10 @@ #include #include #include +#include #include #include +#include #include #include #include @@ -158,7 +160,14 @@ struct dmtimer_clocksource { unsigned int loadval; }; =20 +struct omap_dm_timer_clockevent { + struct clock_event_device dev; + struct dmtimer *timer; + u32 period; +}; + static resource_size_t omap_dm_timer_clocksource_base; +static resource_size_t omap_dm_timer_clockevent_base; static void __iomem *omap_dm_timer_sched_clock_counter; =20 enum { @@ -1091,6 +1100,9 @@ static void omap_dm_timer_find_alwon(void) { struct device_node *np; =20 + if (omap_dm_timer_clocksource_base && omap_dm_timer_clockevent_base) + return; + for_each_matching_node(np, omap_timer_match) { struct resource res; =20 @@ -1103,13 +1115,22 @@ static void omap_dm_timer_find_alwon(void) if (of_address_to_resource(np, 0, &res)) continue; =20 - omap_dm_timer_clocksource_base =3D res.start; + if (!omap_dm_timer_clocksource_base) { + omap_dm_timer_clocksource_base =3D res.start; + continue; + } =20 - of_node_put(np); - return; + if (res.start !=3D omap_dm_timer_clocksource_base) { + omap_dm_timer_clockevent_base =3D res.start; + + of_node_put(np); + return; + } } =20 - omap_dm_timer_clocksource_base =3D -1; + if (!omap_dm_timer_clocksource_base) + omap_dm_timer_clocksource_base =3D -1; + omap_dm_timer_clockevent_base =3D -1; } =20 static struct dmtimer_clocksource *omap_dm_timer_to_clocksource(struct clo= cksource *cs) @@ -1188,6 +1209,105 @@ static int omap_dm_timer_setup_clocksource(struct d= mtimer *timer) return 0; } =20 +static struct omap_dm_timer_clockevent *to_dm_timer_clockevent(struct cloc= k_event_device *evt) +{ + return container_of(evt, struct omap_dm_timer_clockevent, dev); +} + +static int omap_dm_timer_evt_set_next_event(unsigned long cycles, + struct clock_event_device *evt) +{ + struct omap_dm_timer_clockevent *clkevt =3D to_dm_timer_clockevent(evt); + struct dmtimer *timer =3D clkevt->timer; + + dmtimer_write(timer, OMAP_TIMER_COUNTER_REG, 0xffffffff - cycles); + dmtimer_write(timer, OMAP_TIMER_CTRL_REG, OMAP_TIMER_CTRL_ST); + + return 0; +} + +static int omap_dm_timer_evt_shutdown(struct clock_event_device *evt) +{ + struct omap_dm_timer_clockevent *clkevt =3D to_dm_timer_clockevent(evt); + struct dmtimer *timer =3D clkevt->timer; + + __omap_dm_timer_stop(timer); + + return 0; +} + +static int omap_dm_timer_evt_set_periodic(struct clock_event_device *evt) +{ + struct omap_dm_timer_clockevent *clkevt =3D to_dm_timer_clockevent(evt); + struct dmtimer *timer =3D clkevt->timer; + + omap_dm_timer_evt_shutdown(evt); + + omap_dm_timer_set_load(&timer->cookie, clkevt->period); + dmtimer_write(timer, OMAP_TIMER_COUNTER_REG, clkevt->period); + dmtimer_write(timer, OMAP_TIMER_CTRL_REG, + OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST); + + return 0; +} + +static irqreturn_t omap_dm_timer_evt_interrupt(int irq, void *dev_id) +{ + struct omap_dm_timer_clockevent *clkevt =3D dev_id; + struct dmtimer *timer =3D clkevt->timer; + + __omap_dm_timer_write_status(timer, OMAP_TIMER_INT_OVERFLOW); + + clkevt->dev.event_handler(&clkevt->dev); + + return IRQ_HANDLED; +} + +static int omap_dm_timer_setup_clockevent(struct dmtimer *timer) +{ + struct device *dev =3D &timer->pdev->dev; + struct omap_dm_timer_clockevent *clkevt; + int ret; + + clkevt =3D devm_kzalloc(dev, sizeof(*clkevt), GFP_KERNEL); + if (!clkevt) + return -ENOMEM; + + timer->reserved =3D 1; + clkevt->timer =3D timer; + + clkevt->dev.name =3D "omap_dm_timer"; + clkevt->dev.features =3D CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; + clkevt->dev.rating =3D 300; + clkevt->dev.set_next_event =3D omap_dm_timer_evt_set_next_event; + clkevt->dev.set_state_shutdown =3D omap_dm_timer_evt_shutdown; + clkevt->dev.set_state_periodic =3D omap_dm_timer_evt_set_periodic; + clkevt->dev.set_state_oneshot =3D omap_dm_timer_evt_shutdown; + clkevt->dev.set_state_oneshot_stopped =3D omap_dm_timer_evt_shutdown; + clkevt->dev.tick_resume =3D omap_dm_timer_evt_shutdown; + clkevt->dev.cpumask =3D cpu_possible_mask; + clkevt->period =3D 0xffffffff - DIV_ROUND_CLOSEST(timer->fclk_rate, HZ); + + __omap_dm_timer_init_regs(timer); + __omap_dm_timer_stop(timer); + __omap_dm_timer_enable_posted(timer); + + ret =3D devm_request_irq(dev, timer->irq, omap_dm_timer_evt_interrupt, + IRQF_TIMER, "omap_dm_timer_clockevent", clkevt); + if (ret) { + dev_err(dev, "Failed to request interrupt: %d\n", ret); + return ret; + } + + __omap_dm_timer_int_enable(timer, OMAP_TIMER_INT_OVERFLOW); + + clockevents_config_and_register(&clkevt->dev, timer->fclk_rate, + 3, + 0xffffffff); + + return 0; +} + /** * omap_dm_timer_probe - probe function called for every registered device * @pdev: pointer to current timer platform device @@ -1204,7 +1324,7 @@ static int omap_dm_timer_probe(struct platform_device= *pdev) struct resource *res; int ret; =20 - if (!omap_dm_timer_clocksource_base) + if (!omap_dm_timer_clocksource_base || !omap_dm_timer_clockevent_base) omap_dm_timer_find_alwon(); =20 pdata =3D of_device_get_match_data(dev); @@ -1281,6 +1401,14 @@ static int omap_dm_timer_probe(struct platform_devic= e *pdev) =20 res =3D platform_get_resource(pdev, IORESOURCE_MEM, 0); =20 + if (omap_dm_timer_clockevent_base && res && + res->start =3D=3D omap_dm_timer_clockevent_base && + !IS_ERR_OR_NULL(timer->fclk)) { + ret =3D omap_dm_timer_setup_clockevent(timer); + if (ret) + return ret; + } + if (omap_dm_timer_clocksource_base && res && res->start =3D=3D omap_dm_timer_clocksource_base && !IS_ERR_OR_NULL(timer->fclk)) { --=20 2.49.0