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Mon, 23 Jun 2025 09:12:36 -0700 (PDT) From: =?utf-8?q?Jo=C3=A3o_Paulo_Gon=C3=A7alves?= Date: Mon, 23 Jun 2025 13:12:26 -0300 Subject: [PATCH 1/2] arm64: dts: ti: k3-am62p-j722s: Enable freq throttling on thermal alert Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250623-b4-verdin-am62p-cooling-device-v1-1-cc185ba5843d@toradex.com> References: <20250623-b4-verdin-am62p-cooling-device-v1-0-cc185ba5843d@toradex.com> In-Reply-To: <20250623-b4-verdin-am62p-cooling-device-v1-0-cc185ba5843d@toradex.com> To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, =?utf-8?q?Jo=C3=A3o_Paulo_Gon=C3=A7alves?= X-Mailer: b4 0.14.2 From: Jo=C3=A3o Paulo Gon=C3=A7alves Enable throttling down the CPU frequency when an alert temperature threshold is reached before the critical temperature for shutdown. Signed-off-by: Jo=C3=A3o Paulo Gon=C3=A7alves --- .../boot/dts/ti/k3-am62p-j722s-common-thermal.dtsi | 51 ++++++++++++++++++= ++++ arch/arm64/boot/dts/ti/k3-am62p5.dtsi | 4 ++ arch/arm64/boot/dts/ti/k3-j722s.dtsi | 4 ++ 3 files changed, 59 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-thermal.dtsi b/ar= ch/arm64/boot/dts/ti/k3-am62p-j722s-common-thermal.dtsi index c7486fb2a5b45cfa2bd7798eb4746ad2af8c390a..138b9c395be4bf7bd6c1941d752= 871af8cc9b1b6 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-thermal.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-thermal.dtsi @@ -12,12 +12,29 @@ main0_thermal: main0-thermal { thermal-sensors =3D <&wkup_vtm0 0>; =20 trips { + main0_alert: main0-alert { + temperature =3D <115000>; + hysteresis =3D <2000>; + type =3D "passive"; + }; + main0_crit: main0-crit { temperature =3D <125000>; /* milliCelsius */ hysteresis =3D <2000>; /* milliCelsius */ type =3D "critical"; }; }; + + cooling-maps { + map0 { + trip =3D <&main0_alert>; + cooling-device =3D + <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; =20 main1_thermal: main1-thermal { @@ -26,12 +43,29 @@ main1_thermal: main1-thermal { thermal-sensors =3D <&wkup_vtm0 1>; =20 trips { + main1_alert: main1-alert { + temperature =3D <115000>; + hysteresis =3D <2000>; + type =3D "passive"; + }; + main1_crit: main1-crit { temperature =3D <125000>; /* milliCelsius */ hysteresis =3D <2000>; /* milliCelsius */ type =3D "critical"; }; }; + + cooling-maps { + map0 { + trip =3D <&main1_alert>; + cooling-device =3D + <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; =20 main2_thermal: main2-thermal { @@ -40,11 +74,28 @@ main2_thermal: main2-thermal { thermal-sensors =3D <&wkup_vtm0 2>; =20 trips { + main2_alert: main2-alert { + temperature =3D <115000>; + hysteresis =3D <2000>; + type =3D "passive"; + }; + main2_crit: main2-crit { temperature =3D <125000>; /* milliCelsius */ hysteresis =3D <2000>; /* milliCelsius */ type =3D "critical"; }; }; + + cooling-maps { + map0 { + trip =3D <&main2_alert>; + cooling-device =3D + <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62p5.dtsi b/arch/arm64/boot/dts/ti= /k3-am62p5.dtsi index 140587d02e88e9d391c41001643ec715d41bf262..202378d9d5cfdc8eced93511739= 8bcf859088d1b 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p5.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p5.dtsi @@ -49,6 +49,7 @@ cpu0: cpu@0 { next-level-cache =3D <&l2_0>; operating-points-v2 =3D <&a53_opp_table>; clocks =3D <&k3_clks 135 0>; + #cooling-cells =3D <2>; }; =20 cpu1: cpu@1 { @@ -65,6 +66,7 @@ cpu1: cpu@1 { next-level-cache =3D <&l2_0>; operating-points-v2 =3D <&a53_opp_table>; clocks =3D <&k3_clks 136 0>; + #cooling-cells =3D <2>; }; =20 cpu2: cpu@2 { @@ -81,6 +83,7 @@ cpu2: cpu@2 { next-level-cache =3D <&l2_0>; operating-points-v2 =3D <&a53_opp_table>; clocks =3D <&k3_clks 137 0>; + #cooling-cells =3D <2>; }; =20 cpu3: cpu@3 { @@ -97,6 +100,7 @@ cpu3: cpu@3 { next-level-cache =3D <&l2_0>; operating-points-v2 =3D <&a53_opp_table>; clocks =3D <&k3_clks 138 0>; + #cooling-cells =3D <2>; }; }; =20 diff --git a/arch/arm64/boot/dts/ti/k3-j722s.dtsi b/arch/arm64/boot/dts/ti/= k3-j722s.dtsi index 14c6c6a332ef2f118e483744e97222865560e6ac..cdc8570e54b29d068aab4e2788a= 8b36dfa539cfa 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j722s.dtsi @@ -56,6 +56,7 @@ cpu0: cpu@0 { d-cache-sets =3D <128>; next-level-cache =3D <&l2_0>; clocks =3D <&k3_clks 135 0>; + #cooling-cells =3D <2>; }; =20 cpu1: cpu@1 { @@ -71,6 +72,7 @@ cpu1: cpu@1 { d-cache-sets =3D <128>; next-level-cache =3D <&l2_0>; clocks =3D <&k3_clks 136 0>; + #cooling-cells =3D <2>; }; =20 cpu2: cpu@2 { @@ -86,6 +88,7 @@ cpu2: cpu@2 { d-cache-sets =3D <128>; next-level-cache =3D <&l2_0>; clocks =3D <&k3_clks 137 0>; + #cooling-cells =3D <2>; }; =20 cpu3: cpu@3 { @@ -101,6 +104,7 @@ cpu3: cpu@3 { d-cache-sets =3D <128>; next-level-cache =3D <&l2_0>; clocks =3D <&k3_clks 138 0>; + #cooling-cells =3D <2>; }; }; =20 --=20 2.43.0