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Sat, 21 Jun 2025 05:49:08 -0700 (PDT) From: John Clark To: heiko@sntech.de Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, John Clark Subject: [PATCH v3 1/2] dt-bindings: arm: rockchip: add FriendlyElec NanoPi M5 board Date: Sat, 21 Jun 2025 08:48:59 -0400 Message-Id: <20250621124900.214098-2-inindev@gmail.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250621124900.214098-1-inindev@gmail.com> References: <20250621124900.214098-1-inindev@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add device tree documentation for rk3576-nanopi-m5 Signed-off-by: John Clark --- Documentation/devicetree/bindings/arm/rockchip.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Document= ation/devicetree/bindings/arm/rockchip.yaml index 59b69c4741c5..10de9b7bdfcc 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -295,6 +295,12 @@ properties: - friendlyarm,nanopi-r4s-enterprise - const: rockchip,rk3399 =20 + - description: FriendlyElec NanoPi M5 series boards + items: + - enum: + - friendlyarm,nanopi-m5 + - const: rockchip,rk3576 + - description: FriendlyElec NanoPi R5 series boards items: - enum: --=20 2.39.5 From nobody Wed Oct 1 20:43:48 2025 Received: from mail-yw1-f179.google.com (mail-yw1-f179.google.com [209.85.128.179]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B5348217660; 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Sat, 21 Jun 2025 05:49:10 -0700 (PDT) Received: from localhost.localdomain ([192.34.165.40]) by smtp.gmail.com with ESMTPSA id 00721157ae682-712c4a1625fsm8357727b3.27.2025.06.21.05.49.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 21 Jun 2025 05:49:10 -0700 (PDT) From: John Clark To: heiko@sntech.de Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, John Clark Subject: [PATCH v3 2/2] arm64: dts: rockchip: Add FriendlyElec NanoPi M5 support Date: Sat, 21 Jun 2025 08:49:00 -0400 Message-Id: <20250621124900.214098-3-inindev@gmail.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250621124900.214098-1-inindev@gmail.com> References: <20250621124900.214098-1-inindev@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add device tree for FriendlyElec NanoPi M5 with Rockchip RK3576 SoC (4x Cortex-A72, 4x Cortex-A53, Mali-G52 MC3 GPU, 6 TOPS NPU). Enables basic booting and connectivity. Supported features: - RK3576 SoC - 4GB/8GB/16GB LPDDR4X/LPDDR5 RAM - 16MB SPI Nor Flash - 2x 1Gbps Ethernet - 2x USB 3.2 Gen 1 Type-A ports - microSD UHS-I - M.2 M-Key PCIe 2.1 x1 NVMe support - HDMI 1.4/2.0 (up to 4096x2304@60Hz) - 30-pin GPIO (2x SPI, 4x UART, 3x I2C, 5x PWM, 20x GPIO) - Debug UART - RTC with HYM8563TS - Power via USB-C (PD, 6V~20V) Signed-off-by: John Clark --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3576-nanopi-m5.dts | 999 ++++++++++++++++++ 2 files changed, 1000 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index ce2aeb826f19..7aff32f4260e 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -148,6 +148,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-armsom-sige5.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-armsom-sige5-v1.2-wifibt.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-evb1-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-luckfox-omni3576.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-nanopi-m5.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-roc-pc.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-rock-4d.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3582-radxa-e52c.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts b/arch/arm64= /boot/dts/rockchip/rk3576-nanopi-m5.dts new file mode 100644 index 000000000000..c63be9060651 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts @@ -0,0 +1,999 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2025 FriendlyElec Computer Tech. Co., Ltd. + * Copyright (c) 2025 John Clark + */ + +/dts-v1/; + +#include +#include +#include +#include +#include +#include +#include +#include "rk3576.dtsi" + +/ { + model =3D "FriendlyElec NanoPi M5"; + compatible =3D "friendlyarm,nanopi-m5", "rockchip,rk3576"; + + aliases { + ethernet0 =3D &gmac0; + ethernet1 =3D &gmac1; + }; + + chosen { + stdout-path =3D "serial0:1500000n8"; + }; + + gpio_keys: gpio-keys { + compatible =3D "gpio-keys"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&key1_pin>; + + button-user { + debounce-interval =3D <50>; + gpios =3D <&gpio1 RK_PA0 GPIO_ACTIVE_LOW>; + label =3D "User"; + linux,code =3D ; + wakeup-source; + }; + }; + + gpio_leds: gpio-leds { + compatible =3D "gpio-leds"; + + sys_led: led-0 { + gpios =3D <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>; + label =3D "sys_led"; + linux,default-trigger =3D "heartbeat"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sys_led_pin>; + }; + + lan_led: led-1 { + gpios =3D <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>; + label =3D "lan_led"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&lan_led_pin>; + }; + + wan_led: led-2 { + gpios =3D <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>; + label =3D "wan_led"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&wan_led_pin>; + }; + }; + + hdmi-con { + compatible =3D "hdmi-connector"; + hdmi-pwr-supply =3D <&vcc_5v0_hdmi>; + type =3D "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint =3D <&hdmi_out_con>; + }; + }; + }; + + vcc_12v_dcin: regulator-vcc-12v-dcin { + compatible =3D "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <12000000>; + regulator-max-microvolt =3D <12000000>; + regulator-name =3D "vcc_12v_dcin"; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { + compatible =3D "regulator-fixed"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt =3D <1100000>; + regulator-max-microvolt =3D <1100000>; + regulator-name =3D "vcc_1v1_nldo_s3"; + vin-supply =3D <&vcc_5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 { + compatible =3D "regulator-fixed"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt =3D <2000000>; + regulator-max-microvolt =3D <2000000>; + regulator-name =3D "vcc_2v0_pldo_s3"; + vin-supply =3D <&vcc_5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3_m2_keym: regulator-vcc-3v3-m2_keym { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pcie_m2_pwren>; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-name =3D "vcc_3v3_m2_keym"; + vin-supply =3D <&vcc_5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3_s0: regulator-vcc-3v3-s0 { + compatible =3D "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-name =3D "vcc_3v3_s0"; + vin-supply =3D <&vcc_3v3_s3>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_3v3_sd_s0: regulator-vcc-3v3-sd-s0 { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sd_s0_pwren>; + regulator-boot-on; + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3000000>; + regulator-name =3D "vcc_3v3_sd_s0"; + vin-supply =3D <&vcc_3v3_s3>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_5v0_device: regulator-vcc-5v0-device { + compatible =3D "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + regulator-name =3D "vcc_5v0_device"; + vin-supply =3D <&vcc_12v_dcin>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_5v0_hdmi: regulator-vcc-5v0-hdmi { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&hdmi_con_en>; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + regulator-name =3D "vcc_5v0_hdmi"; + vin-supply =3D <&vcc_5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_5v0_host: regulator-vcc-5v0-host { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb_host_pwren>; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + regulator-name =3D "vcc_5v0_host"; + vin-supply =3D <&vcc_5v0_device>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_5v0_otg: regulator-vcc-5v0-otg { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio0 RK_PD1 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb_otg0_pwren>; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + regulator-name =3D "vcc_5v0_otg"; + vin-supply =3D <&vcc_5v0_device>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_5v0_sys: regulator-vcc-5v0-sys { + compatible =3D "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + regulator-name =3D "vcc_5v0_sys"; + vin-supply =3D <&vcc_12v_dcin>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + sound { + compatible =3D "simple-audio-card"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&hp_det>; + + simple-audio-card,format =3D "i2s"; + simple-audio-card,hp-det-gpios =3D <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>; + simple-audio-card,mclk-fs =3D <256>; + simple-audio-card,name =3D "realtek,rt5616-codec"; + + simple-audio-card,routing =3D + "Headphones", "HPOL", + "Headphones", "HPOR", + "IN1P", "Microphone Jack"; + simple-audio-card,widgets =3D + "Headphone", "Headphone Jack", + "Microphone", "Microphone Jack"; + + simple-audio-card,codec { + sound-dai =3D <&rt5616>; + }; + + simple-audio-card,cpu { + sound-dai =3D <&sai2>; + }; + }; +}; + +&combphy0_ps { + status =3D "okay"; +}; + +&combphy1_psu { + status =3D "okay"; +}; + +&cpu_b0 { + cpu-supply =3D <&vdd_cpu_big_s0>; +}; + +&cpu_b1 { + cpu-supply =3D <&vdd_cpu_big_s0>; +}; + +&cpu_b2 { + cpu-supply =3D <&vdd_cpu_big_s0>; +}; + +&cpu_b3 { + cpu-supply =3D <&vdd_cpu_big_s0>; +}; + +&cpu_l0 { + cpu-supply =3D <&vdd_cpu_lit_s0>; +}; + +&cpu_l1 { + cpu-supply =3D <&vdd_cpu_lit_s0>; +}; + +&cpu_l2 { + cpu-supply =3D <&vdd_cpu_lit_s0>; +}; + +&cpu_l3 { + cpu-supply =3D <&vdd_cpu_lit_s0>; +}; + +&fspi1m1_pins { + /* gpio1_d5, gpio1_c4-c7 (clk, d0-d4) are for spi nor flash */ + /* gpio1_d0-d4 muxed to sai2 audio functions */ + rockchip,pins =3D + <1 RK_PD5 3 &pcfg_pull_none>, + <1 RK_PC4 3 &pcfg_pull_none>, + <1 RK_PC5 3 &pcfg_pull_none>, + <1 RK_PC6 3 &pcfg_pull_none>, + <1 RK_PC7 3 &pcfg_pull_none>; +}; + +&gmac0 { + clock_in_out =3D "output"; + phy-handle =3D <&rgmii_phy0>; + phy-mode =3D "rgmii-id"; + phy-supply =3D <&vcc_3v3_s3>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <ð0m0_miim + ð0m0_tx_bus2 + ð0m0_rx_bus2 + ð0m0_rgmii_clk + ð0m0_rgmii_bus>; + status =3D "okay"; +}; + +&gmac1 { + clock_in_out =3D "output"; + phy-handle =3D <&rgmii_phy1>; + phy-mode =3D "rgmii-id"; + phy-supply =3D <&vcc_3v3_s3>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <ð1m0_miim + ð1m0_tx_bus2 + ð1m0_rx_bus2 + ð1m0_rgmii_clk + ð1m0_rgmii_bus>; + status =3D "okay"; +}; + +&gpu { + mali-supply =3D <&vdd_gpu_s0>; + status =3D "okay"; +}; + +&hdmi { + status =3D "okay"; +}; + +&hdmi_in { + hdmi_in_vp0: endpoint { + remote-endpoint =3D <&vp0_out_hdmi>; + }; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint =3D <&hdmi_con_in>; + }; +}; + +&hdptxphy { + status =3D "okay"; +}; + +&i2c1 { + status =3D "okay"; + + pmic@23 { + compatible =3D "rockchip,rk806"; + reg =3D <0x23>; + #gpio-cells =3D <2>; + gpio-controller; + interrupt-parent =3D <&gpio0>; + interrupts =3D <6 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pmic_pins>, <&rk806_dvs1_null>, + <&rk806_dvs2_null>, <&rk806_dvs3_null>; + system-power-controller; + + vcc1-supply =3D <&vcc_5v0_sys>; + vcc2-supply =3D <&vcc_5v0_sys>; + vcc3-supply =3D <&vcc_5v0_sys>; + vcc4-supply =3D <&vcc_5v0_sys>; + vcc5-supply =3D <&vcc_5v0_sys>; + vcc6-supply =3D <&vcc_5v0_sys>; + vcc7-supply =3D <&vcc_5v0_sys>; + vcc8-supply =3D <&vcc_5v0_sys>; + vcc9-supply =3D <&vcc_5v0_sys>; + vcc10-supply =3D <&vcc_5v0_sys>; + vcc11-supply =3D <&vcc_2v0_pldo_s3>; + vcc12-supply =3D <&vcc_5v0_sys>; + vcc13-supply =3D <&vcc_1v1_nldo_s3>; + vcc14-supply =3D <&vcc_1v1_nldo_s3>; + vcca-supply =3D <&vcc_5v0_sys>; + + rk806_dvs1_null: dvs1-null-pins { + pins =3D "gpio_pwrctrl1"; + function =3D "pin_fun0"; + }; + + rk806_dvs1_slp: dvs1-slp-pins { + pins =3D "gpio_pwrctrl1"; + function =3D "pin_fun1"; + }; + + rk806_dvs1_pwrdn: dvs1-pwrdn-pins { + pins =3D "gpio_pwrctrl1"; + function =3D "pin_fun2"; + }; + + rk806_dvs1_rst: dvs1-rst-pins { + pins =3D "gpio_pwrctrl1"; + function =3D "pin_fun3"; + }; + + rk806_dvs2_null: dvs2-null-pins { + pins =3D "gpio_pwrctrl2"; + function =3D "pin_fun0"; + }; + + rk806_dvs2_slp: dvs2-slp-pins { + pins =3D "gpio_pwrctrl2"; + function =3D "pin_fun1"; + }; + + rk806_dvs2_pwrdn: dvs2-pwrdn-pins { + pins =3D "gpio_pwrctrl2"; + function =3D "pin_fun2"; + }; + + rk806_dvs2_rst: dvs2-rst-pins { + pins =3D "gpio_pwrctrl2"; + function =3D "pin_fun3"; + }; + + rk806_dvs2_dvs: dvs2-dvs-pins { + pins =3D "gpio_pwrctrl2"; + function =3D "pin_fun4"; + }; + + rk806_dvs2_gpio: dvs2-gpio-pins { + pins =3D "gpio_pwrctrl2"; + function =3D "pin_fun5"; + }; + + rk806_dvs3_null: dvs3-null-pins { + pins =3D "gpio_pwrctrl3"; + function =3D "pin_fun0"; + }; + + rk806_dvs3_slp: dvs3-slp-pins { + pins =3D "gpio_pwrctrl3"; + function =3D "pin_fun1"; + }; + + rk806_dvs3_pwrdn: dvs3-pwrdn-pins { + pins =3D "gpio_pwrctrl3"; + function =3D "pin_fun2"; + }; + + rk806_dvs3_rst: dvs3-rst-pins { + pins =3D "gpio_pwrctrl3"; + function =3D "pin_fun3"; + }; + + rk806_dvs3_dvs: dvs3-dvs-pins { + pins =3D "gpio_pwrctrl3"; + function =3D "pin_fun4"; + }; + + rk806_dvs3_gpio: dvs3-gpio-pins { + pins =3D "gpio_pwrctrl3"; + function =3D "pin_fun5"; + }; + + regulators { + vdd_cpu_big_s0: dcdc-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-enable-ramp-delay =3D <400>; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <950000>; + regulator-name =3D "vdd_cpu_big_s0"; + regulator-ramp-delay =3D <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_npu_s0: dcdc-reg2 { + regulator-boot-on; + regulator-enable-ramp-delay =3D <400>; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <950000>; + regulator-name =3D "vdd_npu_s0"; + regulator-ramp-delay =3D <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_lit_s0: dcdc-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <950000>; + regulator-name =3D "vdd_cpu_lit_s0"; + regulator-ramp-delay =3D <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt =3D <750000>; + }; + }; + + vcc_3v3_s3: dcdc-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-name =3D "vcc_3v3_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <3300000>; + }; + }; + + vdd_gpu_s0: dcdc-reg5 { + regulator-boot-on; + regulator-enable-ramp-delay =3D <400>; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <900000>; + regulator-name =3D "vdd_gpu_s0"; + regulator-ramp-delay =3D <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt =3D <850000>; + }; + }; + + vddq_ddr_s0: dcdc-reg6 { + regulator-always-on; + regulator-boot-on; + regulator-name =3D "vddq_ddr_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_logic_s0: dcdc-reg7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <800000>; + regulator-name =3D "vdd_logic_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8_s3: dcdc-reg8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-name =3D "vcc_1v8_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <1800000>; + }; + }; + + vdd2_ddr_s3: dcdc-reg9 { + regulator-always-on; + regulator-boot-on; + regulator-name =3D "vdd2_ddr_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdd_ddr_s0: dcdc-reg10 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <1200000>; + regulator-name =3D "vdd_ddr_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca_1v8_s0: pldo-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-name =3D "vcca_1v8_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pldo2_s0: pldo-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-name =3D "vcca1v8_pldo2_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_1v2_s0: pldo-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-name =3D "vdda_1v2_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca_3v3_s0: pldo-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-name =3D "vcca_3v3_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd_s0: pldo-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + regulator-name =3D "vccio_sd_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pldo6_s3: pldo-reg6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-name =3D "vcca1v8_pldo6_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <1800000>; + }; + }; + + vdd_0v75_s3: nldo-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <750000>; + regulator-max-microvolt =3D <750000>; + regulator-name =3D "vdd_0v75_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <750000>; + }; + }; + + vdda_ddr_pll_s0: nldo-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <850000>; + regulator-name =3D "vdda_ddr_pll_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v75_hdmi_s0: nldo-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <837500>; + regulator-max-microvolt =3D <837500>; + regulator-name =3D "vdda0v75_hdmi_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v85_s0: nldo-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <850000>; + regulator-name =3D "vdda_0v85_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v75_s0: nldo-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <750000>; + regulator-max-microvolt =3D <750000>; + regulator-name =3D "vdda_0v75_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&i2c2 { + status =3D "okay"; + + hym8563: rtc@51 { + compatible =3D "haoyu,hym8563"; + reg =3D <0x51>; + #clock-cells =3D <0>; + clock-output-names =3D "hym8563"; + interrupt-parent =3D <&gpio0>; + interrupts =3D ; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&hym8563_int>; + wakeup-source; + }; +}; + +&i2c5 { + clock-frequency =3D <200000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c5m3_xfer>; + status =3D "okay"; + + rt5616: audio-codec@1b { + compatible =3D "realtek,rt5616"; + reg =3D <0x1b>; + assigned-clocks =3D <&cru CLK_SAI2_MCLKOUT>; + assigned-clock-rates =3D <12288000>; + clocks =3D <&cru CLK_SAI2_MCLKOUT>; + clock-names =3D "mclk"; + #sound-dai-cells =3D <0>; + }; +}; + +&mdio0 { + rgmii_phy0: phy@1 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <0x1>; + clocks =3D <&cru REFCLKO25M_GMAC0_OUT>; + interrupt-parent =3D <&gpio2>; + interrupts =3D ; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&gmac0_int>; + reset-assert-us =3D <20000>; + reset-deassert-us =3D <100000>; + reset-gpios =3D <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>; + }; +}; + +&mdio1 { + rgmii_phy1: phy@1 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <0x1>; + clocks =3D <&cru REFCLKO25M_GMAC1_OUT>; + interrupt-parent =3D <&gpio3>; + interrupts =3D ; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&gmac1_int>; + reset-assert-us =3D <20000>; + reset-deassert-us =3D <100000>; + reset-gpios =3D <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>; + }; +}; + +&pcie0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pcie_m2_reset>; + reset-gpios =3D <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply =3D <&vcc_3v3_m2_keym>; + status =3D "okay"; +}; + +&pinctrl { + gpio-key { + key1_pin: key1-pin { + rockchip,pins =3D <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + gpio-leds { + sys_led_pin: sys-led-pin { + rockchip,pins =3D <2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + lan_led_pin: lan-led-pin { + rockchip,pins =3D <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + wan_led_pin: wan-led-pin { + rockchip,pins =3D <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + gmac { + gmac0_int: gmac0-int { + rockchip,pins =3D <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; + }; + gmac0_rst: gmac0-rst { + rockchip,pins =3D <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + gmac1_int: gmac1-int { + rockchip,pins =3D <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + gmac1_rst: gmac1-rst { + rockchip,pins =3D <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + hdmi { + hdmi_con_en: hdmi-con-en { + rockchip,pins =3D <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + headphone { + hp_det: hp-det { + rockchip,pins =3D <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + hym8563 { + hym8563_int: hym8563-int { + rockchip,pins =3D <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + pcie { + pcie_m2_pwren: pcie-m2-pwren { + rockchip,pins =3D <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + pcie_m2_reset: pcie-m2-reset { + rockchip,pins =3D <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + sdmmc { + sd_s0_pwren: sd-s0-pwren { + rockchip,pins =3D <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + usb { + usb_host_pwren: usb-host-pwren { + rockchip,pins =3D <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + usb_otg0_pwren: usb-otg0-pwren { + rockchip,pins =3D <0 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&rng { + status =3D "okay"; +}; + +&sai2 { + status =3D "okay"; +}; + +&saradc { + vref-supply =3D <&vcca_1v8_s0>; + status =3D "okay"; +}; + +&sdmmc { + bus-width =3D <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + no-mmc; + no-sdio; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>; + sd-uhs-sdr104; + vmmc-supply =3D <&vcc_3v3_s3>; + vqmmc-supply =3D <&vcc_3v3_sd_s0>; + status =3D "okay"; +}; + +&sfc1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&fspi1m1_csn0 &fspi1m1_pins>; + status =3D "okay"; + + flash@0 { + compatible =3D "jedec,spi-nor"; + reg =3D <0>; + m25p,fast-read; + spi-max-frequency =3D <20000000>; + spi-rx-bus-width =3D <4>; + spi-tx-bus-width =3D <1>; + vcc-supply =3D <&vcc_1v8_s3>; + }; +}; + +&u2phy0 { + status =3D "okay"; +}; + +&u2phy0_otg { + phy-supply =3D <&vcc_5v0_otg>; + status =3D "okay"; +}; + +&u2phy1 { + status =3D "okay"; +}; + +&u2phy1_otg { + phy-supply =3D <&vcc_5v0_host>; + status =3D "okay"; +}; + +&uart0 { + status =3D "okay"; +}; + +&usbdp_phy { + status =3D "okay"; +}; + +&usb_drd0_dwc3 { + dr_mode =3D "otg"; + extcon =3D <&u2phy0>; + status =3D "okay"; +}; + +&usb_drd1_dwc3 { + dr_mode =3D "host"; + status =3D "okay"; +}; + +&vop { + status =3D "okay"; +}; + +&vop_mmu { + status =3D "okay"; +}; + +&vp0 { + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg =3D ; + remote-endpoint =3D <&hdmi_in_vp0>; + }; +}; + +&wdt { + status=3D "okay"; +}; --=20 2.39.5